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1 /*
2 * arch/powerpc/kernel/pmc.c
3 *
4 * Copyright (C) 2004 David Gibson, IBM Corporation.
5 * Includes code formerly from arch/ppc/kernel/perfmon.c:
6 * Author: Andy Fleming
7 * Copyright (c) 2004 Freescale Semiconductor, Inc
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 */
14
15 #include <linux/config.h>
16 #include <linux/errno.h>
17 #include <linux/spinlock.h>
18 #include <linux/module.h>
19
20 #include <asm/processor.h>
21 #include <asm/pmc.h>
22
23 #if defined(CONFIG_FSL_BOOKE) && !defined(CONFIG_E200)
24 static void dummy_perf(struct pt_regs *regs)
25 {
26 unsigned int pmgc0 = mfpmr(PMRN_PMGC0);
27
28 pmgc0 &= ~PMGC0_PMIE;
29 mtpmr(PMRN_PMGC0, pmgc0);
30 }
31 #elif defined(CONFIG_PPC64) || defined(CONFIG_6xx)
32
33 #ifndef MMCR0_PMAO
34 #define MMCR0_PMAO 0
35 #endif
36
37 /* Ensure exceptions are disabled */
38 static void dummy_perf(struct pt_regs *regs)
39 {
40 unsigned int mmcr0 = mfspr(SPRN_MMCR0);
41
42 mmcr0 &= ~(MMCR0_PMXE|MMCR0_PMAO);
43 mtspr(SPRN_MMCR0, mmcr0);
44 }
45 #else
46 /* Ensure exceptions are disabled */
47 static void dummy_perf(struct pt_regs *regs)
48 {
49 unsigned int mmcr0 = mfspr(SPRN_MMCR0);
50
51 mmcr0 &= ~(MMCR0_PMXE);
52 mtspr(SPRN_MMCR0, mmcr0);
53 }
54 #endif
55
56 static DEFINE_SPINLOCK(pmc_owner_lock);
57 static void *pmc_owner_caller; /* mostly for debugging */
58 perf_irq_t perf_irq = dummy_perf;
59
60 int reserve_pmc_hardware(perf_irq_t new_perf_irq)
61 {
62 int err = 0;
63
64 spin_lock(&pmc_owner_lock);
65
66 if (pmc_owner_caller) {
67 printk(KERN_WARNING "reserve_pmc_hardware: "
68 "PMC hardware busy (reserved by caller %p)\n",
69 pmc_owner_caller);
70 err = -EBUSY;
71 goto out;
72 }
73
74 pmc_owner_caller = __builtin_return_address(0);
75 perf_irq = new_perf_irq ? : dummy_perf;
76
77 out:
78 spin_unlock(&pmc_owner_lock);
79 return err;
80 }
81 EXPORT_SYMBOL_GPL(reserve_pmc_hardware);
82
83 void release_pmc_hardware(void)
84 {
85 spin_lock(&pmc_owner_lock);
86
87 WARN_ON(! pmc_owner_caller);
88
89 pmc_owner_caller = NULL;
90 perf_irq = dummy_perf;
91
92 spin_unlock(&pmc_owner_lock);
93 }
94 EXPORT_SYMBOL_GPL(release_pmc_hardware);
95
96 #ifdef CONFIG_PPC64
97 void power4_enable_pmcs(void)
98 {
99 unsigned long hid0;
100
101 hid0 = mfspr(SPRN_HID0);
102 hid0 |= 1UL << (63 - 20);
103
104 /* POWER4 requires the following sequence */
105 asm volatile(
106 "sync\n"
107 "mtspr %1, %0\n"
108 "mfspr %0, %1\n"
109 "mfspr %0, %1\n"
110 "mfspr %0, %1\n"
111 "mfspr %0, %1\n"
112 "mfspr %0, %1\n"
113 "mfspr %0, %1\n"
114 "isync" : "=&r" (hid0) : "i" (SPRN_HID0), "0" (hid0):
115 "memory");
116 }
117 #endif /* CONFIG_PPC64 */