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git.proxmox.com Git - mirror_ubuntu-zesty-kernel.git/blob - arch/powerpc/kernel/process.c
2 * Derived from "arch/i386/kernel/process.c"
3 * Copyright (C) 1995 Linus Torvalds
5 * Updated and modified by Cort Dougan (cort@cs.nmt.edu) and
6 * Paul Mackerras (paulus@cs.anu.edu.au)
9 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version
14 * 2 of the License, or (at your option) any later version.
17 #include <linux/errno.h>
18 #include <linux/sched.h>
19 #include <linux/kernel.h>
21 #include <linux/smp.h>
22 #include <linux/stddef.h>
23 #include <linux/unistd.h>
24 #include <linux/ptrace.h>
25 #include <linux/slab.h>
26 #include <linux/user.h>
27 #include <linux/elf.h>
28 #include <linux/init.h>
29 #include <linux/prctl.h>
30 #include <linux/init_task.h>
31 #include <linux/export.h>
32 #include <linux/kallsyms.h>
33 #include <linux/mqueue.h>
34 #include <linux/hardirq.h>
35 #include <linux/utsname.h>
36 #include <linux/ftrace.h>
37 #include <linux/kernel_stat.h>
38 #include <linux/personality.h>
39 #include <linux/random.h>
40 #include <linux/hw_breakpoint.h>
42 #include <asm/pgtable.h>
43 #include <asm/uaccess.h>
45 #include <asm/processor.h>
48 #include <asm/machdep.h>
50 #include <asm/runlatch.h>
51 #include <asm/syscalls.h>
52 #include <asm/switch_to.h>
53 #include <asm/debug.h>
55 #include <asm/firmware.h>
57 #include <linux/kprobes.h>
58 #include <linux/kdebug.h>
60 /* Transactional Memory debug */
62 #define TM_DEBUG(x...) printk(KERN_INFO x)
64 #define TM_DEBUG(x...) do { } while(0)
67 extern unsigned long _get_SP(void);
70 struct task_struct
*last_task_used_math
= NULL
;
71 struct task_struct
*last_task_used_altivec
= NULL
;
72 struct task_struct
*last_task_used_vsx
= NULL
;
73 struct task_struct
*last_task_used_spe
= NULL
;
77 * Make sure the floating-point register state in the
78 * the thread_struct is up to date for task tsk.
80 void flush_fp_to_thread(struct task_struct
*tsk
)
82 if (tsk
->thread
.regs
) {
84 * We need to disable preemption here because if we didn't,
85 * another process could get scheduled after the regs->msr
86 * test but before we have finished saving the FP registers
87 * to the thread_struct. That process could take over the
88 * FPU, and then when we get scheduled again we would store
89 * bogus values for the remaining FP registers.
92 if (tsk
->thread
.regs
->msr
& MSR_FP
) {
95 * This should only ever be called for current or
96 * for a stopped child process. Since we save away
97 * the FP register state on context switch on SMP,
98 * there is something wrong if a stopped child appears
99 * to still have its FP state in the CPU registers.
101 BUG_ON(tsk
!= current
);
108 EXPORT_SYMBOL_GPL(flush_fp_to_thread
);
110 void enable_kernel_fp(void)
112 WARN_ON(preemptible());
115 if (current
->thread
.regs
&& (current
->thread
.regs
->msr
& MSR_FP
))
118 giveup_fpu(NULL
); /* just enables FP for kernel */
120 giveup_fpu(last_task_used_math
);
121 #endif /* CONFIG_SMP */
123 EXPORT_SYMBOL(enable_kernel_fp
);
125 #ifdef CONFIG_ALTIVEC
126 void enable_kernel_altivec(void)
128 WARN_ON(preemptible());
131 if (current
->thread
.regs
&& (current
->thread
.regs
->msr
& MSR_VEC
))
132 giveup_altivec(current
);
134 giveup_altivec_notask();
136 giveup_altivec(last_task_used_altivec
);
137 #endif /* CONFIG_SMP */
139 EXPORT_SYMBOL(enable_kernel_altivec
);
142 * Make sure the VMX/Altivec register state in the
143 * the thread_struct is up to date for task tsk.
145 void flush_altivec_to_thread(struct task_struct
*tsk
)
147 if (tsk
->thread
.regs
) {
149 if (tsk
->thread
.regs
->msr
& MSR_VEC
) {
151 BUG_ON(tsk
!= current
);
158 EXPORT_SYMBOL_GPL(flush_altivec_to_thread
);
159 #endif /* CONFIG_ALTIVEC */
163 /* not currently used, but some crazy RAID module might want to later */
164 void enable_kernel_vsx(void)
166 WARN_ON(preemptible());
169 if (current
->thread
.regs
&& (current
->thread
.regs
->msr
& MSR_VSX
))
172 giveup_vsx(NULL
); /* just enable vsx for kernel - force */
174 giveup_vsx(last_task_used_vsx
);
175 #endif /* CONFIG_SMP */
177 EXPORT_SYMBOL(enable_kernel_vsx
);
180 void giveup_vsx(struct task_struct
*tsk
)
187 void flush_vsx_to_thread(struct task_struct
*tsk
)
189 if (tsk
->thread
.regs
) {
191 if (tsk
->thread
.regs
->msr
& MSR_VSX
) {
193 BUG_ON(tsk
!= current
);
200 EXPORT_SYMBOL_GPL(flush_vsx_to_thread
);
201 #endif /* CONFIG_VSX */
205 void enable_kernel_spe(void)
207 WARN_ON(preemptible());
210 if (current
->thread
.regs
&& (current
->thread
.regs
->msr
& MSR_SPE
))
213 giveup_spe(NULL
); /* just enable SPE for kernel - force */
215 giveup_spe(last_task_used_spe
);
216 #endif /* __SMP __ */
218 EXPORT_SYMBOL(enable_kernel_spe
);
220 void flush_spe_to_thread(struct task_struct
*tsk
)
222 if (tsk
->thread
.regs
) {
224 if (tsk
->thread
.regs
->msr
& MSR_SPE
) {
226 BUG_ON(tsk
!= current
);
228 tsk
->thread
.spefscr
= mfspr(SPRN_SPEFSCR
);
234 #endif /* CONFIG_SPE */
238 * If we are doing lazy switching of CPU state (FP, altivec or SPE),
239 * and the current task has some state, discard it.
241 void discard_lazy_cpu_state(void)
244 if (last_task_used_math
== current
)
245 last_task_used_math
= NULL
;
246 #ifdef CONFIG_ALTIVEC
247 if (last_task_used_altivec
== current
)
248 last_task_used_altivec
= NULL
;
249 #endif /* CONFIG_ALTIVEC */
251 if (last_task_used_vsx
== current
)
252 last_task_used_vsx
= NULL
;
253 #endif /* CONFIG_VSX */
255 if (last_task_used_spe
== current
)
256 last_task_used_spe
= NULL
;
260 #endif /* CONFIG_SMP */
262 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
263 void do_send_trap(struct pt_regs
*regs
, unsigned long address
,
264 unsigned long error_code
, int signal_code
, int breakpt
)
268 current
->thread
.trap_nr
= signal_code
;
269 if (notify_die(DIE_DABR_MATCH
, "dabr_match", regs
, error_code
,
270 11, SIGSEGV
) == NOTIFY_STOP
)
273 /* Deliver the signal to userspace */
274 info
.si_signo
= SIGTRAP
;
275 info
.si_errno
= breakpt
; /* breakpoint or watchpoint id */
276 info
.si_code
= signal_code
;
277 info
.si_addr
= (void __user
*)address
;
278 force_sig_info(SIGTRAP
, &info
, current
);
280 #else /* !CONFIG_PPC_ADV_DEBUG_REGS */
281 void do_break (struct pt_regs
*regs
, unsigned long address
,
282 unsigned long error_code
)
286 current
->thread
.trap_nr
= TRAP_HWBKPT
;
287 if (notify_die(DIE_DABR_MATCH
, "dabr_match", regs
, error_code
,
288 11, SIGSEGV
) == NOTIFY_STOP
)
291 if (debugger_break_match(regs
))
294 /* Clear the breakpoint */
295 hw_breakpoint_disable();
297 /* Deliver the signal to userspace */
298 info
.si_signo
= SIGTRAP
;
300 info
.si_code
= TRAP_HWBKPT
;
301 info
.si_addr
= (void __user
*)address
;
302 force_sig_info(SIGTRAP
, &info
, current
);
304 #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
306 static DEFINE_PER_CPU(struct arch_hw_breakpoint
, current_brk
);
308 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
310 * Set the debug registers back to their default "safe" values.
312 static void set_debug_reg_defaults(struct thread_struct
*thread
)
314 thread
->iac1
= thread
->iac2
= 0;
315 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
316 thread
->iac3
= thread
->iac4
= 0;
318 thread
->dac1
= thread
->dac2
= 0;
319 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
320 thread
->dvc1
= thread
->dvc2
= 0;
325 * Force User/Supervisor bits to b11 (user-only MSR[PR]=1)
327 thread
->dbcr1
= DBCR1_IAC1US
| DBCR1_IAC2US
| \
328 DBCR1_IAC3US
| DBCR1_IAC4US
;
330 * Force Data Address Compare User/Supervisor bits to be User-only
331 * (0b11 MSR[PR]=1) and set all other bits in DBCR2 register to be 0.
333 thread
->dbcr2
= DBCR2_DAC1US
| DBCR2_DAC2US
;
339 static void prime_debug_regs(struct thread_struct
*thread
)
341 mtspr(SPRN_IAC1
, thread
->iac1
);
342 mtspr(SPRN_IAC2
, thread
->iac2
);
343 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
344 mtspr(SPRN_IAC3
, thread
->iac3
);
345 mtspr(SPRN_IAC4
, thread
->iac4
);
347 mtspr(SPRN_DAC1
, thread
->dac1
);
348 mtspr(SPRN_DAC2
, thread
->dac2
);
349 #if CONFIG_PPC_ADV_DEBUG_DVCS > 0
350 mtspr(SPRN_DVC1
, thread
->dvc1
);
351 mtspr(SPRN_DVC2
, thread
->dvc2
);
353 mtspr(SPRN_DBCR0
, thread
->dbcr0
);
354 mtspr(SPRN_DBCR1
, thread
->dbcr1
);
356 mtspr(SPRN_DBCR2
, thread
->dbcr2
);
360 * Unless neither the old or new thread are making use of the
361 * debug registers, set the debug registers from the values
362 * stored in the new thread.
364 static void switch_booke_debug_regs(struct thread_struct
*new_thread
)
366 if ((current
->thread
.dbcr0
& DBCR0_IDM
)
367 || (new_thread
->dbcr0
& DBCR0_IDM
))
368 prime_debug_regs(new_thread
);
370 #else /* !CONFIG_PPC_ADV_DEBUG_REGS */
371 #ifndef CONFIG_HAVE_HW_BREAKPOINT
372 static void set_debug_reg_defaults(struct thread_struct
*thread
)
374 thread
->hw_brk
.address
= 0;
375 thread
->hw_brk
.type
= 0;
376 set_breakpoint(&thread
->hw_brk
);
378 #endif /* !CONFIG_HAVE_HW_BREAKPOINT */
379 #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
381 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
382 static inline int __set_dabr(unsigned long dabr
, unsigned long dabrx
)
384 mtspr(SPRN_DAC1
, dabr
);
385 #ifdef CONFIG_PPC_47x
390 #elif defined(CONFIG_PPC_BOOK3S)
391 static inline int __set_dabr(unsigned long dabr
, unsigned long dabrx
)
393 mtspr(SPRN_DABR
, dabr
);
394 mtspr(SPRN_DABRX
, dabrx
);
398 static inline int __set_dabr(unsigned long dabr
, unsigned long dabrx
)
404 static inline int set_dabr(struct arch_hw_breakpoint
*brk
)
406 unsigned long dabr
, dabrx
;
408 dabr
= brk
->address
| (brk
->type
& HW_BRK_TYPE_DABR
);
409 dabrx
= ((brk
->type
>> 3) & 0x7);
412 return ppc_md
.set_dabr(dabr
, dabrx
);
414 return __set_dabr(dabr
, dabrx
);
417 static inline int set_dawr(struct arch_hw_breakpoint
*brk
)
419 unsigned long dawr
, dawrx
, mrd
;
423 dawrx
= (brk
->type
& (HW_BRK_TYPE_READ
| HW_BRK_TYPE_WRITE
)) \
424 << (63 - 58); //* read/write bits */
425 dawrx
|= ((brk
->type
& (HW_BRK_TYPE_TRANSLATE
)) >> 2) \
426 << (63 - 59); //* translate */
427 dawrx
|= (brk
->type
& (HW_BRK_TYPE_PRIV_ALL
)) \
428 >> 3; //* PRIM bits */
429 /* dawr length is stored in field MDR bits 48:53. Matches range in
430 doublewords (64 bits) baised by -1 eg. 0b000000=1DW and
432 brk->len is in bytes.
433 This aligns up to double word size, shifts and does the bias.
435 mrd
= ((brk
->len
+ 7) >> 3) - 1;
436 dawrx
|= (mrd
& 0x3f) << (63 - 53);
439 return ppc_md
.set_dawr(dawr
, dawrx
);
440 mtspr(SPRN_DAWR
, dawr
);
441 mtspr(SPRN_DAWRX
, dawrx
);
445 int set_breakpoint(struct arch_hw_breakpoint
*brk
)
447 __get_cpu_var(current_brk
) = *brk
;
449 if (cpu_has_feature(CPU_FTR_DAWR
))
450 return set_dawr(brk
);
452 return set_dabr(brk
);
456 DEFINE_PER_CPU(struct cpu_usage
, cpu_usage_array
);
459 static inline bool hw_brk_match(struct arch_hw_breakpoint
*a
,
460 struct arch_hw_breakpoint
*b
)
462 if (a
->address
!= b
->address
)
464 if (a
->type
!= b
->type
)
466 if (a
->len
!= b
->len
)
471 struct task_struct
*__switch_to(struct task_struct
*prev
,
472 struct task_struct
*new)
474 struct thread_struct
*new_thread
, *old_thread
;
476 struct task_struct
*last
;
477 #ifdef CONFIG_PPC_BOOK3S_64
478 struct ppc64_tlb_batch
*batch
;
482 /* avoid complexity of lazy save/restore of fpu
483 * by just saving it every time we switch out if
484 * this task used the fpu during the last quantum.
486 * If it tries to use the fpu again, it'll trap and
487 * reload its fp regs. So we don't have to do a restore
488 * every switch, just a save.
491 if (prev
->thread
.regs
&& (prev
->thread
.regs
->msr
& MSR_FP
))
493 #ifdef CONFIG_ALTIVEC
495 * If the previous thread used altivec in the last quantum
496 * (thus changing altivec regs) then save them.
497 * We used to check the VRSAVE register but not all apps
498 * set it, so we don't rely on it now (and in fact we need
499 * to save & restore VSCR even if VRSAVE == 0). -- paulus
501 * On SMP we always save/restore altivec regs just to avoid the
502 * complexity of changing processors.
505 if (prev
->thread
.regs
&& (prev
->thread
.regs
->msr
& MSR_VEC
))
506 giveup_altivec(prev
);
507 #endif /* CONFIG_ALTIVEC */
509 if (prev
->thread
.regs
&& (prev
->thread
.regs
->msr
& MSR_VSX
))
510 /* VMX and FPU registers are already save here */
512 #endif /* CONFIG_VSX */
515 * If the previous thread used spe in the last quantum
516 * (thus changing spe regs) then save them.
518 * On SMP we always save/restore spe regs just to avoid the
519 * complexity of changing processors.
521 if ((prev
->thread
.regs
&& (prev
->thread
.regs
->msr
& MSR_SPE
)))
523 #endif /* CONFIG_SPE */
525 #else /* CONFIG_SMP */
526 #ifdef CONFIG_ALTIVEC
527 /* Avoid the trap. On smp this this never happens since
528 * we don't set last_task_used_altivec -- Cort
530 if (new->thread
.regs
&& last_task_used_altivec
== new)
531 new->thread
.regs
->msr
|= MSR_VEC
;
532 #endif /* CONFIG_ALTIVEC */
534 if (new->thread
.regs
&& last_task_used_vsx
== new)
535 new->thread
.regs
->msr
|= MSR_VSX
;
536 #endif /* CONFIG_VSX */
538 /* Avoid the trap. On smp this this never happens since
539 * we don't set last_task_used_spe
541 if (new->thread
.regs
&& last_task_used_spe
== new)
542 new->thread
.regs
->msr
|= MSR_SPE
;
543 #endif /* CONFIG_SPE */
545 #endif /* CONFIG_SMP */
547 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
548 switch_booke_debug_regs(&new->thread
);
551 * For PPC_BOOK3S_64, we use the hw-breakpoint interfaces that would
554 #ifndef CONFIG_HAVE_HW_BREAKPOINT
555 if (unlikely(hw_brk_match(&__get_cpu_var(current_brk
), &new->thread
.hw_brk
)))
556 set_breakpoint(&new->thread
.hw_brk
);
557 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
561 new_thread
= &new->thread
;
562 old_thread
= ¤t
->thread
;
566 * Collect processor utilization data per process
568 if (firmware_has_feature(FW_FEATURE_SPLPAR
)) {
569 struct cpu_usage
*cu
= &__get_cpu_var(cpu_usage_array
);
570 long unsigned start_tb
, current_tb
;
571 start_tb
= old_thread
->start_tb
;
572 cu
->current_tb
= current_tb
= mfspr(SPRN_PURR
);
573 old_thread
->accum_tb
+= (current_tb
- start_tb
);
574 new_thread
->start_tb
= current_tb
;
576 #endif /* CONFIG_PPC64 */
578 #ifdef CONFIG_PPC_BOOK3S_64
579 batch
= &__get_cpu_var(ppc64_tlb_batch
);
581 current_thread_info()->local_flags
|= _TLF_LAZY_MMU
;
583 __flush_tlb_pending(batch
);
586 #endif /* CONFIG_PPC_BOOK3S_64 */
588 local_irq_save(flags
);
591 * We can't take a PMU exception inside _switch() since there is a
592 * window where the kernel stack SLB and the kernel stack are out
593 * of sync. Hard disable here.
596 last
= _switch(old_thread
, new_thread
);
598 #ifdef CONFIG_PPC_BOOK3S_64
599 if (current_thread_info()->local_flags
& _TLF_LAZY_MMU
) {
600 current_thread_info()->local_flags
&= ~_TLF_LAZY_MMU
;
601 batch
= &__get_cpu_var(ppc64_tlb_batch
);
604 #endif /* CONFIG_PPC_BOOK3S_64 */
606 local_irq_restore(flags
);
611 static int instructions_to_print
= 16;
613 static void show_instructions(struct pt_regs
*regs
)
616 unsigned long pc
= regs
->nip
- (instructions_to_print
* 3 / 4 *
619 printk("Instruction dump:");
621 for (i
= 0; i
< instructions_to_print
; i
++) {
627 #if !defined(CONFIG_BOOKE)
628 /* If executing with the IMMU off, adjust pc rather
629 * than print XXXXXXXX.
631 if (!(regs
->msr
& MSR_IR
))
632 pc
= (unsigned long)phys_to_virt(pc
);
635 /* We use __get_user here *only* to avoid an OOPS on a
636 * bad address because the pc *should* only be a
639 if (!__kernel_text_address(pc
) ||
640 __get_user(instr
, (unsigned int __user
*)pc
)) {
641 printk(KERN_CONT
"XXXXXXXX ");
644 printk(KERN_CONT
"<%08x> ", instr
);
646 printk(KERN_CONT
"%08x ", instr
);
655 static struct regbit
{
659 #if defined(CONFIG_PPC64) && !defined(CONFIG_BOOKE)
688 static void printbits(unsigned long val
, struct regbit
*bits
)
690 const char *sep
= "";
693 for (; bits
->bit
; ++bits
)
694 if (val
& bits
->bit
) {
695 printk("%s%s", sep
, bits
->name
);
703 #define REGS_PER_LINE 4
704 #define LAST_VOLATILE 13
707 #define REGS_PER_LINE 8
708 #define LAST_VOLATILE 12
711 void show_regs(struct pt_regs
* regs
)
715 printk("NIP: "REG
" LR: "REG
" CTR: "REG
"\n",
716 regs
->nip
, regs
->link
, regs
->ctr
);
717 printk("REGS: %p TRAP: %04lx %s (%s)\n",
718 regs
, regs
->trap
, print_tainted(), init_utsname()->release
);
719 printk("MSR: "REG
" ", regs
->msr
);
720 printbits(regs
->msr
, msr_bits
);
721 printk(" CR: %08lx XER: %08lx\n", regs
->ccr
, regs
->xer
);
723 printk("SOFTE: %ld\n", regs
->softe
);
726 if ((regs
->trap
!= 0xc00) && cpu_has_feature(CPU_FTR_CFAR
))
727 printk("CFAR: "REG
"\n", regs
->orig_gpr3
);
728 if (trap
== 0x300 || trap
== 0x600)
729 #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
730 printk("DEAR: "REG
", ESR: "REG
"\n", regs
->dar
, regs
->dsisr
);
732 printk("DAR: "REG
", DSISR: %08lx\n", regs
->dar
, regs
->dsisr
);
734 printk("TASK = %p[%d] '%s' THREAD: %p",
735 current
, task_pid_nr(current
), current
->comm
, task_thread_info(current
));
738 printk(" CPU: %d", raw_smp_processor_id());
739 #endif /* CONFIG_SMP */
741 for (i
= 0; i
< 32; i
++) {
742 if ((i
% REGS_PER_LINE
) == 0)
743 printk("\nGPR%02d: ", i
);
744 printk(REG
" ", regs
->gpr
[i
]);
745 if (i
== LAST_VOLATILE
&& !FULL_REGS(regs
))
749 #ifdef CONFIG_KALLSYMS
751 * Lookup NIP late so we have the best change of getting the
752 * above info out without failing
754 printk("NIP ["REG
"] %pS\n", regs
->nip
, (void *)regs
->nip
);
755 printk("LR ["REG
"] %pS\n", regs
->link
, (void *)regs
->link
);
757 show_stack(current
, (unsigned long *) regs
->gpr
[1]);
758 if (!user_mode(regs
))
759 show_instructions(regs
);
762 void exit_thread(void)
764 discard_lazy_cpu_state();
767 void flush_thread(void)
769 discard_lazy_cpu_state();
771 #ifdef CONFIG_HAVE_HW_BREAKPOINT
772 flush_ptrace_hw_breakpoint(current
);
773 #else /* CONFIG_HAVE_HW_BREAKPOINT */
774 set_debug_reg_defaults(¤t
->thread
);
775 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
779 release_thread(struct task_struct
*t
)
784 * this gets called so that we can store coprocessor state into memory and
785 * copy the current task into the new thread.
787 int arch_dup_task_struct(struct task_struct
*dst
, struct task_struct
*src
)
789 flush_fp_to_thread(src
);
790 flush_altivec_to_thread(src
);
791 flush_vsx_to_thread(src
);
792 flush_spe_to_thread(src
);
793 #ifdef CONFIG_HAVE_HW_BREAKPOINT
794 flush_ptrace_hw_breakpoint(src
);
795 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
804 extern unsigned long dscr_default
; /* defined in arch/powerpc/kernel/sysfs.c */
806 int copy_thread(unsigned long clone_flags
, unsigned long usp
,
807 unsigned long arg
, struct task_struct
*p
)
809 struct pt_regs
*childregs
, *kregs
;
810 extern void ret_from_fork(void);
811 extern void ret_from_kernel_thread(void);
813 unsigned long sp
= (unsigned long)task_stack_page(p
) + THREAD_SIZE
;
816 sp
-= sizeof(struct pt_regs
);
817 childregs
= (struct pt_regs
*) sp
;
818 if (unlikely(p
->flags
& PF_KTHREAD
)) {
819 struct thread_info
*ti
= (void *)task_stack_page(p
);
820 memset(childregs
, 0, sizeof(struct pt_regs
));
821 childregs
->gpr
[1] = sp
+ sizeof(struct pt_regs
);
822 childregs
->gpr
[14] = usp
; /* function */
824 clear_tsk_thread_flag(p
, TIF_32BIT
);
825 childregs
->softe
= 1;
827 childregs
->gpr
[15] = arg
;
828 p
->thread
.regs
= NULL
; /* no user register state */
829 ti
->flags
|= _TIF_RESTOREALL
;
830 f
= ret_from_kernel_thread
;
832 struct pt_regs
*regs
= current_pt_regs();
833 CHECK_FULL_REGS(regs
);
836 childregs
->gpr
[1] = usp
;
837 p
->thread
.regs
= childregs
;
838 childregs
->gpr
[3] = 0; /* Result from fork() */
839 if (clone_flags
& CLONE_SETTLS
) {
841 if (!is_32bit_task())
842 childregs
->gpr
[13] = childregs
->gpr
[6];
845 childregs
->gpr
[2] = childregs
->gpr
[6];
850 sp
-= STACK_FRAME_OVERHEAD
;
853 * The way this works is that at some point in the future
854 * some task will call _switch to switch to the new task.
855 * That will pop off the stack frame created below and start
856 * the new task running at ret_from_fork. The new task will
857 * do some house keeping and then return from the fork or clone
858 * system call, using the stack frame created above.
860 sp
-= sizeof(struct pt_regs
);
861 kregs
= (struct pt_regs
*) sp
;
862 sp
-= STACK_FRAME_OVERHEAD
;
864 p
->thread
.ksp_limit
= (unsigned long)task_stack_page(p
) +
865 _ALIGN_UP(sizeof(struct thread_info
), 16);
867 #ifdef CONFIG_PPC_STD_MMU_64
868 if (mmu_has_feature(MMU_FTR_SLB
)) {
869 unsigned long sp_vsid
;
870 unsigned long llp
= mmu_psize_defs
[mmu_linear_psize
].sllp
;
872 if (mmu_has_feature(MMU_FTR_1T_SEGMENT
))
873 sp_vsid
= get_kernel_vsid(sp
, MMU_SEGSIZE_1T
)
874 << SLB_VSID_SHIFT_1T
;
876 sp_vsid
= get_kernel_vsid(sp
, MMU_SEGSIZE_256M
)
878 sp_vsid
|= SLB_VSID_KERNEL
| llp
;
879 p
->thread
.ksp_vsid
= sp_vsid
;
881 #endif /* CONFIG_PPC_STD_MMU_64 */
883 if (cpu_has_feature(CPU_FTR_DSCR
)) {
884 p
->thread
.dscr_inherit
= current
->thread
.dscr_inherit
;
885 p
->thread
.dscr
= current
->thread
.dscr
;
887 if (cpu_has_feature(CPU_FTR_HAS_PPR
))
888 p
->thread
.ppr
= INIT_PPR
;
891 * The PPC64 ABI makes use of a TOC to contain function
892 * pointers. The function (ret_from_except) is actually a pointer
893 * to the TOC entry. The first entry is a pointer to the actual
897 kregs
->nip
= *((unsigned long *)f
);
899 kregs
->nip
= (unsigned long)f
;
905 * Set up a thread for executing a new program
907 void start_thread(struct pt_regs
*regs
, unsigned long start
, unsigned long sp
)
910 unsigned long load_addr
= regs
->gpr
[2]; /* saved by ELF_PLAT_INIT */
914 * If we exec out of a kernel thread then thread.regs will not be
917 if (!current
->thread
.regs
) {
918 struct pt_regs
*regs
= task_stack_page(current
) + THREAD_SIZE
;
919 current
->thread
.regs
= regs
- 1;
922 memset(regs
->gpr
, 0, sizeof(regs
->gpr
));
930 * We have just cleared all the nonvolatile GPRs, so make
931 * FULL_REGS(regs) return true. This is necessary to allow
932 * ptrace to examine the thread immediately after exec.
939 regs
->msr
= MSR_USER
;
941 if (!is_32bit_task()) {
942 unsigned long entry
, toc
;
944 /* start is a relocated pointer to the function descriptor for
945 * the elf _start routine. The first entry in the function
946 * descriptor is the entry address of _start and the second
947 * entry is the TOC value we need to use.
949 __get_user(entry
, (unsigned long __user
*)start
);
950 __get_user(toc
, (unsigned long __user
*)start
+1);
952 /* Check whether the e_entry function descriptor entries
953 * need to be relocated before we can use them.
955 if (load_addr
!= 0) {
961 regs
->msr
= MSR_USER64
;
965 regs
->msr
= MSR_USER32
;
969 discard_lazy_cpu_state();
971 current
->thread
.used_vsr
= 0;
973 memset(current
->thread
.fpr
, 0, sizeof(current
->thread
.fpr
));
974 current
->thread
.fpscr
.val
= 0;
975 #ifdef CONFIG_ALTIVEC
976 memset(current
->thread
.vr
, 0, sizeof(current
->thread
.vr
));
977 memset(¤t
->thread
.vscr
, 0, sizeof(current
->thread
.vscr
));
978 current
->thread
.vscr
.u
[3] = 0x00010000; /* Java mode disabled */
979 current
->thread
.vrsave
= 0;
980 current
->thread
.used_vr
= 0;
981 #endif /* CONFIG_ALTIVEC */
983 memset(current
->thread
.evr
, 0, sizeof(current
->thread
.evr
));
984 current
->thread
.acc
= 0;
985 current
->thread
.spefscr
= 0;
986 current
->thread
.used_spe
= 0;
987 #endif /* CONFIG_SPE */
990 #define PR_FP_ALL_EXCEPT (PR_FP_EXC_DIV | PR_FP_EXC_OVF | PR_FP_EXC_UND \
991 | PR_FP_EXC_RES | PR_FP_EXC_INV)
993 int set_fpexc_mode(struct task_struct
*tsk
, unsigned int val
)
995 struct pt_regs
*regs
= tsk
->thread
.regs
;
997 /* This is a bit hairy. If we are an SPE enabled processor
998 * (have embedded fp) we store the IEEE exception enable flags in
999 * fpexc_mode. fpexc_mode is also used for setting FP exception
1000 * mode (asyn, precise, disabled) for 'Classic' FP. */
1001 if (val
& PR_FP_EXC_SW_ENABLE
) {
1003 if (cpu_has_feature(CPU_FTR_SPE
)) {
1004 tsk
->thread
.fpexc_mode
= val
&
1005 (PR_FP_EXC_SW_ENABLE
| PR_FP_ALL_EXCEPT
);
1015 /* on a CONFIG_SPE this does not hurt us. The bits that
1016 * __pack_fe01 use do not overlap with bits used for
1017 * PR_FP_EXC_SW_ENABLE. Additionally, the MSR[FE0,FE1] bits
1018 * on CONFIG_SPE implementations are reserved so writing to
1019 * them does not change anything */
1020 if (val
> PR_FP_EXC_PRECISE
)
1022 tsk
->thread
.fpexc_mode
= __pack_fe01(val
);
1023 if (regs
!= NULL
&& (regs
->msr
& MSR_FP
) != 0)
1024 regs
->msr
= (regs
->msr
& ~(MSR_FE0
|MSR_FE1
))
1025 | tsk
->thread
.fpexc_mode
;
1029 int get_fpexc_mode(struct task_struct
*tsk
, unsigned long adr
)
1033 if (tsk
->thread
.fpexc_mode
& PR_FP_EXC_SW_ENABLE
)
1035 if (cpu_has_feature(CPU_FTR_SPE
))
1036 val
= tsk
->thread
.fpexc_mode
;
1043 val
= __unpack_fe01(tsk
->thread
.fpexc_mode
);
1044 return put_user(val
, (unsigned int __user
*) adr
);
1047 int set_endian(struct task_struct
*tsk
, unsigned int val
)
1049 struct pt_regs
*regs
= tsk
->thread
.regs
;
1051 if ((val
== PR_ENDIAN_LITTLE
&& !cpu_has_feature(CPU_FTR_REAL_LE
)) ||
1052 (val
== PR_ENDIAN_PPC_LITTLE
&& !cpu_has_feature(CPU_FTR_PPC_LE
)))
1058 if (val
== PR_ENDIAN_BIG
)
1059 regs
->msr
&= ~MSR_LE
;
1060 else if (val
== PR_ENDIAN_LITTLE
|| val
== PR_ENDIAN_PPC_LITTLE
)
1061 regs
->msr
|= MSR_LE
;
1068 int get_endian(struct task_struct
*tsk
, unsigned long adr
)
1070 struct pt_regs
*regs
= tsk
->thread
.regs
;
1073 if (!cpu_has_feature(CPU_FTR_PPC_LE
) &&
1074 !cpu_has_feature(CPU_FTR_REAL_LE
))
1080 if (regs
->msr
& MSR_LE
) {
1081 if (cpu_has_feature(CPU_FTR_REAL_LE
))
1082 val
= PR_ENDIAN_LITTLE
;
1084 val
= PR_ENDIAN_PPC_LITTLE
;
1086 val
= PR_ENDIAN_BIG
;
1088 return put_user(val
, (unsigned int __user
*)adr
);
1091 int set_unalign_ctl(struct task_struct
*tsk
, unsigned int val
)
1093 tsk
->thread
.align_ctl
= val
;
1097 int get_unalign_ctl(struct task_struct
*tsk
, unsigned long adr
)
1099 return put_user(tsk
->thread
.align_ctl
, (unsigned int __user
*)adr
);
1102 static inline int valid_irq_stack(unsigned long sp
, struct task_struct
*p
,
1103 unsigned long nbytes
)
1105 unsigned long stack_page
;
1106 unsigned long cpu
= task_cpu(p
);
1109 * Avoid crashing if the stack has overflowed and corrupted
1110 * task_cpu(p), which is in the thread_info struct.
1112 if (cpu
< NR_CPUS
&& cpu_possible(cpu
)) {
1113 stack_page
= (unsigned long) hardirq_ctx
[cpu
];
1114 if (sp
>= stack_page
+ sizeof(struct thread_struct
)
1115 && sp
<= stack_page
+ THREAD_SIZE
- nbytes
)
1118 stack_page
= (unsigned long) softirq_ctx
[cpu
];
1119 if (sp
>= stack_page
+ sizeof(struct thread_struct
)
1120 && sp
<= stack_page
+ THREAD_SIZE
- nbytes
)
1126 int validate_sp(unsigned long sp
, struct task_struct
*p
,
1127 unsigned long nbytes
)
1129 unsigned long stack_page
= (unsigned long)task_stack_page(p
);
1131 if (sp
>= stack_page
+ sizeof(struct thread_struct
)
1132 && sp
<= stack_page
+ THREAD_SIZE
- nbytes
)
1135 return valid_irq_stack(sp
, p
, nbytes
);
1138 EXPORT_SYMBOL(validate_sp
);
1140 unsigned long get_wchan(struct task_struct
*p
)
1142 unsigned long ip
, sp
;
1145 if (!p
|| p
== current
|| p
->state
== TASK_RUNNING
)
1149 if (!validate_sp(sp
, p
, STACK_FRAME_OVERHEAD
))
1153 sp
= *(unsigned long *)sp
;
1154 if (!validate_sp(sp
, p
, STACK_FRAME_OVERHEAD
))
1157 ip
= ((unsigned long *)sp
)[STACK_FRAME_LR_SAVE
];
1158 if (!in_sched_functions(ip
))
1161 } while (count
++ < 16);
1165 static int kstack_depth_to_print
= CONFIG_PRINT_STACK_DEPTH
;
1167 void show_stack(struct task_struct
*tsk
, unsigned long *stack
)
1169 unsigned long sp
, ip
, lr
, newsp
;
1172 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
1173 int curr_frame
= current
->curr_ret_stack
;
1174 extern void return_to_handler(void);
1175 unsigned long rth
= (unsigned long)return_to_handler
;
1176 unsigned long mrth
= -1;
1178 extern void mod_return_to_handler(void);
1179 rth
= *(unsigned long *)rth
;
1180 mrth
= (unsigned long)mod_return_to_handler
;
1181 mrth
= *(unsigned long *)mrth
;
1185 sp
= (unsigned long) stack
;
1190 asm("mr %0,1" : "=r" (sp
));
1192 sp
= tsk
->thread
.ksp
;
1196 printk("Call Trace:\n");
1198 if (!validate_sp(sp
, tsk
, STACK_FRAME_OVERHEAD
))
1201 stack
= (unsigned long *) sp
;
1203 ip
= stack
[STACK_FRAME_LR_SAVE
];
1204 if (!firstframe
|| ip
!= lr
) {
1205 printk("["REG
"] ["REG
"] %pS", sp
, ip
, (void *)ip
);
1206 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
1207 if ((ip
== rth
|| ip
== mrth
) && curr_frame
>= 0) {
1209 (void *)current
->ret_stack
[curr_frame
].ret
);
1214 printk(" (unreliable)");
1220 * See if this is an exception frame.
1221 * We look for the "regshere" marker in the current frame.
1223 if (validate_sp(sp
, tsk
, STACK_INT_FRAME_SIZE
)
1224 && stack
[STACK_FRAME_MARKER
] == STACK_FRAME_REGS_MARKER
) {
1225 struct pt_regs
*regs
= (struct pt_regs
*)
1226 (sp
+ STACK_FRAME_OVERHEAD
);
1228 printk("--- Exception: %lx at %pS\n LR = %pS\n",
1229 regs
->trap
, (void *)regs
->nip
, (void *)lr
);
1234 } while (count
++ < kstack_depth_to_print
);
1237 void dump_stack(void)
1239 show_stack(current
, NULL
);
1241 EXPORT_SYMBOL(dump_stack
);
1244 /* Called with hard IRQs off */
1245 void __ppc64_runlatch_on(void)
1247 struct thread_info
*ti
= current_thread_info();
1250 ctrl
= mfspr(SPRN_CTRLF
);
1251 ctrl
|= CTRL_RUNLATCH
;
1252 mtspr(SPRN_CTRLT
, ctrl
);
1254 ti
->local_flags
|= _TLF_RUNLATCH
;
1257 /* Called with hard IRQs off */
1258 void __ppc64_runlatch_off(void)
1260 struct thread_info
*ti
= current_thread_info();
1263 ti
->local_flags
&= ~_TLF_RUNLATCH
;
1265 ctrl
= mfspr(SPRN_CTRLF
);
1266 ctrl
&= ~CTRL_RUNLATCH
;
1267 mtspr(SPRN_CTRLT
, ctrl
);
1269 #endif /* CONFIG_PPC64 */
1271 unsigned long arch_align_stack(unsigned long sp
)
1273 if (!(current
->personality
& ADDR_NO_RANDOMIZE
) && randomize_va_space
)
1274 sp
-= get_random_int() & ~PAGE_MASK
;
1278 static inline unsigned long brk_rnd(void)
1280 unsigned long rnd
= 0;
1282 /* 8MB for 32bit, 1GB for 64bit */
1283 if (is_32bit_task())
1284 rnd
= (long)(get_random_int() % (1<<(23-PAGE_SHIFT
)));
1286 rnd
= (long)(get_random_int() % (1<<(30-PAGE_SHIFT
)));
1288 return rnd
<< PAGE_SHIFT
;
1291 unsigned long arch_randomize_brk(struct mm_struct
*mm
)
1293 unsigned long base
= mm
->brk
;
1296 #ifdef CONFIG_PPC_STD_MMU_64
1298 * If we are using 1TB segments and we are allowed to randomise
1299 * the heap, we can put it above 1TB so it is backed by a 1TB
1300 * segment. Otherwise the heap will be in the bottom 1TB
1301 * which always uses 256MB segments and this may result in a
1302 * performance penalty.
1304 if (!is_32bit_task() && (mmu_highuser_ssize
== MMU_SEGSIZE_1T
))
1305 base
= max_t(unsigned long, mm
->brk
, 1UL << SID_SHIFT_1T
);
1308 ret
= PAGE_ALIGN(base
+ brk_rnd());
1316 unsigned long randomize_et_dyn(unsigned long base
)
1318 unsigned long ret
= PAGE_ALIGN(base
+ brk_rnd());