arch/powerpc/kernel/rtas_pci.c

   1 /*
   2  * Copyright (C) 2001 Dave Engebretsen, IBM Corporation
   3  * Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM
   4  *
   5  * RTAS specific routines for PCI.
   6  *
   7  * Based on code from pci.c, chrp_pci.c and pSeries_pci.c
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License, or
  12  * (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  22  */
  23
  24 #include <linux/kernel.h>
  25 #include <linux/threads.h>
  26 #include <linux/pci.h>
  27 #include <linux/string.h>
  28 #include <linux/init.h>
  29
  30 #include <asm/io.h>
  31 #include <asm/pgtable.h>
  32 #include <asm/irq.h>
  33 #include <asm/prom.h>
  34 #include <asm/machdep.h>
  35 #include <asm/pci-bridge.h>
  36 #include <asm/iommu.h>
  37 #include <asm/rtas.h>
  38 #include <asm/mpic.h>
  39 #include <asm/ppc-pci.h>
  40 #include <asm/eeh.h>
  41
  42 /* RTAS tokens */
  43 static int read_pci_config;
  44 static int write_pci_config;
  45 static int ibm_read_pci_config;
  46 static int ibm_write_pci_config;
  47
  48 static inline int config_access_valid(struct pci_dn *dn, int where)
  49 {
  50         if (where < 256)
  51                 return 1;
  52         if (where < 4096 && dn->pci_ext_config_space)
  53                 return 1;
  54
  55         return 0;
  56 }
  57
  58 int rtas_read_config(struct pci_dn *pdn, int where, int size, u32 *val)
  59 {
  60         int returnval = -1;
  61         unsigned long buid, addr;
  62         int ret;
  63
  64         if (!pdn)
  65                 return PCIBIOS_DEVICE_NOT_FOUND;
  66         if (!config_access_valid(pdn, where))
  67                 return PCIBIOS_BAD_REGISTER_NUMBER;
  68 #ifdef CONFIG_EEH
  69         if (pdn->edev && pdn->edev->pe &&
  70             (pdn->edev->pe->state & EEH_PE_CFG_BLOCKED))
  71                 return PCIBIOS_SET_FAILED;
  72 #endif
  73
  74         addr = rtas_config_addr(pdn->busno, pdn->devfn, where);
  75         buid = pdn->phb->buid;
  76         if (buid) {
  77                 ret = rtas_call(ibm_read_pci_config, 4, 2, &returnval,
  78                                 addr, BUID_HI(buid), BUID_LO(buid), size);
  79         } else {
  80                 ret = rtas_call(read_pci_config, 2, 2, &returnval, addr, size);
  81         }
  82         *val = returnval;
  83
  84         if (ret)
  85                 return PCIBIOS_DEVICE_NOT_FOUND;
  86
  87         return PCIBIOS_SUCCESSFUL;
  88 }
  89
  90 static int rtas_pci_read_config(struct pci_bus *bus,
  91                                 unsigned int devfn,
  92                                 int where, int size, u32 *val)
  93 {
  94         struct pci_dn *pdn;
  95         int ret;
  96
  97         *val = 0xFFFFFFFF;
  98
  99         pdn = pci_get_pdn_by_devfn(bus, devfn);
 100
 101         /* Validity of pdn is checked in here */
 102         ret = rtas_read_config(pdn, where, size, val);
 103         if (*val == EEH_IO_ERROR_VALUE(size) &&
 104             eeh_dev_check_failure(pdn_to_eeh_dev(pdn)))
 105                 return PCIBIOS_DEVICE_NOT_FOUND;
 106
 107         return ret;
 108 }
 109
 110 int rtas_write_config(struct pci_dn *pdn, int where, int size, u32 val)
 111 {
 112         unsigned long buid, addr;
 113         int ret;
 114
 115         if (!pdn)
 116                 return PCIBIOS_DEVICE_NOT_FOUND;
 117         if (!config_access_valid(pdn, where))
 118                 return PCIBIOS_BAD_REGISTER_NUMBER;
 119 #ifdef CONFIG_EEH
 120         if (pdn->edev && pdn->edev->pe &&
 121             (pdn->edev->pe->state & EEH_PE_CFG_BLOCKED))
 122                 return PCIBIOS_SET_FAILED;
 123 #endif
 124
 125         addr = rtas_config_addr(pdn->busno, pdn->devfn, where);
 126         buid = pdn->phb->buid;
 127         if (buid) {
 128                 ret = rtas_call(ibm_write_pci_config, 5, 1, NULL, addr,
 129                         BUID_HI(buid), BUID_LO(buid), size, (ulong) val);
 130         } else {
 131                 ret = rtas_call(write_pci_config, 3, 1, NULL, addr, size, (ulong)val);
 132         }
 133
 134         if (ret)
 135                 return PCIBIOS_DEVICE_NOT_FOUND;
 136
 137         return PCIBIOS_SUCCESSFUL;
 138 }
 139
 140 static int rtas_pci_write_config(struct pci_bus *bus,
 141                                  unsigned int devfn,
 142                                  int where, int size, u32 val)
 143 {
 144         struct pci_dn *pdn;
 145
 146         pdn = pci_get_pdn_by_devfn(bus, devfn);
 147
 148         /* Validity of pdn is checked in here. */
 149         return rtas_write_config(pdn, where, size, val);
 150 }
 151
 152 static struct pci_ops rtas_pci_ops = {
 153         .read = rtas_pci_read_config,
 154         .write = rtas_pci_write_config,
 155 };
 156
 157 static int is_python(struct device_node *dev)
 158 {
 159         const char *model = of_get_property(dev, "model", NULL);
 160
 161         if (model && strstr(model, "Python"))
 162                 return 1;
 163
 164         return 0;
 165 }
 166
 167 static void python_countermeasures(struct device_node *dev)
 168 {
 169         struct resource registers;
 170         void __iomem *chip_regs;
 171         volatile u32 val;
 172
 173         if (of_address_to_resource(dev, 0, &registers)) {
 174                 printk(KERN_ERR "Can't get address for Python workarounds !\n");
 175                 return;
 176         }
 177
 178         /* Python's register file is 1 MB in size. */
 179         chip_regs = ioremap(registers.start & ~(0xfffffUL), 0x100000);
 180
 181         /*
 182          * Firmware doesn't always clear this bit which is critical
 183          * for good performance - Anton
 184          */
 185
 186 #define PRG_CL_RESET_VALID 0x00010000
 187
 188         val = in_be32(chip_regs + 0xf6030);
 189         if (val & PRG_CL_RESET_VALID) {
 190                 printk(KERN_INFO "Python workaround: ");
 191                 val &= ~PRG_CL_RESET_VALID;
 192                 out_be32(chip_regs + 0xf6030, val);
 193                 /*
 194                  * We must read it back for changes to
 195                  * take effect
 196                  */
 197                 val = in_be32(chip_regs + 0xf6030);
 198                 printk("reg0: %x\n", val);
 199         }
 200
 201         iounmap(chip_regs);
 202 }
 203
 204 void __init init_pci_config_tokens(void)
 205 {
 206         read_pci_config = rtas_token("read-pci-config");
 207         write_pci_config = rtas_token("write-pci-config");
 208         ibm_read_pci_config = rtas_token("ibm,read-pci-config");
 209         ibm_write_pci_config = rtas_token("ibm,write-pci-config");
 210 }
 211
 212 unsigned long get_phb_buid(struct device_node *phb)
 213 {
 214         struct resource r;
 215
 216         if (ibm_read_pci_config == -1)
 217                 return 0;
 218         if (of_address_to_resource(phb, 0, &r))
 219                 return 0;
 220         return r.start;
 221 }
 222
 223 static int phb_set_bus_ranges(struct device_node *dev,
 224                               struct pci_controller *phb)
 225 {
 226         const __be32 *bus_range;
 227         unsigned int len;
 228
 229         bus_range = of_get_property(dev, "bus-range", &len);
 230         if (bus_range == NULL || len < 2 * sizeof(int)) {
 231                 return 1;
 232         }
 233
 234         phb->first_busno = be32_to_cpu(bus_range[0]);
 235         phb->last_busno  = be32_to_cpu(bus_range[1]);
 236
 237         return 0;
 238 }
 239
 240 int rtas_setup_phb(struct pci_controller *phb)
 241 {
 242         struct device_node *dev = phb->dn;
 243
 244         if (is_python(dev))
 245                 python_countermeasures(dev);
 246
 247         if (phb_set_bus_ranges(dev, phb))
 248                 return 1;
 249
 250         phb->ops = &rtas_pci_ops;
 251         phb->buid = get_phb_buid(dev);
 252
 253         return 0;
 254 }