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1 // SPDX-License-Identifier: GPL-2.0+
2 //
3 // Security related flags and so on.
4 //
5 // Copyright 2018, Michael Ellerman, IBM Corporation.
6
7 #include <linux/kernel.h>
8 #include <linux/device.h>
9 #include <linux/seq_buf.h>
10
11 #include <asm/asm-prototypes.h>
12 #include <asm/code-patching.h>
13 #include <asm/debugfs.h>
14 #include <asm/security_features.h>
15 #include <asm/setup.h>
16
17
18 unsigned long powerpc_security_features __read_mostly = SEC_FTR_DEFAULT;
19
20 enum count_cache_flush_type {
21 COUNT_CACHE_FLUSH_NONE = 0x1,
22 COUNT_CACHE_FLUSH_SW = 0x2,
23 COUNT_CACHE_FLUSH_HW = 0x4,
24 };
25 static enum count_cache_flush_type count_cache_flush_type = COUNT_CACHE_FLUSH_NONE;
26
27 bool barrier_nospec_enabled;
28 static bool no_nospec;
29 static bool btb_flush_enabled;
30 #ifdef CONFIG_PPC_FSL_BOOK3E
31 static bool no_spectrev2;
32 #endif
33
34 static void enable_barrier_nospec(bool enable)
35 {
36 barrier_nospec_enabled = enable;
37 do_barrier_nospec_fixups(enable);
38 }
39
40 void setup_barrier_nospec(void)
41 {
42 bool enable;
43
44 /*
45 * It would make sense to check SEC_FTR_SPEC_BAR_ORI31 below as well.
46 * But there's a good reason not to. The two flags we check below are
47 * both are enabled by default in the kernel, so if the hcall is not
48 * functional they will be enabled.
49 * On a system where the host firmware has been updated (so the ori
50 * functions as a barrier), but on which the hypervisor (KVM/Qemu) has
51 * not been updated, we would like to enable the barrier. Dropping the
52 * check for SEC_FTR_SPEC_BAR_ORI31 achieves that. The only downside is
53 * we potentially enable the barrier on systems where the host firmware
54 * is not updated, but that's harmless as it's a no-op.
55 */
56 enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) &&
57 security_ftr_enabled(SEC_FTR_BNDS_CHK_SPEC_BAR);
58
59 if (!no_nospec)
60 enable_barrier_nospec(enable);
61 }
62
63 static int __init handle_nospectre_v1(char *p)
64 {
65 no_nospec = true;
66
67 return 0;
68 }
69 early_param("nospectre_v1", handle_nospectre_v1);
70
71 #ifdef CONFIG_DEBUG_FS
72 static int barrier_nospec_set(void *data, u64 val)
73 {
74 switch (val) {
75 case 0:
76 case 1:
77 break;
78 default:
79 return -EINVAL;
80 }
81
82 if (!!val == !!barrier_nospec_enabled)
83 return 0;
84
85 enable_barrier_nospec(!!val);
86
87 return 0;
88 }
89
90 static int barrier_nospec_get(void *data, u64 *val)
91 {
92 *val = barrier_nospec_enabled ? 1 : 0;
93 return 0;
94 }
95
96 DEFINE_SIMPLE_ATTRIBUTE(fops_barrier_nospec,
97 barrier_nospec_get, barrier_nospec_set, "%llu\n");
98
99 static __init int barrier_nospec_debugfs_init(void)
100 {
101 debugfs_create_file("barrier_nospec", 0600, powerpc_debugfs_root, NULL,
102 &fops_barrier_nospec);
103 return 0;
104 }
105 device_initcall(barrier_nospec_debugfs_init);
106 #endif /* CONFIG_DEBUG_FS */
107
108 #ifdef CONFIG_PPC_FSL_BOOK3E
109 static int __init handle_nospectre_v2(char *p)
110 {
111 no_spectrev2 = true;
112
113 return 0;
114 }
115 early_param("nospectre_v2", handle_nospectre_v2);
116 void setup_spectre_v2(void)
117 {
118 if (no_spectrev2)
119 do_btb_flush_fixups();
120 else
121 btb_flush_enabled = true;
122 }
123 #endif /* CONFIG_PPC_FSL_BOOK3E */
124
125 #ifdef CONFIG_PPC_BOOK3S_64
126 ssize_t cpu_show_meltdown(struct device *dev, struct device_attribute *attr, char *buf)
127 {
128 bool thread_priv;
129
130 thread_priv = security_ftr_enabled(SEC_FTR_L1D_THREAD_PRIV);
131
132 if (rfi_flush || thread_priv) {
133 struct seq_buf s;
134 seq_buf_init(&s, buf, PAGE_SIZE - 1);
135
136 seq_buf_printf(&s, "Mitigation: ");
137
138 if (rfi_flush)
139 seq_buf_printf(&s, "RFI Flush");
140
141 if (rfi_flush && thread_priv)
142 seq_buf_printf(&s, ", ");
143
144 if (thread_priv)
145 seq_buf_printf(&s, "L1D private per thread");
146
147 seq_buf_printf(&s, "\n");
148
149 return s.len;
150 }
151
152 if (!security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV) &&
153 !security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR))
154 return sprintf(buf, "Not affected\n");
155
156 return sprintf(buf, "Vulnerable\n");
157 }
158 #endif
159
160 ssize_t cpu_show_spectre_v1(struct device *dev, struct device_attribute *attr, char *buf)
161 {
162 struct seq_buf s;
163
164 seq_buf_init(&s, buf, PAGE_SIZE - 1);
165
166 if (security_ftr_enabled(SEC_FTR_BNDS_CHK_SPEC_BAR)) {
167 if (barrier_nospec_enabled)
168 seq_buf_printf(&s, "Mitigation: __user pointer sanitization");
169 else
170 seq_buf_printf(&s, "Vulnerable");
171
172 if (security_ftr_enabled(SEC_FTR_SPEC_BAR_ORI31))
173 seq_buf_printf(&s, ", ori31 speculation barrier enabled");
174
175 seq_buf_printf(&s, "\n");
176 } else
177 seq_buf_printf(&s, "Not affected\n");
178
179 return s.len;
180 }
181
182 ssize_t cpu_show_spectre_v2(struct device *dev, struct device_attribute *attr, char *buf)
183 {
184 struct seq_buf s;
185 bool bcs, ccd;
186
187 seq_buf_init(&s, buf, PAGE_SIZE - 1);
188
189 bcs = security_ftr_enabled(SEC_FTR_BCCTRL_SERIALISED);
190 ccd = security_ftr_enabled(SEC_FTR_COUNT_CACHE_DISABLED);
191
192 if (bcs || ccd) {
193 seq_buf_printf(&s, "Mitigation: ");
194
195 if (bcs)
196 seq_buf_printf(&s, "Indirect branch serialisation (kernel only)");
197
198 if (bcs && ccd)
199 seq_buf_printf(&s, ", ");
200
201 if (ccd)
202 seq_buf_printf(&s, "Indirect branch cache disabled");
203 } else if (count_cache_flush_type != COUNT_CACHE_FLUSH_NONE) {
204 seq_buf_printf(&s, "Mitigation: Software count cache flush");
205
206 if (count_cache_flush_type == COUNT_CACHE_FLUSH_HW)
207 seq_buf_printf(&s, " (hardware accelerated)");
208 } else if (btb_flush_enabled) {
209 seq_buf_printf(&s, "Mitigation: Branch predictor state flush");
210 } else {
211 seq_buf_printf(&s, "Vulnerable");
212 }
213
214 seq_buf_printf(&s, "\n");
215
216 return s.len;
217 }
218
219 #ifdef CONFIG_PPC_BOOK3S_64
220 /*
221 * Store-forwarding barrier support.
222 */
223
224 static enum stf_barrier_type stf_enabled_flush_types;
225 static bool no_stf_barrier;
226 bool stf_barrier;
227
228 static int __init handle_no_stf_barrier(char *p)
229 {
230 pr_info("stf-barrier: disabled on command line.");
231 no_stf_barrier = true;
232 return 0;
233 }
234
235 early_param("no_stf_barrier", handle_no_stf_barrier);
236
237 /* This is the generic flag used by other architectures */
238 static int __init handle_ssbd(char *p)
239 {
240 if (!p || strncmp(p, "auto", 5) == 0 || strncmp(p, "on", 2) == 0 ) {
241 /* Until firmware tells us, we have the barrier with auto */
242 return 0;
243 } else if (strncmp(p, "off", 3) == 0) {
244 handle_no_stf_barrier(NULL);
245 return 0;
246 } else
247 return 1;
248
249 return 0;
250 }
251 early_param("spec_store_bypass_disable", handle_ssbd);
252
253 /* This is the generic flag used by other architectures */
254 static int __init handle_no_ssbd(char *p)
255 {
256 handle_no_stf_barrier(NULL);
257 return 0;
258 }
259 early_param("nospec_store_bypass_disable", handle_no_ssbd);
260
261 static void stf_barrier_enable(bool enable)
262 {
263 if (enable)
264 do_stf_barrier_fixups(stf_enabled_flush_types);
265 else
266 do_stf_barrier_fixups(STF_BARRIER_NONE);
267
268 stf_barrier = enable;
269 }
270
271 void setup_stf_barrier(void)
272 {
273 enum stf_barrier_type type;
274 bool enable, hv;
275
276 hv = cpu_has_feature(CPU_FTR_HVMODE);
277
278 /* Default to fallback in case fw-features are not available */
279 if (cpu_has_feature(CPU_FTR_ARCH_300))
280 type = STF_BARRIER_EIEIO;
281 else if (cpu_has_feature(CPU_FTR_ARCH_207S))
282 type = STF_BARRIER_SYNC_ORI;
283 else if (cpu_has_feature(CPU_FTR_ARCH_206))
284 type = STF_BARRIER_FALLBACK;
285 else
286 type = STF_BARRIER_NONE;
287
288 enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) &&
289 (security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR) ||
290 (security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV) && hv));
291
292 if (type == STF_BARRIER_FALLBACK) {
293 pr_info("stf-barrier: fallback barrier available\n");
294 } else if (type == STF_BARRIER_SYNC_ORI) {
295 pr_info("stf-barrier: hwsync barrier available\n");
296 } else if (type == STF_BARRIER_EIEIO) {
297 pr_info("stf-barrier: eieio barrier available\n");
298 }
299
300 stf_enabled_flush_types = type;
301
302 if (!no_stf_barrier)
303 stf_barrier_enable(enable);
304 }
305
306 ssize_t cpu_show_spec_store_bypass(struct device *dev, struct device_attribute *attr, char *buf)
307 {
308 if (stf_barrier && stf_enabled_flush_types != STF_BARRIER_NONE) {
309 const char *type;
310 switch (stf_enabled_flush_types) {
311 case STF_BARRIER_EIEIO:
312 type = "eieio";
313 break;
314 case STF_BARRIER_SYNC_ORI:
315 type = "hwsync";
316 break;
317 case STF_BARRIER_FALLBACK:
318 type = "fallback";
319 break;
320 default:
321 type = "unknown";
322 }
323 return sprintf(buf, "Mitigation: Kernel entry/exit barrier (%s)\n", type);
324 }
325
326 if (!security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV) &&
327 !security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR))
328 return sprintf(buf, "Not affected\n");
329
330 return sprintf(buf, "Vulnerable\n");
331 }
332
333 #ifdef CONFIG_DEBUG_FS
334 static int stf_barrier_set(void *data, u64 val)
335 {
336 bool enable;
337
338 if (val == 1)
339 enable = true;
340 else if (val == 0)
341 enable = false;
342 else
343 return -EINVAL;
344
345 /* Only do anything if we're changing state */
346 if (enable != stf_barrier)
347 stf_barrier_enable(enable);
348
349 return 0;
350 }
351
352 static int stf_barrier_get(void *data, u64 *val)
353 {
354 *val = stf_barrier ? 1 : 0;
355 return 0;
356 }
357
358 DEFINE_SIMPLE_ATTRIBUTE(fops_stf_barrier, stf_barrier_get, stf_barrier_set, "%llu\n");
359
360 static __init int stf_barrier_debugfs_init(void)
361 {
362 debugfs_create_file("stf_barrier", 0600, powerpc_debugfs_root, NULL, &fops_stf_barrier);
363 return 0;
364 }
365 device_initcall(stf_barrier_debugfs_init);
366 #endif /* CONFIG_DEBUG_FS */
367
368 static void toggle_count_cache_flush(bool enable)
369 {
370 if (!enable || !security_ftr_enabled(SEC_FTR_FLUSH_COUNT_CACHE)) {
371 patch_instruction_site(&patch__call_flush_count_cache, PPC_INST_NOP);
372 count_cache_flush_type = COUNT_CACHE_FLUSH_NONE;
373 pr_info("count-cache-flush: software flush disabled.\n");
374 return;
375 }
376
377 patch_branch_site(&patch__call_flush_count_cache,
378 (u64)&flush_count_cache, BRANCH_SET_LINK);
379
380 if (!security_ftr_enabled(SEC_FTR_BCCTR_FLUSH_ASSIST)) {
381 count_cache_flush_type = COUNT_CACHE_FLUSH_SW;
382 pr_info("count-cache-flush: full software flush sequence enabled.\n");
383 return;
384 }
385
386 patch_instruction_site(&patch__flush_count_cache_return, PPC_INST_BLR);
387 count_cache_flush_type = COUNT_CACHE_FLUSH_HW;
388 pr_info("count-cache-flush: hardware assisted flush sequence enabled\n");
389 }
390
391 void setup_count_cache_flush(void)
392 {
393 toggle_count_cache_flush(true);
394 }
395
396 #ifdef CONFIG_DEBUG_FS
397 static int count_cache_flush_set(void *data, u64 val)
398 {
399 bool enable;
400
401 if (val == 1)
402 enable = true;
403 else if (val == 0)
404 enable = false;
405 else
406 return -EINVAL;
407
408 toggle_count_cache_flush(enable);
409
410 return 0;
411 }
412
413 static int count_cache_flush_get(void *data, u64 *val)
414 {
415 if (count_cache_flush_type == COUNT_CACHE_FLUSH_NONE)
416 *val = 0;
417 else
418 *val = 1;
419
420 return 0;
421 }
422
423 DEFINE_SIMPLE_ATTRIBUTE(fops_count_cache_flush, count_cache_flush_get,
424 count_cache_flush_set, "%llu\n");
425
426 static __init int count_cache_flush_debugfs_init(void)
427 {
428 debugfs_create_file("count_cache_flush", 0600, powerpc_debugfs_root,
429 NULL, &fops_count_cache_flush);
430 return 0;
431 }
432 device_initcall(count_cache_flush_debugfs_init);
433 #endif /* CONFIG_DEBUG_FS */
434 #endif /* CONFIG_PPC_BOOK3S_64 */