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[mirror_ubuntu-zesty-kernel.git] / arch / powerpc / kvm / book3s_emulate.c
1 /*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
14 *
15 * Copyright SUSE Linux Products GmbH 2009
16 *
17 * Authors: Alexander Graf <agraf@suse.de>
18 */
19
20 #include <asm/kvm_ppc.h>
21 #include <asm/disassemble.h>
22 #include <asm/kvm_book3s.h>
23 #include <asm/reg.h>
24 #include <asm/switch_to.h>
25 #include <asm/time.h>
26
27 #define OP_19_XOP_RFID 18
28 #define OP_19_XOP_RFI 50
29
30 #define OP_31_XOP_MFMSR 83
31 #define OP_31_XOP_MTMSR 146
32 #define OP_31_XOP_MTMSRD 178
33 #define OP_31_XOP_MTSR 210
34 #define OP_31_XOP_MTSRIN 242
35 #define OP_31_XOP_TLBIEL 274
36 #define OP_31_XOP_TLBIE 306
37 /* Opcode is officially reserved, reuse it as sc 1 when sc 1 doesn't trap */
38 #define OP_31_XOP_FAKE_SC1 308
39 #define OP_31_XOP_SLBMTE 402
40 #define OP_31_XOP_SLBIE 434
41 #define OP_31_XOP_SLBIA 498
42 #define OP_31_XOP_MFSR 595
43 #define OP_31_XOP_MFSRIN 659
44 #define OP_31_XOP_DCBA 758
45 #define OP_31_XOP_SLBMFEV 851
46 #define OP_31_XOP_EIOIO 854
47 #define OP_31_XOP_SLBMFEE 915
48
49 /* DCBZ is actually 1014, but we patch it to 1010 so we get a trap */
50 #define OP_31_XOP_DCBZ 1010
51
52 #define OP_LFS 48
53 #define OP_LFD 50
54 #define OP_STFS 52
55 #define OP_STFD 54
56
57 #define SPRN_GQR0 912
58 #define SPRN_GQR1 913
59 #define SPRN_GQR2 914
60 #define SPRN_GQR3 915
61 #define SPRN_GQR4 916
62 #define SPRN_GQR5 917
63 #define SPRN_GQR6 918
64 #define SPRN_GQR7 919
65
66 /* Book3S_32 defines mfsrin(v) - but that messes up our abstract
67 * function pointers, so let's just disable the define. */
68 #undef mfsrin
69
70 enum priv_level {
71 PRIV_PROBLEM = 0,
72 PRIV_SUPER = 1,
73 PRIV_HYPER = 2,
74 };
75
76 static bool spr_allowed(struct kvm_vcpu *vcpu, enum priv_level level)
77 {
78 /* PAPR VMs only access supervisor SPRs */
79 if (vcpu->arch.papr_enabled && (level > PRIV_SUPER))
80 return false;
81
82 /* Limit user space to its own small SPR set */
83 if ((vcpu->arch.shared->msr & MSR_PR) && level > PRIV_PROBLEM)
84 return false;
85
86 return true;
87 }
88
89 int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
90 unsigned int inst, int *advance)
91 {
92 int emulated = EMULATE_DONE;
93 int rt = get_rt(inst);
94 int rs = get_rs(inst);
95 int ra = get_ra(inst);
96 int rb = get_rb(inst);
97
98 switch (get_op(inst)) {
99 case 19:
100 switch (get_xop(inst)) {
101 case OP_19_XOP_RFID:
102 case OP_19_XOP_RFI:
103 kvmppc_set_pc(vcpu, vcpu->arch.shared->srr0);
104 kvmppc_set_msr(vcpu, vcpu->arch.shared->srr1);
105 *advance = 0;
106 break;
107
108 default:
109 emulated = EMULATE_FAIL;
110 break;
111 }
112 break;
113 case 31:
114 switch (get_xop(inst)) {
115 case OP_31_XOP_MFMSR:
116 kvmppc_set_gpr(vcpu, rt, vcpu->arch.shared->msr);
117 break;
118 case OP_31_XOP_MTMSRD:
119 {
120 ulong rs_val = kvmppc_get_gpr(vcpu, rs);
121 if (inst & 0x10000) {
122 ulong new_msr = vcpu->arch.shared->msr;
123 new_msr &= ~(MSR_RI | MSR_EE);
124 new_msr |= rs_val & (MSR_RI | MSR_EE);
125 vcpu->arch.shared->msr = new_msr;
126 } else
127 kvmppc_set_msr(vcpu, rs_val);
128 break;
129 }
130 case OP_31_XOP_MTMSR:
131 kvmppc_set_msr(vcpu, kvmppc_get_gpr(vcpu, rs));
132 break;
133 case OP_31_XOP_MFSR:
134 {
135 int srnum;
136
137 srnum = kvmppc_get_field(inst, 12 + 32, 15 + 32);
138 if (vcpu->arch.mmu.mfsrin) {
139 u32 sr;
140 sr = vcpu->arch.mmu.mfsrin(vcpu, srnum);
141 kvmppc_set_gpr(vcpu, rt, sr);
142 }
143 break;
144 }
145 case OP_31_XOP_MFSRIN:
146 {
147 int srnum;
148
149 srnum = (kvmppc_get_gpr(vcpu, rb) >> 28) & 0xf;
150 if (vcpu->arch.mmu.mfsrin) {
151 u32 sr;
152 sr = vcpu->arch.mmu.mfsrin(vcpu, srnum);
153 kvmppc_set_gpr(vcpu, rt, sr);
154 }
155 break;
156 }
157 case OP_31_XOP_MTSR:
158 vcpu->arch.mmu.mtsrin(vcpu,
159 (inst >> 16) & 0xf,
160 kvmppc_get_gpr(vcpu, rs));
161 break;
162 case OP_31_XOP_MTSRIN:
163 vcpu->arch.mmu.mtsrin(vcpu,
164 (kvmppc_get_gpr(vcpu, rb) >> 28) & 0xf,
165 kvmppc_get_gpr(vcpu, rs));
166 break;
167 case OP_31_XOP_TLBIE:
168 case OP_31_XOP_TLBIEL:
169 {
170 bool large = (inst & 0x00200000) ? true : false;
171 ulong addr = kvmppc_get_gpr(vcpu, rb);
172 vcpu->arch.mmu.tlbie(vcpu, addr, large);
173 break;
174 }
175 #ifdef CONFIG_KVM_BOOK3S_64_PR
176 case OP_31_XOP_FAKE_SC1:
177 {
178 /* SC 1 papr hypercalls */
179 ulong cmd = kvmppc_get_gpr(vcpu, 3);
180 int i;
181
182 if ((vcpu->arch.shared->msr & MSR_PR) ||
183 !vcpu->arch.papr_enabled) {
184 emulated = EMULATE_FAIL;
185 break;
186 }
187
188 if (kvmppc_h_pr(vcpu, cmd) == EMULATE_DONE)
189 break;
190
191 run->papr_hcall.nr = cmd;
192 for (i = 0; i < 9; ++i) {
193 ulong gpr = kvmppc_get_gpr(vcpu, 4 + i);
194 run->papr_hcall.args[i] = gpr;
195 }
196
197 emulated = EMULATE_EXIT_USER;
198 break;
199 }
200 #endif
201 case OP_31_XOP_EIOIO:
202 break;
203 case OP_31_XOP_SLBMTE:
204 if (!vcpu->arch.mmu.slbmte)
205 return EMULATE_FAIL;
206
207 vcpu->arch.mmu.slbmte(vcpu,
208 kvmppc_get_gpr(vcpu, rs),
209 kvmppc_get_gpr(vcpu, rb));
210 break;
211 case OP_31_XOP_SLBIE:
212 if (!vcpu->arch.mmu.slbie)
213 return EMULATE_FAIL;
214
215 vcpu->arch.mmu.slbie(vcpu,
216 kvmppc_get_gpr(vcpu, rb));
217 break;
218 case OP_31_XOP_SLBIA:
219 if (!vcpu->arch.mmu.slbia)
220 return EMULATE_FAIL;
221
222 vcpu->arch.mmu.slbia(vcpu);
223 break;
224 case OP_31_XOP_SLBMFEE:
225 if (!vcpu->arch.mmu.slbmfee) {
226 emulated = EMULATE_FAIL;
227 } else {
228 ulong t, rb_val;
229
230 rb_val = kvmppc_get_gpr(vcpu, rb);
231 t = vcpu->arch.mmu.slbmfee(vcpu, rb_val);
232 kvmppc_set_gpr(vcpu, rt, t);
233 }
234 break;
235 case OP_31_XOP_SLBMFEV:
236 if (!vcpu->arch.mmu.slbmfev) {
237 emulated = EMULATE_FAIL;
238 } else {
239 ulong t, rb_val;
240
241 rb_val = kvmppc_get_gpr(vcpu, rb);
242 t = vcpu->arch.mmu.slbmfev(vcpu, rb_val);
243 kvmppc_set_gpr(vcpu, rt, t);
244 }
245 break;
246 case OP_31_XOP_DCBA:
247 /* Gets treated as NOP */
248 break;
249 case OP_31_XOP_DCBZ:
250 {
251 ulong rb_val = kvmppc_get_gpr(vcpu, rb);
252 ulong ra_val = 0;
253 ulong addr, vaddr;
254 u32 zeros[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
255 u32 dsisr;
256 int r;
257
258 if (ra)
259 ra_val = kvmppc_get_gpr(vcpu, ra);
260
261 addr = (ra_val + rb_val) & ~31ULL;
262 if (!(vcpu->arch.shared->msr & MSR_SF))
263 addr &= 0xffffffff;
264 vaddr = addr;
265
266 r = kvmppc_st(vcpu, &addr, 32, zeros, true);
267 if ((r == -ENOENT) || (r == -EPERM)) {
268 struct kvmppc_book3s_shadow_vcpu *svcpu;
269
270 svcpu = svcpu_get(vcpu);
271 *advance = 0;
272 vcpu->arch.shared->dar = vaddr;
273 svcpu->fault_dar = vaddr;
274
275 dsisr = DSISR_ISSTORE;
276 if (r == -ENOENT)
277 dsisr |= DSISR_NOHPTE;
278 else if (r == -EPERM)
279 dsisr |= DSISR_PROTFAULT;
280
281 vcpu->arch.shared->dsisr = dsisr;
282 svcpu->fault_dsisr = dsisr;
283 svcpu_put(svcpu);
284
285 kvmppc_book3s_queue_irqprio(vcpu,
286 BOOK3S_INTERRUPT_DATA_STORAGE);
287 }
288
289 break;
290 }
291 default:
292 emulated = EMULATE_FAIL;
293 }
294 break;
295 default:
296 emulated = EMULATE_FAIL;
297 }
298
299 if (emulated == EMULATE_FAIL)
300 emulated = kvmppc_emulate_paired_single(run, vcpu);
301
302 return emulated;
303 }
304
305 void kvmppc_set_bat(struct kvm_vcpu *vcpu, struct kvmppc_bat *bat, bool upper,
306 u32 val)
307 {
308 if (upper) {
309 /* Upper BAT */
310 u32 bl = (val >> 2) & 0x7ff;
311 bat->bepi_mask = (~bl << 17);
312 bat->bepi = val & 0xfffe0000;
313 bat->vs = (val & 2) ? 1 : 0;
314 bat->vp = (val & 1) ? 1 : 0;
315 bat->raw = (bat->raw & 0xffffffff00000000ULL) | val;
316 } else {
317 /* Lower BAT */
318 bat->brpn = val & 0xfffe0000;
319 bat->wimg = (val >> 3) & 0xf;
320 bat->pp = val & 3;
321 bat->raw = (bat->raw & 0x00000000ffffffffULL) | ((u64)val << 32);
322 }
323 }
324
325 static struct kvmppc_bat *kvmppc_find_bat(struct kvm_vcpu *vcpu, int sprn)
326 {
327 struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
328 struct kvmppc_bat *bat;
329
330 switch (sprn) {
331 case SPRN_IBAT0U ... SPRN_IBAT3L:
332 bat = &vcpu_book3s->ibat[(sprn - SPRN_IBAT0U) / 2];
333 break;
334 case SPRN_IBAT4U ... SPRN_IBAT7L:
335 bat = &vcpu_book3s->ibat[4 + ((sprn - SPRN_IBAT4U) / 2)];
336 break;
337 case SPRN_DBAT0U ... SPRN_DBAT3L:
338 bat = &vcpu_book3s->dbat[(sprn - SPRN_DBAT0U) / 2];
339 break;
340 case SPRN_DBAT4U ... SPRN_DBAT7L:
341 bat = &vcpu_book3s->dbat[4 + ((sprn - SPRN_DBAT4U) / 2)];
342 break;
343 default:
344 BUG();
345 }
346
347 return bat;
348 }
349
350 int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val)
351 {
352 int emulated = EMULATE_DONE;
353
354 switch (sprn) {
355 case SPRN_SDR1:
356 if (!spr_allowed(vcpu, PRIV_HYPER))
357 goto unprivileged;
358 to_book3s(vcpu)->sdr1 = spr_val;
359 break;
360 case SPRN_DSISR:
361 vcpu->arch.shared->dsisr = spr_val;
362 break;
363 case SPRN_DAR:
364 vcpu->arch.shared->dar = spr_val;
365 break;
366 case SPRN_HIOR:
367 to_book3s(vcpu)->hior = spr_val;
368 break;
369 case SPRN_IBAT0U ... SPRN_IBAT3L:
370 case SPRN_IBAT4U ... SPRN_IBAT7L:
371 case SPRN_DBAT0U ... SPRN_DBAT3L:
372 case SPRN_DBAT4U ... SPRN_DBAT7L:
373 {
374 struct kvmppc_bat *bat = kvmppc_find_bat(vcpu, sprn);
375
376 kvmppc_set_bat(vcpu, bat, !(sprn % 2), (u32)spr_val);
377 /* BAT writes happen so rarely that we're ok to flush
378 * everything here */
379 kvmppc_mmu_pte_flush(vcpu, 0, 0);
380 kvmppc_mmu_flush_segments(vcpu);
381 break;
382 }
383 case SPRN_HID0:
384 to_book3s(vcpu)->hid[0] = spr_val;
385 break;
386 case SPRN_HID1:
387 to_book3s(vcpu)->hid[1] = spr_val;
388 break;
389 case SPRN_HID2:
390 to_book3s(vcpu)->hid[2] = spr_val;
391 break;
392 case SPRN_HID2_GEKKO:
393 to_book3s(vcpu)->hid[2] = spr_val;
394 /* HID2.PSE controls paired single on gekko */
395 switch (vcpu->arch.pvr) {
396 case 0x00080200: /* lonestar 2.0 */
397 case 0x00088202: /* lonestar 2.2 */
398 case 0x70000100: /* gekko 1.0 */
399 case 0x00080100: /* gekko 2.0 */
400 case 0x00083203: /* gekko 2.3a */
401 case 0x00083213: /* gekko 2.3b */
402 case 0x00083204: /* gekko 2.4 */
403 case 0x00083214: /* gekko 2.4e (8SE) - retail HW2 */
404 case 0x00087200: /* broadway */
405 if (vcpu->arch.hflags & BOOK3S_HFLAG_NATIVE_PS) {
406 /* Native paired singles */
407 } else if (spr_val & (1 << 29)) { /* HID2.PSE */
408 vcpu->arch.hflags |= BOOK3S_HFLAG_PAIRED_SINGLE;
409 kvmppc_giveup_ext(vcpu, MSR_FP);
410 } else {
411 vcpu->arch.hflags &= ~BOOK3S_HFLAG_PAIRED_SINGLE;
412 }
413 break;
414 }
415 break;
416 case SPRN_HID4:
417 case SPRN_HID4_GEKKO:
418 to_book3s(vcpu)->hid[4] = spr_val;
419 break;
420 case SPRN_HID5:
421 to_book3s(vcpu)->hid[5] = spr_val;
422 /* guest HID5 set can change is_dcbz32 */
423 if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
424 (mfmsr() & MSR_HV))
425 vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32;
426 break;
427 case SPRN_PURR:
428 to_book3s(vcpu)->purr_offset = spr_val - get_tb();
429 break;
430 case SPRN_SPURR:
431 to_book3s(vcpu)->spurr_offset = spr_val - get_tb();
432 break;
433 case SPRN_GQR0:
434 case SPRN_GQR1:
435 case SPRN_GQR2:
436 case SPRN_GQR3:
437 case SPRN_GQR4:
438 case SPRN_GQR5:
439 case SPRN_GQR6:
440 case SPRN_GQR7:
441 to_book3s(vcpu)->gqr[sprn - SPRN_GQR0] = spr_val;
442 break;
443 case SPRN_ICTC:
444 case SPRN_THRM1:
445 case SPRN_THRM2:
446 case SPRN_THRM3:
447 case SPRN_CTRLF:
448 case SPRN_CTRLT:
449 case SPRN_L2CR:
450 case SPRN_DSCR:
451 case SPRN_MMCR0_GEKKO:
452 case SPRN_MMCR1_GEKKO:
453 case SPRN_PMC1_GEKKO:
454 case SPRN_PMC2_GEKKO:
455 case SPRN_PMC3_GEKKO:
456 case SPRN_PMC4_GEKKO:
457 case SPRN_WPAR_GEKKO:
458 case SPRN_MSSSR0:
459 break;
460 unprivileged:
461 default:
462 printk(KERN_INFO "KVM: invalid SPR write: %d\n", sprn);
463 #ifndef DEBUG_SPR
464 emulated = EMULATE_FAIL;
465 #endif
466 break;
467 }
468
469 return emulated;
470 }
471
472 int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val)
473 {
474 int emulated = EMULATE_DONE;
475
476 switch (sprn) {
477 case SPRN_IBAT0U ... SPRN_IBAT3L:
478 case SPRN_IBAT4U ... SPRN_IBAT7L:
479 case SPRN_DBAT0U ... SPRN_DBAT3L:
480 case SPRN_DBAT4U ... SPRN_DBAT7L:
481 {
482 struct kvmppc_bat *bat = kvmppc_find_bat(vcpu, sprn);
483
484 if (sprn % 2)
485 *spr_val = bat->raw >> 32;
486 else
487 *spr_val = bat->raw;
488
489 break;
490 }
491 case SPRN_SDR1:
492 if (!spr_allowed(vcpu, PRIV_HYPER))
493 goto unprivileged;
494 *spr_val = to_book3s(vcpu)->sdr1;
495 break;
496 case SPRN_DSISR:
497 *spr_val = vcpu->arch.shared->dsisr;
498 break;
499 case SPRN_DAR:
500 *spr_val = vcpu->arch.shared->dar;
501 break;
502 case SPRN_HIOR:
503 *spr_val = to_book3s(vcpu)->hior;
504 break;
505 case SPRN_HID0:
506 *spr_val = to_book3s(vcpu)->hid[0];
507 break;
508 case SPRN_HID1:
509 *spr_val = to_book3s(vcpu)->hid[1];
510 break;
511 case SPRN_HID2:
512 case SPRN_HID2_GEKKO:
513 *spr_val = to_book3s(vcpu)->hid[2];
514 break;
515 case SPRN_HID4:
516 case SPRN_HID4_GEKKO:
517 *spr_val = to_book3s(vcpu)->hid[4];
518 break;
519 case SPRN_HID5:
520 *spr_val = to_book3s(vcpu)->hid[5];
521 break;
522 case SPRN_CFAR:
523 case SPRN_DSCR:
524 *spr_val = 0;
525 break;
526 case SPRN_PURR:
527 *spr_val = get_tb() + to_book3s(vcpu)->purr_offset;
528 break;
529 case SPRN_SPURR:
530 *spr_val = get_tb() + to_book3s(vcpu)->purr_offset;
531 break;
532 case SPRN_GQR0:
533 case SPRN_GQR1:
534 case SPRN_GQR2:
535 case SPRN_GQR3:
536 case SPRN_GQR4:
537 case SPRN_GQR5:
538 case SPRN_GQR6:
539 case SPRN_GQR7:
540 *spr_val = to_book3s(vcpu)->gqr[sprn - SPRN_GQR0];
541 break;
542 case SPRN_THRM1:
543 case SPRN_THRM2:
544 case SPRN_THRM3:
545 case SPRN_CTRLF:
546 case SPRN_CTRLT:
547 case SPRN_L2CR:
548 case SPRN_MMCR0_GEKKO:
549 case SPRN_MMCR1_GEKKO:
550 case SPRN_PMC1_GEKKO:
551 case SPRN_PMC2_GEKKO:
552 case SPRN_PMC3_GEKKO:
553 case SPRN_PMC4_GEKKO:
554 case SPRN_WPAR_GEKKO:
555 case SPRN_MSSSR0:
556 *spr_val = 0;
557 break;
558 default:
559 unprivileged:
560 printk(KERN_INFO "KVM: invalid SPR read: %d\n", sprn);
561 #ifndef DEBUG_SPR
562 emulated = EMULATE_FAIL;
563 #endif
564 break;
565 }
566
567 return emulated;
568 }
569
570 u32 kvmppc_alignment_dsisr(struct kvm_vcpu *vcpu, unsigned int inst)
571 {
572 u32 dsisr = 0;
573
574 /*
575 * This is what the spec says about DSISR bits (not mentioned = 0):
576 *
577 * 12:13 [DS] Set to bits 30:31
578 * 15:16 [X] Set to bits 29:30
579 * 17 [X] Set to bit 25
580 * [D/DS] Set to bit 5
581 * 18:21 [X] Set to bits 21:24
582 * [D/DS] Set to bits 1:4
583 * 22:26 Set to bits 6:10 (RT/RS/FRT/FRS)
584 * 27:31 Set to bits 11:15 (RA)
585 */
586
587 switch (get_op(inst)) {
588 /* D-form */
589 case OP_LFS:
590 case OP_LFD:
591 case OP_STFD:
592 case OP_STFS:
593 dsisr |= (inst >> 12) & 0x4000; /* bit 17 */
594 dsisr |= (inst >> 17) & 0x3c00; /* bits 18:21 */
595 break;
596 /* X-form */
597 case 31:
598 dsisr |= (inst << 14) & 0x18000; /* bits 15:16 */
599 dsisr |= (inst << 8) & 0x04000; /* bit 17 */
600 dsisr |= (inst << 3) & 0x03c00; /* bits 18:21 */
601 break;
602 default:
603 printk(KERN_INFO "KVM: Unaligned instruction 0x%x\n", inst);
604 break;
605 }
606
607 dsisr |= (inst >> 16) & 0x03ff; /* bits 22:31 */
608
609 return dsisr;
610 }
611
612 ulong kvmppc_alignment_dar(struct kvm_vcpu *vcpu, unsigned int inst)
613 {
614 ulong dar = 0;
615 ulong ra = get_ra(inst);
616 ulong rb = get_rb(inst);
617
618 switch (get_op(inst)) {
619 case OP_LFS:
620 case OP_LFD:
621 case OP_STFD:
622 case OP_STFS:
623 if (ra)
624 dar = kvmppc_get_gpr(vcpu, ra);
625 dar += (s32)((s16)inst);
626 break;
627 case 31:
628 if (ra)
629 dar = kvmppc_get_gpr(vcpu, ra);
630 dar += kvmppc_get_gpr(vcpu, rb);
631 break;
632 default:
633 printk(KERN_INFO "KVM: Unaligned instruction 0x%x\n", inst);
634 break;
635 }
636
637 return dar;
638 }
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