2 * Copyright 2011 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License, version 2, as
6 * published by the Free Software Foundation.
10 #include <linux/kvm_host.h>
11 #include <linux/preempt.h>
12 #include <linux/export.h>
13 #include <linux/sched.h>
14 #include <linux/spinlock.h>
15 #include <linux/init.h>
16 #include <linux/memblock.h>
17 #include <linux/sizes.h>
18 #include <linux/cma.h>
19 #include <linux/bitops.h>
21 #include <asm/cputable.h>
22 #include <asm/kvm_ppc.h>
23 #include <asm/kvm_book3s.h>
24 #include <asm/archrandom.h>
27 #include <asm/dbell.h>
28 #include <asm/cputhreads.h>
33 #define KVM_CMA_CHUNK_ORDER 18
36 * Hash page table alignment on newer cpus(CPU_FTR_ARCH_206)
37 * should be power of 2.
39 #define HPT_ALIGN_PAGES ((1 << 18) >> PAGE_SHIFT) /* 256k */
41 * By default we reserve 5% of memory for hash pagetable allocation.
43 static unsigned long kvm_cma_resv_ratio
= 5;
45 static struct cma
*kvm_cma
;
47 static int __init
early_parse_kvm_cma_resv(char *p
)
49 pr_debug("%s(%s)\n", __func__
, p
);
52 return kstrtoul(p
, 0, &kvm_cma_resv_ratio
);
54 early_param("kvm_cma_resv_ratio", early_parse_kvm_cma_resv
);
56 struct page
*kvm_alloc_hpt(unsigned long nr_pages
)
58 VM_BUG_ON(order_base_2(nr_pages
) < KVM_CMA_CHUNK_ORDER
- PAGE_SHIFT
);
60 return cma_alloc(kvm_cma
, nr_pages
, order_base_2(HPT_ALIGN_PAGES
));
62 EXPORT_SYMBOL_GPL(kvm_alloc_hpt
);
64 void kvm_release_hpt(struct page
*page
, unsigned long nr_pages
)
66 cma_release(kvm_cma
, page
, nr_pages
);
68 EXPORT_SYMBOL_GPL(kvm_release_hpt
);
71 * kvm_cma_reserve() - reserve area for kvm hash pagetable
73 * This function reserves memory from early allocator. It should be
74 * called by arch specific code once the memblock allocator
75 * has been activated and all other subsystems have already allocated/reserved
78 void __init
kvm_cma_reserve(void)
80 unsigned long align_size
;
81 struct memblock_region
*reg
;
82 phys_addr_t selected_size
= 0;
85 * We need CMA reservation only when we are in HV mode
87 if (!cpu_has_feature(CPU_FTR_HVMODE
))
90 * We cannot use memblock_phys_mem_size() here, because
91 * memblock_analyze() has not been called yet.
93 for_each_memblock(memory
, reg
)
94 selected_size
+= memblock_region_memory_end_pfn(reg
) -
95 memblock_region_memory_base_pfn(reg
);
97 selected_size
= (selected_size
* kvm_cma_resv_ratio
/ 100) << PAGE_SHIFT
;
99 pr_debug("%s: reserving %ld MiB for global area\n", __func__
,
100 (unsigned long)selected_size
/ SZ_1M
);
101 align_size
= HPT_ALIGN_PAGES
<< PAGE_SHIFT
;
102 cma_declare_contiguous(0, selected_size
, 0, align_size
,
103 KVM_CMA_CHUNK_ORDER
- PAGE_SHIFT
, false, &kvm_cma
);
108 * Real-mode H_CONFER implementation.
109 * We check if we are the only vcpu out of this virtual core
110 * still running in the guest and not ceded. If so, we pop up
111 * to the virtual-mode implementation; if not, just return to
114 long int kvmppc_rm_h_confer(struct kvm_vcpu
*vcpu
, int target
,
115 unsigned int yield_count
)
117 struct kvmppc_vcore
*vc
= local_paca
->kvm_hstate
.kvm_vcore
;
118 int ptid
= local_paca
->kvm_hstate
.ptid
;
121 int threads_conferring
;
122 u64 stop
= get_tb() + 10 * tb_ticks_per_usec
;
123 int rv
= H_SUCCESS
; /* => don't yield */
125 set_bit(ptid
, &vc
->conferring_threads
);
126 while ((get_tb() < stop
) && !VCORE_IS_EXITING(vc
)) {
127 threads_running
= VCORE_ENTRY_MAP(vc
);
128 threads_ceded
= vc
->napping_threads
;
129 threads_conferring
= vc
->conferring_threads
;
130 if ((threads_ceded
| threads_conferring
) == threads_running
) {
131 rv
= H_TOO_HARD
; /* => do yield */
135 clear_bit(ptid
, &vc
->conferring_threads
);
140 * When running HV mode KVM we need to block certain operations while KVM VMs
141 * exist in the system. We use a counter of VMs to track this.
143 * One of the operations we need to block is onlining of secondaries, so we
144 * protect hv_vm_count with get/put_online_cpus().
146 static atomic_t hv_vm_count
;
148 void kvm_hv_vm_activated(void)
151 atomic_inc(&hv_vm_count
);
154 EXPORT_SYMBOL_GPL(kvm_hv_vm_activated
);
156 void kvm_hv_vm_deactivated(void)
159 atomic_dec(&hv_vm_count
);
162 EXPORT_SYMBOL_GPL(kvm_hv_vm_deactivated
);
164 bool kvm_hv_mode_active(void)
166 return atomic_read(&hv_vm_count
) != 0;
169 extern int hcall_real_table
[], hcall_real_table_end
[];
171 int kvmppc_hcall_impl_hv_realmode(unsigned long cmd
)
174 if (cmd
< hcall_real_table_end
- hcall_real_table
&&
175 hcall_real_table
[cmd
])
180 EXPORT_SYMBOL_GPL(kvmppc_hcall_impl_hv_realmode
);
182 int kvmppc_hwrng_present(void)
184 return powernv_hwrng_present();
186 EXPORT_SYMBOL_GPL(kvmppc_hwrng_present
);
188 long kvmppc_h_random(struct kvm_vcpu
*vcpu
)
192 /* Only need to do the expensive mfmsr() on radix */
193 if (kvm_is_radix(vcpu
->kvm
) && (mfmsr() & MSR_IR
))
194 r
= powernv_get_random_long(&vcpu
->arch
.gpr
[4]);
196 r
= powernv_get_random_real_mode(&vcpu
->arch
.gpr
[4]);
203 static inline void rm_writeb(unsigned long paddr
, u8 val
)
205 __asm__
__volatile__("stbcix %0,0,%1"
206 : : "r" (val
), "r" (paddr
) : "memory");
210 * Send an interrupt or message to another CPU.
211 * The caller needs to include any barrier needed to order writes
212 * to memory vs. the IPI/message.
214 void kvmhv_rm_send_ipi(int cpu
)
216 unsigned long xics_phys
;
217 unsigned long msg
= PPC_DBELL_TYPE(PPC_DBELL_SERVER
);
219 /* On POWER9 we can use msgsnd for any destination cpu. */
220 if (cpu_has_feature(CPU_FTR_ARCH_300
)) {
221 msg
|= get_hard_smp_processor_id(cpu
);
222 __asm__
__volatile__ (PPC_MSGSND(%0) : : "r" (msg
));
225 /* On POWER8 for IPIs to threads in the same core, use msgsnd. */
226 if (cpu_has_feature(CPU_FTR_ARCH_207S
) &&
227 cpu_first_thread_sibling(cpu
) ==
228 cpu_first_thread_sibling(raw_smp_processor_id())) {
229 msg
|= cpu_thread_in_core(cpu
);
230 __asm__
__volatile__ (PPC_MSGSND(%0) : : "r" (msg
));
234 /* We should never reach this */
235 if (WARN_ON_ONCE(xive_enabled()))
238 /* Else poke the target with an IPI */
239 xics_phys
= paca
[cpu
].kvm_hstate
.xics_phys
;
241 rm_writeb(xics_phys
+ XICS_MFRR
, IPI_PRIORITY
);
243 opal_int_set_mfrr(get_hard_smp_processor_id(cpu
), IPI_PRIORITY
);
247 * The following functions are called from the assembly code
248 * in book3s_hv_rmhandlers.S.
250 static void kvmhv_interrupt_vcore(struct kvmppc_vcore
*vc
, int active
)
254 /* Order setting of exit map vs. msgsnd/IPI */
256 for (; active
; active
>>= 1, ++cpu
)
258 kvmhv_rm_send_ipi(cpu
);
261 void kvmhv_commence_exit(int trap
)
263 struct kvmppc_vcore
*vc
= local_paca
->kvm_hstate
.kvm_vcore
;
264 int ptid
= local_paca
->kvm_hstate
.ptid
;
265 struct kvm_split_mode
*sip
= local_paca
->kvm_hstate
.kvm_split_mode
;
268 /* Set our bit in the threads-exiting-guest map in the 0xff00
269 bits of vcore->entry_exit_map */
272 ee
= vc
->entry_exit_map
;
273 } while (cmpxchg(&vc
->entry_exit_map
, ee
, ee
| me
) != ee
);
275 /* Are we the first here? */
280 * Trigger the other threads in this vcore to exit the guest.
281 * If this is a hypervisor decrementer interrupt then they
282 * will be already on their way out of the guest.
284 if (trap
!= BOOK3S_INTERRUPT_HV_DECREMENTER
)
285 kvmhv_interrupt_vcore(vc
, ee
& ~(1 << ptid
));
288 * If we are doing dynamic micro-threading, interrupt the other
289 * subcores to pull them out of their guests too.
294 for (i
= 0; i
< MAX_SUBCORES
; ++i
) {
295 vc
= sip
->master_vcs
[i
];
299 ee
= vc
->entry_exit_map
;
300 /* Already asked to exit? */
303 } while (cmpxchg(&vc
->entry_exit_map
, ee
,
304 ee
| VCORE_EXIT_REQ
) != ee
);
306 kvmhv_interrupt_vcore(vc
, ee
);
310 struct kvmppc_host_rm_ops
*kvmppc_host_rm_ops_hv
;
311 EXPORT_SYMBOL_GPL(kvmppc_host_rm_ops_hv
);
313 #ifdef CONFIG_KVM_XICS
314 static struct kvmppc_irq_map
*get_irqmap(struct kvmppc_passthru_irqmap
*pimap
,
320 * We access the mapped array here without a lock. That
321 * is safe because we never reduce the number of entries
322 * in the array and we never change the v_hwirq field of
323 * an entry once it is set.
325 * We have also carefully ordered the stores in the writer
326 * and the loads here in the reader, so that if we find a matching
327 * hwirq here, the associated GSI and irq_desc fields are valid.
329 for (i
= 0; i
< pimap
->n_mapped
; i
++) {
330 if (xisr
== pimap
->mapped
[i
].r_hwirq
) {
332 * Order subsequent reads in the caller to serialize
336 return &pimap
->mapped
[i
];
343 * If we have an interrupt that's not an IPI, check if we have a
344 * passthrough adapter and if so, check if this external interrupt
345 * is for the adapter.
346 * We will attempt to deliver the IRQ directly to the target VCPU's
347 * ICP, the virtual ICP (based on affinity - the xive value in ICS).
349 * If the delivery fails or if this is not for a passthrough adapter,
350 * return to the host to handle this interrupt. We earlier
351 * saved a copy of the XIRR in the PACA, it will be picked up by
352 * the host ICP driver.
354 static int kvmppc_check_passthru(u32 xisr
, __be32 xirr
, bool *again
)
356 struct kvmppc_passthru_irqmap
*pimap
;
357 struct kvmppc_irq_map
*irq_map
;
358 struct kvm_vcpu
*vcpu
;
360 vcpu
= local_paca
->kvm_hstate
.kvm_vcpu
;
363 pimap
= kvmppc_get_passthru_irqmap(vcpu
->kvm
);
366 irq_map
= get_irqmap(pimap
, xisr
);
370 /* We're handling this interrupt, generic code doesn't need to */
371 local_paca
->kvm_hstate
.saved_xirr
= 0;
373 return kvmppc_deliver_irq_passthru(vcpu
, xirr
, irq_map
, pimap
, again
);
377 static inline int kvmppc_check_passthru(u32 xisr
, __be32 xirr
, bool *again
)
384 * Determine what sort of external interrupt is pending (if any).
386 * 0 if no interrupt is pending
387 * 1 if an interrupt is pending that needs to be handled by the host
388 * 2 Passthrough that needs completion in the host
389 * -1 if there was a guest wakeup IPI (which has now been cleared)
390 * -2 if there is PCI passthrough external interrupt that was handled
392 static long kvmppc_read_one_intr(bool *again
);
394 long kvmppc_read_intr(void)
405 rc
= kvmppc_read_one_intr(&again
);
406 if (rc
&& (ret
== 0 || rc
> ret
))
412 static long kvmppc_read_one_intr(bool *again
)
414 unsigned long xics_phys
;
421 /* see if a host IPI is pending */
422 host_ipi
= local_paca
->kvm_hstate
.host_ipi
;
426 /* Now read the interrupt from the ICP */
427 xics_phys
= local_paca
->kvm_hstate
.xics_phys
;
430 rc
= opal_int_get_xirr(&xirr
, false);
432 xirr
= _lwzcix(xics_phys
+ XICS_XIRR
);
437 * Save XIRR for later. Since we get control in reverse endian
438 * on LE systems, save it byte reversed and fetch it back in
439 * host endian. Note that xirr is the value read from the
440 * XIRR register, while h_xirr is the host endian version.
442 h_xirr
= be32_to_cpu(xirr
);
443 local_paca
->kvm_hstate
.saved_xirr
= h_xirr
;
444 xisr
= h_xirr
& 0xffffff;
446 * Ensure that the store/load complete to guarantee all side
447 * effects of loading from XIRR has completed
451 /* if nothing pending in the ICP */
455 /* We found something in the ICP...
457 * If it is an IPI, clear the MFRR and EOI it.
459 if (xisr
== XICS_IPI
) {
462 _stbcix(xics_phys
+ XICS_MFRR
, 0xff);
463 _stwcix(xics_phys
+ XICS_XIRR
, xirr
);
465 opal_int_set_mfrr(hard_smp_processor_id(), 0xff);
466 rc
= opal_int_eoi(h_xirr
);
468 /* If rc > 0, there is another interrupt pending */
472 * Need to ensure side effects of above stores
473 * complete before proceeding.
478 * We need to re-check host IPI now in case it got set in the
479 * meantime. If it's clear, we bounce the interrupt to the
482 host_ipi
= local_paca
->kvm_hstate
.host_ipi
;
483 if (unlikely(host_ipi
!= 0)) {
484 /* We raced with the host,
485 * we need to resend that IPI, bummer
488 _stbcix(xics_phys
+ XICS_MFRR
, IPI_PRIORITY
);
490 opal_int_set_mfrr(hard_smp_processor_id(),
492 /* Let side effects complete */
497 /* OK, it's an IPI for us */
498 local_paca
->kvm_hstate
.saved_xirr
= 0;
502 return kvmppc_check_passthru(xisr
, xirr
, again
);