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1 /*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
14 *
15 * Copyright IBM Corp. 2007
16 * Copyright 2010-2011 Freescale Semiconductor, Inc.
17 *
18 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
19 * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
20 * Scott Wood <scottwood@freescale.com>
21 * Varun Sethi <varun.sethi@freescale.com>
22 */
23
24 #include <linux/errno.h>
25 #include <linux/err.h>
26 #include <linux/kvm_host.h>
27 #include <linux/gfp.h>
28 #include <linux/module.h>
29 #include <linux/vmalloc.h>
30 #include <linux/fs.h>
31
32 #include <asm/cputable.h>
33 #include <asm/uaccess.h>
34 #include <asm/kvm_ppc.h>
35 #include <asm/cacheflush.h>
36 #include <asm/dbell.h>
37 #include <asm/hw_irq.h>
38 #include <asm/irq.h>
39 #include <asm/time.h>
40
41 #include "timing.h"
42 #include "booke.h"
43 #include "trace.h"
44
45 unsigned long kvmppc_booke_handlers;
46
47 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
48 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
49
50 struct kvm_stats_debugfs_item debugfs_entries[] = {
51 { "mmio", VCPU_STAT(mmio_exits) },
52 { "dcr", VCPU_STAT(dcr_exits) },
53 { "sig", VCPU_STAT(signal_exits) },
54 { "itlb_r", VCPU_STAT(itlb_real_miss_exits) },
55 { "itlb_v", VCPU_STAT(itlb_virt_miss_exits) },
56 { "dtlb_r", VCPU_STAT(dtlb_real_miss_exits) },
57 { "dtlb_v", VCPU_STAT(dtlb_virt_miss_exits) },
58 { "sysc", VCPU_STAT(syscall_exits) },
59 { "isi", VCPU_STAT(isi_exits) },
60 { "dsi", VCPU_STAT(dsi_exits) },
61 { "inst_emu", VCPU_STAT(emulated_inst_exits) },
62 { "dec", VCPU_STAT(dec_exits) },
63 { "ext_intr", VCPU_STAT(ext_intr_exits) },
64 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
65 { "doorbell", VCPU_STAT(dbell_exits) },
66 { "guest doorbell", VCPU_STAT(gdbell_exits) },
67 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
68 { NULL }
69 };
70
71 /* TODO: use vcpu_printf() */
72 void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu)
73 {
74 int i;
75
76 printk("pc: %08lx msr: %08llx\n", vcpu->arch.pc, vcpu->arch.shared->msr);
77 printk("lr: %08lx ctr: %08lx\n", vcpu->arch.lr, vcpu->arch.ctr);
78 printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0,
79 vcpu->arch.shared->srr1);
80
81 printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions);
82
83 for (i = 0; i < 32; i += 4) {
84 printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i,
85 kvmppc_get_gpr(vcpu, i),
86 kvmppc_get_gpr(vcpu, i+1),
87 kvmppc_get_gpr(vcpu, i+2),
88 kvmppc_get_gpr(vcpu, i+3));
89 }
90 }
91
92 #ifdef CONFIG_SPE
93 void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu)
94 {
95 preempt_disable();
96 enable_kernel_spe();
97 kvmppc_save_guest_spe(vcpu);
98 vcpu->arch.shadow_msr &= ~MSR_SPE;
99 preempt_enable();
100 }
101
102 static void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu)
103 {
104 preempt_disable();
105 enable_kernel_spe();
106 kvmppc_load_guest_spe(vcpu);
107 vcpu->arch.shadow_msr |= MSR_SPE;
108 preempt_enable();
109 }
110
111 static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
112 {
113 if (vcpu->arch.shared->msr & MSR_SPE) {
114 if (!(vcpu->arch.shadow_msr & MSR_SPE))
115 kvmppc_vcpu_enable_spe(vcpu);
116 } else if (vcpu->arch.shadow_msr & MSR_SPE) {
117 kvmppc_vcpu_disable_spe(vcpu);
118 }
119 }
120 #else
121 static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
122 {
123 }
124 #endif
125
126 static void kvmppc_vcpu_sync_fpu(struct kvm_vcpu *vcpu)
127 {
128 #if defined(CONFIG_PPC_FPU) && !defined(CONFIG_KVM_BOOKE_HV)
129 /* We always treat the FP bit as enabled from the host
130 perspective, so only need to adjust the shadow MSR */
131 vcpu->arch.shadow_msr &= ~MSR_FP;
132 vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_FP;
133 #endif
134 }
135
136 /*
137 * Helper function for "full" MSR writes. No need to call this if only
138 * EE/CE/ME/DE/RI are changing.
139 */
140 void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr)
141 {
142 u32 old_msr = vcpu->arch.shared->msr;
143
144 #ifdef CONFIG_KVM_BOOKE_HV
145 new_msr |= MSR_GS;
146 #endif
147
148 vcpu->arch.shared->msr = new_msr;
149
150 kvmppc_mmu_msr_notify(vcpu, old_msr);
151 kvmppc_vcpu_sync_spe(vcpu);
152 kvmppc_vcpu_sync_fpu(vcpu);
153 }
154
155 static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu,
156 unsigned int priority)
157 {
158 trace_kvm_booke_queue_irqprio(vcpu, priority);
159 set_bit(priority, &vcpu->arch.pending_exceptions);
160 }
161
162 static void kvmppc_core_queue_dtlb_miss(struct kvm_vcpu *vcpu,
163 ulong dear_flags, ulong esr_flags)
164 {
165 vcpu->arch.queued_dear = dear_flags;
166 vcpu->arch.queued_esr = esr_flags;
167 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS);
168 }
169
170 static void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu,
171 ulong dear_flags, ulong esr_flags)
172 {
173 vcpu->arch.queued_dear = dear_flags;
174 vcpu->arch.queued_esr = esr_flags;
175 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE);
176 }
177
178 static void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu,
179 ulong esr_flags)
180 {
181 vcpu->arch.queued_esr = esr_flags;
182 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE);
183 }
184
185 static void kvmppc_core_queue_alignment(struct kvm_vcpu *vcpu, ulong dear_flags,
186 ulong esr_flags)
187 {
188 vcpu->arch.queued_dear = dear_flags;
189 vcpu->arch.queued_esr = esr_flags;
190 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALIGNMENT);
191 }
192
193 void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong esr_flags)
194 {
195 vcpu->arch.queued_esr = esr_flags;
196 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM);
197 }
198
199 void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
200 {
201 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER);
202 }
203
204 int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
205 {
206 return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
207 }
208
209 void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
210 {
211 clear_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
212 }
213
214 void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
215 struct kvm_interrupt *irq)
216 {
217 unsigned int prio = BOOKE_IRQPRIO_EXTERNAL;
218
219 if (irq->irq == KVM_INTERRUPT_SET_LEVEL)
220 prio = BOOKE_IRQPRIO_EXTERNAL_LEVEL;
221
222 kvmppc_booke_queue_irqprio(vcpu, prio);
223 }
224
225 void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu)
226 {
227 clear_bit(BOOKE_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions);
228 clear_bit(BOOKE_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions);
229 }
230
231 static void kvmppc_core_queue_watchdog(struct kvm_vcpu *vcpu)
232 {
233 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_WATCHDOG);
234 }
235
236 static void kvmppc_core_dequeue_watchdog(struct kvm_vcpu *vcpu)
237 {
238 clear_bit(BOOKE_IRQPRIO_WATCHDOG, &vcpu->arch.pending_exceptions);
239 }
240
241 static void set_guest_srr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
242 {
243 #ifdef CONFIG_KVM_BOOKE_HV
244 mtspr(SPRN_GSRR0, srr0);
245 mtspr(SPRN_GSRR1, srr1);
246 #else
247 vcpu->arch.shared->srr0 = srr0;
248 vcpu->arch.shared->srr1 = srr1;
249 #endif
250 }
251
252 static void set_guest_csrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
253 {
254 vcpu->arch.csrr0 = srr0;
255 vcpu->arch.csrr1 = srr1;
256 }
257
258 static void set_guest_dsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
259 {
260 if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) {
261 vcpu->arch.dsrr0 = srr0;
262 vcpu->arch.dsrr1 = srr1;
263 } else {
264 set_guest_csrr(vcpu, srr0, srr1);
265 }
266 }
267
268 static void set_guest_mcsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
269 {
270 vcpu->arch.mcsrr0 = srr0;
271 vcpu->arch.mcsrr1 = srr1;
272 }
273
274 static unsigned long get_guest_dear(struct kvm_vcpu *vcpu)
275 {
276 #ifdef CONFIG_KVM_BOOKE_HV
277 return mfspr(SPRN_GDEAR);
278 #else
279 return vcpu->arch.shared->dar;
280 #endif
281 }
282
283 static void set_guest_dear(struct kvm_vcpu *vcpu, unsigned long dear)
284 {
285 #ifdef CONFIG_KVM_BOOKE_HV
286 mtspr(SPRN_GDEAR, dear);
287 #else
288 vcpu->arch.shared->dar = dear;
289 #endif
290 }
291
292 static unsigned long get_guest_esr(struct kvm_vcpu *vcpu)
293 {
294 #ifdef CONFIG_KVM_BOOKE_HV
295 return mfspr(SPRN_GESR);
296 #else
297 return vcpu->arch.shared->esr;
298 #endif
299 }
300
301 static void set_guest_esr(struct kvm_vcpu *vcpu, u32 esr)
302 {
303 #ifdef CONFIG_KVM_BOOKE_HV
304 mtspr(SPRN_GESR, esr);
305 #else
306 vcpu->arch.shared->esr = esr;
307 #endif
308 }
309
310 static unsigned long get_guest_epr(struct kvm_vcpu *vcpu)
311 {
312 #ifdef CONFIG_KVM_BOOKE_HV
313 return mfspr(SPRN_GEPR);
314 #else
315 return vcpu->arch.epr;
316 #endif
317 }
318
319 /* Deliver the interrupt of the corresponding priority, if possible. */
320 static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,
321 unsigned int priority)
322 {
323 int allowed = 0;
324 ulong msr_mask = 0;
325 bool update_esr = false, update_dear = false, update_epr = false;
326 ulong crit_raw = vcpu->arch.shared->critical;
327 ulong crit_r1 = kvmppc_get_gpr(vcpu, 1);
328 bool crit;
329 bool keep_irq = false;
330 enum int_class int_class;
331 ulong new_msr = vcpu->arch.shared->msr;
332
333 /* Truncate crit indicators in 32 bit mode */
334 if (!(vcpu->arch.shared->msr & MSR_SF)) {
335 crit_raw &= 0xffffffff;
336 crit_r1 &= 0xffffffff;
337 }
338
339 /* Critical section when crit == r1 */
340 crit = (crit_raw == crit_r1);
341 /* ... and we're in supervisor mode */
342 crit = crit && !(vcpu->arch.shared->msr & MSR_PR);
343
344 if (priority == BOOKE_IRQPRIO_EXTERNAL_LEVEL) {
345 priority = BOOKE_IRQPRIO_EXTERNAL;
346 keep_irq = true;
347 }
348
349 if ((priority == BOOKE_IRQPRIO_EXTERNAL) && vcpu->arch.epr_enabled)
350 update_epr = true;
351
352 switch (priority) {
353 case BOOKE_IRQPRIO_DTLB_MISS:
354 case BOOKE_IRQPRIO_DATA_STORAGE:
355 case BOOKE_IRQPRIO_ALIGNMENT:
356 update_dear = true;
357 /* fall through */
358 case BOOKE_IRQPRIO_INST_STORAGE:
359 case BOOKE_IRQPRIO_PROGRAM:
360 update_esr = true;
361 /* fall through */
362 case BOOKE_IRQPRIO_ITLB_MISS:
363 case BOOKE_IRQPRIO_SYSCALL:
364 case BOOKE_IRQPRIO_FP_UNAVAIL:
365 case BOOKE_IRQPRIO_SPE_UNAVAIL:
366 case BOOKE_IRQPRIO_SPE_FP_DATA:
367 case BOOKE_IRQPRIO_SPE_FP_ROUND:
368 case BOOKE_IRQPRIO_AP_UNAVAIL:
369 allowed = 1;
370 msr_mask = MSR_CE | MSR_ME | MSR_DE;
371 int_class = INT_CLASS_NONCRIT;
372 break;
373 case BOOKE_IRQPRIO_WATCHDOG:
374 case BOOKE_IRQPRIO_CRITICAL:
375 case BOOKE_IRQPRIO_DBELL_CRIT:
376 allowed = vcpu->arch.shared->msr & MSR_CE;
377 allowed = allowed && !crit;
378 msr_mask = MSR_ME;
379 int_class = INT_CLASS_CRIT;
380 break;
381 case BOOKE_IRQPRIO_MACHINE_CHECK:
382 allowed = vcpu->arch.shared->msr & MSR_ME;
383 allowed = allowed && !crit;
384 int_class = INT_CLASS_MC;
385 break;
386 case BOOKE_IRQPRIO_DECREMENTER:
387 case BOOKE_IRQPRIO_FIT:
388 keep_irq = true;
389 /* fall through */
390 case BOOKE_IRQPRIO_EXTERNAL:
391 case BOOKE_IRQPRIO_DBELL:
392 allowed = vcpu->arch.shared->msr & MSR_EE;
393 allowed = allowed && !crit;
394 msr_mask = MSR_CE | MSR_ME | MSR_DE;
395 int_class = INT_CLASS_NONCRIT;
396 break;
397 case BOOKE_IRQPRIO_DEBUG:
398 allowed = vcpu->arch.shared->msr & MSR_DE;
399 allowed = allowed && !crit;
400 msr_mask = MSR_ME;
401 int_class = INT_CLASS_CRIT;
402 break;
403 }
404
405 if (allowed) {
406 switch (int_class) {
407 case INT_CLASS_NONCRIT:
408 set_guest_srr(vcpu, vcpu->arch.pc,
409 vcpu->arch.shared->msr);
410 break;
411 case INT_CLASS_CRIT:
412 set_guest_csrr(vcpu, vcpu->arch.pc,
413 vcpu->arch.shared->msr);
414 break;
415 case INT_CLASS_DBG:
416 set_guest_dsrr(vcpu, vcpu->arch.pc,
417 vcpu->arch.shared->msr);
418 break;
419 case INT_CLASS_MC:
420 set_guest_mcsrr(vcpu, vcpu->arch.pc,
421 vcpu->arch.shared->msr);
422 break;
423 }
424
425 vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[priority];
426 if (update_esr == true)
427 set_guest_esr(vcpu, vcpu->arch.queued_esr);
428 if (update_dear == true)
429 set_guest_dear(vcpu, vcpu->arch.queued_dear);
430 if (update_epr == true)
431 kvm_make_request(KVM_REQ_EPR_EXIT, vcpu);
432
433 new_msr &= msr_mask;
434 #if defined(CONFIG_64BIT)
435 if (vcpu->arch.epcr & SPRN_EPCR_ICM)
436 new_msr |= MSR_CM;
437 #endif
438 kvmppc_set_msr(vcpu, new_msr);
439
440 if (!keep_irq)
441 clear_bit(priority, &vcpu->arch.pending_exceptions);
442 }
443
444 #ifdef CONFIG_KVM_BOOKE_HV
445 /*
446 * If an interrupt is pending but masked, raise a guest doorbell
447 * so that we are notified when the guest enables the relevant
448 * MSR bit.
449 */
450 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_EE)
451 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_NONCRIT);
452 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_CE)
453 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_CRIT);
454 if (vcpu->arch.pending_exceptions & BOOKE_IRQPRIO_MACHINE_CHECK)
455 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_MC);
456 #endif
457
458 return allowed;
459 }
460
461 /*
462 * Return the number of jiffies until the next timeout. If the timeout is
463 * longer than the NEXT_TIMER_MAX_DELTA, then return NEXT_TIMER_MAX_DELTA
464 * because the larger value can break the timer APIs.
465 */
466 static unsigned long watchdog_next_timeout(struct kvm_vcpu *vcpu)
467 {
468 u64 tb, wdt_tb, wdt_ticks = 0;
469 u64 nr_jiffies = 0;
470 u32 period = TCR_GET_WP(vcpu->arch.tcr);
471
472 wdt_tb = 1ULL << (63 - period);
473 tb = get_tb();
474 /*
475 * The watchdog timeout will hapeen when TB bit corresponding
476 * to watchdog will toggle from 0 to 1.
477 */
478 if (tb & wdt_tb)
479 wdt_ticks = wdt_tb;
480
481 wdt_ticks += wdt_tb - (tb & (wdt_tb - 1));
482
483 /* Convert timebase ticks to jiffies */
484 nr_jiffies = wdt_ticks;
485
486 if (do_div(nr_jiffies, tb_ticks_per_jiffy))
487 nr_jiffies++;
488
489 return min_t(unsigned long long, nr_jiffies, NEXT_TIMER_MAX_DELTA);
490 }
491
492 static void arm_next_watchdog(struct kvm_vcpu *vcpu)
493 {
494 unsigned long nr_jiffies;
495 unsigned long flags;
496
497 /*
498 * If TSR_ENW and TSR_WIS are not set then no need to exit to
499 * userspace, so clear the KVM_REQ_WATCHDOG request.
500 */
501 if ((vcpu->arch.tsr & (TSR_ENW | TSR_WIS)) != (TSR_ENW | TSR_WIS))
502 clear_bit(KVM_REQ_WATCHDOG, &vcpu->requests);
503
504 spin_lock_irqsave(&vcpu->arch.wdt_lock, flags);
505 nr_jiffies = watchdog_next_timeout(vcpu);
506 /*
507 * If the number of jiffies of watchdog timer >= NEXT_TIMER_MAX_DELTA
508 * then do not run the watchdog timer as this can break timer APIs.
509 */
510 if (nr_jiffies < NEXT_TIMER_MAX_DELTA)
511 mod_timer(&vcpu->arch.wdt_timer, jiffies + nr_jiffies);
512 else
513 del_timer(&vcpu->arch.wdt_timer);
514 spin_unlock_irqrestore(&vcpu->arch.wdt_lock, flags);
515 }
516
517 void kvmppc_watchdog_func(unsigned long data)
518 {
519 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data;
520 u32 tsr, new_tsr;
521 int final;
522
523 do {
524 new_tsr = tsr = vcpu->arch.tsr;
525 final = 0;
526
527 /* Time out event */
528 if (tsr & TSR_ENW) {
529 if (tsr & TSR_WIS)
530 final = 1;
531 else
532 new_tsr = tsr | TSR_WIS;
533 } else {
534 new_tsr = tsr | TSR_ENW;
535 }
536 } while (cmpxchg(&vcpu->arch.tsr, tsr, new_tsr) != tsr);
537
538 if (new_tsr & TSR_WIS) {
539 smp_wmb();
540 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
541 kvm_vcpu_kick(vcpu);
542 }
543
544 /*
545 * If this is final watchdog expiry and some action is required
546 * then exit to userspace.
547 */
548 if (final && (vcpu->arch.tcr & TCR_WRC_MASK) &&
549 vcpu->arch.watchdog_enabled) {
550 smp_wmb();
551 kvm_make_request(KVM_REQ_WATCHDOG, vcpu);
552 kvm_vcpu_kick(vcpu);
553 }
554
555 /*
556 * Stop running the watchdog timer after final expiration to
557 * prevent the host from being flooded with timers if the
558 * guest sets a short period.
559 * Timers will resume when TSR/TCR is updated next time.
560 */
561 if (!final)
562 arm_next_watchdog(vcpu);
563 }
564
565 static void update_timer_ints(struct kvm_vcpu *vcpu)
566 {
567 if ((vcpu->arch.tcr & TCR_DIE) && (vcpu->arch.tsr & TSR_DIS))
568 kvmppc_core_queue_dec(vcpu);
569 else
570 kvmppc_core_dequeue_dec(vcpu);
571
572 if ((vcpu->arch.tcr & TCR_WIE) && (vcpu->arch.tsr & TSR_WIS))
573 kvmppc_core_queue_watchdog(vcpu);
574 else
575 kvmppc_core_dequeue_watchdog(vcpu);
576 }
577
578 static void kvmppc_core_check_exceptions(struct kvm_vcpu *vcpu)
579 {
580 unsigned long *pending = &vcpu->arch.pending_exceptions;
581 unsigned int priority;
582
583 priority = __ffs(*pending);
584 while (priority < BOOKE_IRQPRIO_MAX) {
585 if (kvmppc_booke_irqprio_deliver(vcpu, priority))
586 break;
587
588 priority = find_next_bit(pending,
589 BITS_PER_BYTE * sizeof(*pending),
590 priority + 1);
591 }
592
593 /* Tell the guest about our interrupt status */
594 vcpu->arch.shared->int_pending = !!*pending;
595 }
596
597 /* Check pending exceptions and deliver one, if possible. */
598 int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
599 {
600 int r = 0;
601 WARN_ON_ONCE(!irqs_disabled());
602
603 kvmppc_core_check_exceptions(vcpu);
604
605 if (vcpu->requests) {
606 /* Exception delivery raised request; start over */
607 return 1;
608 }
609
610 if (vcpu->arch.shared->msr & MSR_WE) {
611 local_irq_enable();
612 kvm_vcpu_block(vcpu);
613 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
614 local_irq_disable();
615
616 kvmppc_set_exit_type(vcpu, EMULATED_MTMSRWE_EXITS);
617 r = 1;
618 };
619
620 return r;
621 }
622
623 int kvmppc_core_check_requests(struct kvm_vcpu *vcpu)
624 {
625 int r = 1; /* Indicate we want to get back into the guest */
626
627 if (kvm_check_request(KVM_REQ_PENDING_TIMER, vcpu))
628 update_timer_ints(vcpu);
629 #if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC)
630 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
631 kvmppc_core_flush_tlb(vcpu);
632 #endif
633
634 if (kvm_check_request(KVM_REQ_WATCHDOG, vcpu)) {
635 vcpu->run->exit_reason = KVM_EXIT_WATCHDOG;
636 r = 0;
637 }
638
639 if (kvm_check_request(KVM_REQ_EPR_EXIT, vcpu)) {
640 vcpu->run->epr.epr = 0;
641 vcpu->arch.epr_needed = true;
642 vcpu->run->exit_reason = KVM_EXIT_EPR;
643 r = 0;
644 }
645
646 return r;
647 }
648
649 int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
650 {
651 int ret, s;
652 #ifdef CONFIG_PPC_FPU
653 unsigned int fpscr;
654 int fpexc_mode;
655 u64 fpr[32];
656 #endif
657
658 if (!vcpu->arch.sane) {
659 kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
660 return -EINVAL;
661 }
662
663 local_irq_disable();
664 s = kvmppc_prepare_to_enter(vcpu);
665 if (s <= 0) {
666 local_irq_enable();
667 ret = s;
668 goto out;
669 }
670 kvmppc_lazy_ee_enable();
671
672 kvm_guest_enter();
673
674 #ifdef CONFIG_PPC_FPU
675 /* Save userspace FPU state in stack */
676 enable_kernel_fp();
677 memcpy(fpr, current->thread.fpr, sizeof(current->thread.fpr));
678 fpscr = current->thread.fpscr.val;
679 fpexc_mode = current->thread.fpexc_mode;
680
681 /* Restore guest FPU state to thread */
682 memcpy(current->thread.fpr, vcpu->arch.fpr, sizeof(vcpu->arch.fpr));
683 current->thread.fpscr.val = vcpu->arch.fpscr;
684
685 /*
686 * Since we can't trap on MSR_FP in GS-mode, we consider the guest
687 * as always using the FPU. Kernel usage of FP (via
688 * enable_kernel_fp()) in this thread must not occur while
689 * vcpu->fpu_active is set.
690 */
691 vcpu->fpu_active = 1;
692
693 kvmppc_load_guest_fp(vcpu);
694 #endif
695
696 ret = __kvmppc_vcpu_run(kvm_run, vcpu);
697
698 /* No need for kvm_guest_exit. It's done in handle_exit.
699 We also get here with interrupts enabled. */
700
701 #ifdef CONFIG_PPC_FPU
702 kvmppc_save_guest_fp(vcpu);
703
704 vcpu->fpu_active = 0;
705
706 /* Save guest FPU state from thread */
707 memcpy(vcpu->arch.fpr, current->thread.fpr, sizeof(vcpu->arch.fpr));
708 vcpu->arch.fpscr = current->thread.fpscr.val;
709
710 /* Restore userspace FPU state from stack */
711 memcpy(current->thread.fpr, fpr, sizeof(current->thread.fpr));
712 current->thread.fpscr.val = fpscr;
713 current->thread.fpexc_mode = fpexc_mode;
714 #endif
715
716 out:
717 vcpu->mode = OUTSIDE_GUEST_MODE;
718 return ret;
719 }
720
721 static int emulation_exit(struct kvm_run *run, struct kvm_vcpu *vcpu)
722 {
723 enum emulation_result er;
724
725 er = kvmppc_emulate_instruction(run, vcpu);
726 switch (er) {
727 case EMULATE_DONE:
728 /* don't overwrite subtypes, just account kvm_stats */
729 kvmppc_account_exit_stat(vcpu, EMULATED_INST_EXITS);
730 /* Future optimization: only reload non-volatiles if
731 * they were actually modified by emulation. */
732 return RESUME_GUEST_NV;
733
734 case EMULATE_DO_DCR:
735 run->exit_reason = KVM_EXIT_DCR;
736 return RESUME_HOST;
737
738 case EMULATE_FAIL:
739 printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n",
740 __func__, vcpu->arch.pc, vcpu->arch.last_inst);
741 /* For debugging, encode the failing instruction and
742 * report it to userspace. */
743 run->hw.hardware_exit_reason = ~0ULL << 32;
744 run->hw.hardware_exit_reason |= vcpu->arch.last_inst;
745 kvmppc_core_queue_program(vcpu, ESR_PIL);
746 return RESUME_HOST;
747
748 case EMULATE_EXIT_USER:
749 return RESUME_HOST;
750
751 default:
752 BUG();
753 }
754 }
755
756 static void kvmppc_fill_pt_regs(struct pt_regs *regs)
757 {
758 ulong r1, ip, msr, lr;
759
760 asm("mr %0, 1" : "=r"(r1));
761 asm("mflr %0" : "=r"(lr));
762 asm("mfmsr %0" : "=r"(msr));
763 asm("bl 1f; 1: mflr %0" : "=r"(ip));
764
765 memset(regs, 0, sizeof(*regs));
766 regs->gpr[1] = r1;
767 regs->nip = ip;
768 regs->msr = msr;
769 regs->link = lr;
770 }
771
772 /*
773 * For interrupts needed to be handled by host interrupt handlers,
774 * corresponding host handler are called from here in similar way
775 * (but not exact) as they are called from low level handler
776 * (such as from arch/powerpc/kernel/head_fsl_booke.S).
777 */
778 static void kvmppc_restart_interrupt(struct kvm_vcpu *vcpu,
779 unsigned int exit_nr)
780 {
781 struct pt_regs regs;
782
783 switch (exit_nr) {
784 case BOOKE_INTERRUPT_EXTERNAL:
785 kvmppc_fill_pt_regs(&regs);
786 do_IRQ(&regs);
787 break;
788 case BOOKE_INTERRUPT_DECREMENTER:
789 kvmppc_fill_pt_regs(&regs);
790 timer_interrupt(&regs);
791 break;
792 #if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_BOOK3E_64)
793 case BOOKE_INTERRUPT_DOORBELL:
794 kvmppc_fill_pt_regs(&regs);
795 doorbell_exception(&regs);
796 break;
797 #endif
798 case BOOKE_INTERRUPT_MACHINE_CHECK:
799 /* FIXME */
800 break;
801 case BOOKE_INTERRUPT_PERFORMANCE_MONITOR:
802 kvmppc_fill_pt_regs(&regs);
803 performance_monitor_exception(&regs);
804 break;
805 case BOOKE_INTERRUPT_WATCHDOG:
806 kvmppc_fill_pt_regs(&regs);
807 #ifdef CONFIG_BOOKE_WDT
808 WatchdogException(&regs);
809 #else
810 unknown_exception(&regs);
811 #endif
812 break;
813 case BOOKE_INTERRUPT_CRITICAL:
814 unknown_exception(&regs);
815 break;
816 }
817 }
818
819 /**
820 * kvmppc_handle_exit
821 *
822 * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
823 */
824 int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
825 unsigned int exit_nr)
826 {
827 int r = RESUME_HOST;
828 int s;
829
830 /* update before a new last_exit_type is rewritten */
831 kvmppc_update_timing_stats(vcpu);
832
833 /* restart interrupts if they were meant for the host */
834 kvmppc_restart_interrupt(vcpu, exit_nr);
835
836 local_irq_enable();
837
838 trace_kvm_exit(exit_nr, vcpu);
839 kvm_guest_exit();
840
841 run->exit_reason = KVM_EXIT_UNKNOWN;
842 run->ready_for_interrupt_injection = 1;
843
844 switch (exit_nr) {
845 case BOOKE_INTERRUPT_MACHINE_CHECK:
846 printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR));
847 kvmppc_dump_vcpu(vcpu);
848 /* For debugging, send invalid exit reason to user space */
849 run->hw.hardware_exit_reason = ~1ULL << 32;
850 run->hw.hardware_exit_reason |= mfspr(SPRN_MCSR);
851 r = RESUME_HOST;
852 break;
853
854 case BOOKE_INTERRUPT_EXTERNAL:
855 kvmppc_account_exit(vcpu, EXT_INTR_EXITS);
856 r = RESUME_GUEST;
857 break;
858
859 case BOOKE_INTERRUPT_DECREMENTER:
860 kvmppc_account_exit(vcpu, DEC_EXITS);
861 r = RESUME_GUEST;
862 break;
863
864 case BOOKE_INTERRUPT_WATCHDOG:
865 r = RESUME_GUEST;
866 break;
867
868 case BOOKE_INTERRUPT_DOORBELL:
869 kvmppc_account_exit(vcpu, DBELL_EXITS);
870 r = RESUME_GUEST;
871 break;
872
873 case BOOKE_INTERRUPT_GUEST_DBELL_CRIT:
874 kvmppc_account_exit(vcpu, GDBELL_EXITS);
875
876 /*
877 * We are here because there is a pending guest interrupt
878 * which could not be delivered as MSR_CE or MSR_ME was not
879 * set. Once we break from here we will retry delivery.
880 */
881 r = RESUME_GUEST;
882 break;
883
884 case BOOKE_INTERRUPT_GUEST_DBELL:
885 kvmppc_account_exit(vcpu, GDBELL_EXITS);
886
887 /*
888 * We are here because there is a pending guest interrupt
889 * which could not be delivered as MSR_EE was not set. Once
890 * we break from here we will retry delivery.
891 */
892 r = RESUME_GUEST;
893 break;
894
895 case BOOKE_INTERRUPT_PERFORMANCE_MONITOR:
896 r = RESUME_GUEST;
897 break;
898
899 case BOOKE_INTERRUPT_HV_PRIV:
900 r = emulation_exit(run, vcpu);
901 break;
902
903 case BOOKE_INTERRUPT_PROGRAM:
904 if (vcpu->arch.shared->msr & (MSR_PR | MSR_GS)) {
905 /*
906 * Program traps generated by user-level software must
907 * be handled by the guest kernel.
908 *
909 * In GS mode, hypervisor privileged instructions trap
910 * on BOOKE_INTERRUPT_HV_PRIV, not here, so these are
911 * actual program interrupts, handled by the guest.
912 */
913 kvmppc_core_queue_program(vcpu, vcpu->arch.fault_esr);
914 r = RESUME_GUEST;
915 kvmppc_account_exit(vcpu, USR_PR_INST);
916 break;
917 }
918
919 r = emulation_exit(run, vcpu);
920 break;
921
922 case BOOKE_INTERRUPT_FP_UNAVAIL:
923 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL);
924 kvmppc_account_exit(vcpu, FP_UNAVAIL);
925 r = RESUME_GUEST;
926 break;
927
928 #ifdef CONFIG_SPE
929 case BOOKE_INTERRUPT_SPE_UNAVAIL: {
930 if (vcpu->arch.shared->msr & MSR_SPE)
931 kvmppc_vcpu_enable_spe(vcpu);
932 else
933 kvmppc_booke_queue_irqprio(vcpu,
934 BOOKE_IRQPRIO_SPE_UNAVAIL);
935 r = RESUME_GUEST;
936 break;
937 }
938
939 case BOOKE_INTERRUPT_SPE_FP_DATA:
940 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_DATA);
941 r = RESUME_GUEST;
942 break;
943
944 case BOOKE_INTERRUPT_SPE_FP_ROUND:
945 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND);
946 r = RESUME_GUEST;
947 break;
948 #else
949 case BOOKE_INTERRUPT_SPE_UNAVAIL:
950 /*
951 * Guest wants SPE, but host kernel doesn't support it. Send
952 * an "unimplemented operation" program check to the guest.
953 */
954 kvmppc_core_queue_program(vcpu, ESR_PUO | ESR_SPV);
955 r = RESUME_GUEST;
956 break;
957
958 /*
959 * These really should never happen without CONFIG_SPE,
960 * as we should never enable the real MSR[SPE] in the guest.
961 */
962 case BOOKE_INTERRUPT_SPE_FP_DATA:
963 case BOOKE_INTERRUPT_SPE_FP_ROUND:
964 printk(KERN_CRIT "%s: unexpected SPE interrupt %u at %08lx\n",
965 __func__, exit_nr, vcpu->arch.pc);
966 run->hw.hardware_exit_reason = exit_nr;
967 r = RESUME_HOST;
968 break;
969 #endif
970
971 case BOOKE_INTERRUPT_DATA_STORAGE:
972 kvmppc_core_queue_data_storage(vcpu, vcpu->arch.fault_dear,
973 vcpu->arch.fault_esr);
974 kvmppc_account_exit(vcpu, DSI_EXITS);
975 r = RESUME_GUEST;
976 break;
977
978 case BOOKE_INTERRUPT_INST_STORAGE:
979 kvmppc_core_queue_inst_storage(vcpu, vcpu->arch.fault_esr);
980 kvmppc_account_exit(vcpu, ISI_EXITS);
981 r = RESUME_GUEST;
982 break;
983
984 case BOOKE_INTERRUPT_ALIGNMENT:
985 kvmppc_core_queue_alignment(vcpu, vcpu->arch.fault_dear,
986 vcpu->arch.fault_esr);
987 r = RESUME_GUEST;
988 break;
989
990 #ifdef CONFIG_KVM_BOOKE_HV
991 case BOOKE_INTERRUPT_HV_SYSCALL:
992 if (!(vcpu->arch.shared->msr & MSR_PR)) {
993 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
994 } else {
995 /*
996 * hcall from guest userspace -- send privileged
997 * instruction program check.
998 */
999 kvmppc_core_queue_program(vcpu, ESR_PPR);
1000 }
1001
1002 r = RESUME_GUEST;
1003 break;
1004 #else
1005 case BOOKE_INTERRUPT_SYSCALL:
1006 if (!(vcpu->arch.shared->msr & MSR_PR) &&
1007 (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) {
1008 /* KVM PV hypercalls */
1009 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
1010 r = RESUME_GUEST;
1011 } else {
1012 /* Guest syscalls */
1013 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL);
1014 }
1015 kvmppc_account_exit(vcpu, SYSCALL_EXITS);
1016 r = RESUME_GUEST;
1017 break;
1018 #endif
1019
1020 case BOOKE_INTERRUPT_DTLB_MISS: {
1021 unsigned long eaddr = vcpu->arch.fault_dear;
1022 int gtlb_index;
1023 gpa_t gpaddr;
1024 gfn_t gfn;
1025
1026 #ifdef CONFIG_KVM_E500V2
1027 if (!(vcpu->arch.shared->msr & MSR_PR) &&
1028 (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) {
1029 kvmppc_map_magic(vcpu);
1030 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
1031 r = RESUME_GUEST;
1032
1033 break;
1034 }
1035 #endif
1036
1037 /* Check the guest TLB. */
1038 gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr);
1039 if (gtlb_index < 0) {
1040 /* The guest didn't have a mapping for it. */
1041 kvmppc_core_queue_dtlb_miss(vcpu,
1042 vcpu->arch.fault_dear,
1043 vcpu->arch.fault_esr);
1044 kvmppc_mmu_dtlb_miss(vcpu);
1045 kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS);
1046 r = RESUME_GUEST;
1047 break;
1048 }
1049
1050 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
1051 gfn = gpaddr >> PAGE_SHIFT;
1052
1053 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
1054 /* The guest TLB had a mapping, but the shadow TLB
1055 * didn't, and it is RAM. This could be because:
1056 * a) the entry is mapping the host kernel, or
1057 * b) the guest used a large mapping which we're faking
1058 * Either way, we need to satisfy the fault without
1059 * invoking the guest. */
1060 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
1061 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
1062 r = RESUME_GUEST;
1063 } else {
1064 /* Guest has mapped and accessed a page which is not
1065 * actually RAM. */
1066 vcpu->arch.paddr_accessed = gpaddr;
1067 vcpu->arch.vaddr_accessed = eaddr;
1068 r = kvmppc_emulate_mmio(run, vcpu);
1069 kvmppc_account_exit(vcpu, MMIO_EXITS);
1070 }
1071
1072 break;
1073 }
1074
1075 case BOOKE_INTERRUPT_ITLB_MISS: {
1076 unsigned long eaddr = vcpu->arch.pc;
1077 gpa_t gpaddr;
1078 gfn_t gfn;
1079 int gtlb_index;
1080
1081 r = RESUME_GUEST;
1082
1083 /* Check the guest TLB. */
1084 gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr);
1085 if (gtlb_index < 0) {
1086 /* The guest didn't have a mapping for it. */
1087 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS);
1088 kvmppc_mmu_itlb_miss(vcpu);
1089 kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS);
1090 break;
1091 }
1092
1093 kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS);
1094
1095 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
1096 gfn = gpaddr >> PAGE_SHIFT;
1097
1098 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
1099 /* The guest TLB had a mapping, but the shadow TLB
1100 * didn't. This could be because:
1101 * a) the entry is mapping the host kernel, or
1102 * b) the guest used a large mapping which we're faking
1103 * Either way, we need to satisfy the fault without
1104 * invoking the guest. */
1105 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
1106 } else {
1107 /* Guest mapped and leaped at non-RAM! */
1108 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK);
1109 }
1110
1111 break;
1112 }
1113
1114 case BOOKE_INTERRUPT_DEBUG: {
1115 u32 dbsr;
1116
1117 vcpu->arch.pc = mfspr(SPRN_CSRR0);
1118
1119 /* clear IAC events in DBSR register */
1120 dbsr = mfspr(SPRN_DBSR);
1121 dbsr &= DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4;
1122 mtspr(SPRN_DBSR, dbsr);
1123
1124 run->exit_reason = KVM_EXIT_DEBUG;
1125 kvmppc_account_exit(vcpu, DEBUG_EXITS);
1126 r = RESUME_HOST;
1127 break;
1128 }
1129
1130 default:
1131 printk(KERN_EMERG "exit_nr %d\n", exit_nr);
1132 BUG();
1133 }
1134
1135 /*
1136 * To avoid clobbering exit_reason, only check for signals if we
1137 * aren't already exiting to userspace for some other reason.
1138 */
1139 if (!(r & RESUME_HOST)) {
1140 local_irq_disable();
1141 s = kvmppc_prepare_to_enter(vcpu);
1142 if (s <= 0) {
1143 local_irq_enable();
1144 r = (s << 2) | RESUME_HOST | (r & RESUME_FLAG_NV);
1145 } else {
1146 kvmppc_lazy_ee_enable();
1147 }
1148 }
1149
1150 return r;
1151 }
1152
1153 static void kvmppc_set_tsr(struct kvm_vcpu *vcpu, u32 new_tsr)
1154 {
1155 u32 old_tsr = vcpu->arch.tsr;
1156
1157 vcpu->arch.tsr = new_tsr;
1158
1159 if ((old_tsr ^ vcpu->arch.tsr) & (TSR_ENW | TSR_WIS))
1160 arm_next_watchdog(vcpu);
1161
1162 update_timer_ints(vcpu);
1163 }
1164
1165 /* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */
1166 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
1167 {
1168 int i;
1169 int r;
1170
1171 vcpu->arch.pc = 0;
1172 vcpu->arch.shared->pir = vcpu->vcpu_id;
1173 kvmppc_set_gpr(vcpu, 1, (16<<20) - 8); /* -8 for the callee-save LR slot */
1174 kvmppc_set_msr(vcpu, 0);
1175
1176 #ifndef CONFIG_KVM_BOOKE_HV
1177 vcpu->arch.shadow_msr = MSR_USER | MSR_DE | MSR_IS | MSR_DS;
1178 vcpu->arch.shadow_pid = 1;
1179 vcpu->arch.shared->msr = 0;
1180 #endif
1181
1182 /* Eye-catching numbers so we know if the guest takes an interrupt
1183 * before it's programmed its own IVPR/IVORs. */
1184 vcpu->arch.ivpr = 0x55550000;
1185 for (i = 0; i < BOOKE_IRQPRIO_MAX; i++)
1186 vcpu->arch.ivor[i] = 0x7700 | i * 4;
1187
1188 kvmppc_init_timing_stats(vcpu);
1189
1190 r = kvmppc_core_vcpu_setup(vcpu);
1191 kvmppc_sanity_check(vcpu);
1192 return r;
1193 }
1194
1195 int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu)
1196 {
1197 /* setup watchdog timer once */
1198 spin_lock_init(&vcpu->arch.wdt_lock);
1199 setup_timer(&vcpu->arch.wdt_timer, kvmppc_watchdog_func,
1200 (unsigned long)vcpu);
1201
1202 return 0;
1203 }
1204
1205 void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu)
1206 {
1207 del_timer_sync(&vcpu->arch.wdt_timer);
1208 }
1209
1210 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
1211 {
1212 int i;
1213
1214 regs->pc = vcpu->arch.pc;
1215 regs->cr = kvmppc_get_cr(vcpu);
1216 regs->ctr = vcpu->arch.ctr;
1217 regs->lr = vcpu->arch.lr;
1218 regs->xer = kvmppc_get_xer(vcpu);
1219 regs->msr = vcpu->arch.shared->msr;
1220 regs->srr0 = vcpu->arch.shared->srr0;
1221 regs->srr1 = vcpu->arch.shared->srr1;
1222 regs->pid = vcpu->arch.pid;
1223 regs->sprg0 = vcpu->arch.shared->sprg0;
1224 regs->sprg1 = vcpu->arch.shared->sprg1;
1225 regs->sprg2 = vcpu->arch.shared->sprg2;
1226 regs->sprg3 = vcpu->arch.shared->sprg3;
1227 regs->sprg4 = vcpu->arch.shared->sprg4;
1228 regs->sprg5 = vcpu->arch.shared->sprg5;
1229 regs->sprg6 = vcpu->arch.shared->sprg6;
1230 regs->sprg7 = vcpu->arch.shared->sprg7;
1231
1232 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
1233 regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
1234
1235 return 0;
1236 }
1237
1238 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
1239 {
1240 int i;
1241
1242 vcpu->arch.pc = regs->pc;
1243 kvmppc_set_cr(vcpu, regs->cr);
1244 vcpu->arch.ctr = regs->ctr;
1245 vcpu->arch.lr = regs->lr;
1246 kvmppc_set_xer(vcpu, regs->xer);
1247 kvmppc_set_msr(vcpu, regs->msr);
1248 vcpu->arch.shared->srr0 = regs->srr0;
1249 vcpu->arch.shared->srr1 = regs->srr1;
1250 kvmppc_set_pid(vcpu, regs->pid);
1251 vcpu->arch.shared->sprg0 = regs->sprg0;
1252 vcpu->arch.shared->sprg1 = regs->sprg1;
1253 vcpu->arch.shared->sprg2 = regs->sprg2;
1254 vcpu->arch.shared->sprg3 = regs->sprg3;
1255 vcpu->arch.shared->sprg4 = regs->sprg4;
1256 vcpu->arch.shared->sprg5 = regs->sprg5;
1257 vcpu->arch.shared->sprg6 = regs->sprg6;
1258 vcpu->arch.shared->sprg7 = regs->sprg7;
1259
1260 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
1261 kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
1262
1263 return 0;
1264 }
1265
1266 static void get_sregs_base(struct kvm_vcpu *vcpu,
1267 struct kvm_sregs *sregs)
1268 {
1269 u64 tb = get_tb();
1270
1271 sregs->u.e.features |= KVM_SREGS_E_BASE;
1272
1273 sregs->u.e.csrr0 = vcpu->arch.csrr0;
1274 sregs->u.e.csrr1 = vcpu->arch.csrr1;
1275 sregs->u.e.mcsr = vcpu->arch.mcsr;
1276 sregs->u.e.esr = get_guest_esr(vcpu);
1277 sregs->u.e.dear = get_guest_dear(vcpu);
1278 sregs->u.e.tsr = vcpu->arch.tsr;
1279 sregs->u.e.tcr = vcpu->arch.tcr;
1280 sregs->u.e.dec = kvmppc_get_dec(vcpu, tb);
1281 sregs->u.e.tb = tb;
1282 sregs->u.e.vrsave = vcpu->arch.vrsave;
1283 }
1284
1285 static int set_sregs_base(struct kvm_vcpu *vcpu,
1286 struct kvm_sregs *sregs)
1287 {
1288 if (!(sregs->u.e.features & KVM_SREGS_E_BASE))
1289 return 0;
1290
1291 vcpu->arch.csrr0 = sregs->u.e.csrr0;
1292 vcpu->arch.csrr1 = sregs->u.e.csrr1;
1293 vcpu->arch.mcsr = sregs->u.e.mcsr;
1294 set_guest_esr(vcpu, sregs->u.e.esr);
1295 set_guest_dear(vcpu, sregs->u.e.dear);
1296 vcpu->arch.vrsave = sregs->u.e.vrsave;
1297 kvmppc_set_tcr(vcpu, sregs->u.e.tcr);
1298
1299 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_DEC) {
1300 vcpu->arch.dec = sregs->u.e.dec;
1301 kvmppc_emulate_dec(vcpu);
1302 }
1303
1304 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_TSR)
1305 kvmppc_set_tsr(vcpu, sregs->u.e.tsr);
1306
1307 return 0;
1308 }
1309
1310 static void get_sregs_arch206(struct kvm_vcpu *vcpu,
1311 struct kvm_sregs *sregs)
1312 {
1313 sregs->u.e.features |= KVM_SREGS_E_ARCH206;
1314
1315 sregs->u.e.pir = vcpu->vcpu_id;
1316 sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0;
1317 sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1;
1318 sregs->u.e.decar = vcpu->arch.decar;
1319 sregs->u.e.ivpr = vcpu->arch.ivpr;
1320 }
1321
1322 static int set_sregs_arch206(struct kvm_vcpu *vcpu,
1323 struct kvm_sregs *sregs)
1324 {
1325 if (!(sregs->u.e.features & KVM_SREGS_E_ARCH206))
1326 return 0;
1327
1328 if (sregs->u.e.pir != vcpu->vcpu_id)
1329 return -EINVAL;
1330
1331 vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0;
1332 vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1;
1333 vcpu->arch.decar = sregs->u.e.decar;
1334 vcpu->arch.ivpr = sregs->u.e.ivpr;
1335
1336 return 0;
1337 }
1338
1339 void kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
1340 {
1341 sregs->u.e.features |= KVM_SREGS_E_IVOR;
1342
1343 sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL];
1344 sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];
1345 sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];
1346 sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];
1347 sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL];
1348 sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];
1349 sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM];
1350 sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];
1351 sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL];
1352 sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];
1353 sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER];
1354 sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT];
1355 sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG];
1356 sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];
1357 sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];
1358 sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];
1359 }
1360
1361 int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
1362 {
1363 if (!(sregs->u.e.features & KVM_SREGS_E_IVOR))
1364 return 0;
1365
1366 vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0];
1367 vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1];
1368 vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2];
1369 vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3];
1370 vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4];
1371 vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5];
1372 vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6];
1373 vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7];
1374 vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8];
1375 vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9];
1376 vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10];
1377 vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11];
1378 vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12];
1379 vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13];
1380 vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14];
1381 vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15];
1382
1383 return 0;
1384 }
1385
1386 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
1387 struct kvm_sregs *sregs)
1388 {
1389 sregs->pvr = vcpu->arch.pvr;
1390
1391 get_sregs_base(vcpu, sregs);
1392 get_sregs_arch206(vcpu, sregs);
1393 kvmppc_core_get_sregs(vcpu, sregs);
1394 return 0;
1395 }
1396
1397 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
1398 struct kvm_sregs *sregs)
1399 {
1400 int ret;
1401
1402 if (vcpu->arch.pvr != sregs->pvr)
1403 return -EINVAL;
1404
1405 ret = set_sregs_base(vcpu, sregs);
1406 if (ret < 0)
1407 return ret;
1408
1409 ret = set_sregs_arch206(vcpu, sregs);
1410 if (ret < 0)
1411 return ret;
1412
1413 return kvmppc_core_set_sregs(vcpu, sregs);
1414 }
1415
1416 int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
1417 {
1418 int r = 0;
1419 union kvmppc_one_reg val;
1420 int size;
1421 long int i;
1422
1423 size = one_reg_size(reg->id);
1424 if (size > sizeof(val))
1425 return -EINVAL;
1426
1427 switch (reg->id) {
1428 case KVM_REG_PPC_IAC1:
1429 case KVM_REG_PPC_IAC2:
1430 case KVM_REG_PPC_IAC3:
1431 case KVM_REG_PPC_IAC4:
1432 i = reg->id - KVM_REG_PPC_IAC1;
1433 val = get_reg_val(reg->id, vcpu->arch.dbg_reg.iac[i]);
1434 break;
1435 case KVM_REG_PPC_DAC1:
1436 case KVM_REG_PPC_DAC2:
1437 i = reg->id - KVM_REG_PPC_DAC1;
1438 val = get_reg_val(reg->id, vcpu->arch.dbg_reg.dac[i]);
1439 break;
1440 case KVM_REG_PPC_EPR: {
1441 u32 epr = get_guest_epr(vcpu);
1442 val = get_reg_val(reg->id, epr);
1443 break;
1444 }
1445 #if defined(CONFIG_64BIT)
1446 case KVM_REG_PPC_EPCR:
1447 val = get_reg_val(reg->id, vcpu->arch.epcr);
1448 break;
1449 #endif
1450 case KVM_REG_PPC_TCR:
1451 val = get_reg_val(reg->id, vcpu->arch.tcr);
1452 break;
1453 case KVM_REG_PPC_TSR:
1454 val = get_reg_val(reg->id, vcpu->arch.tsr);
1455 break;
1456 case KVM_REG_PPC_DEBUG_INST:
1457 val = get_reg_val(reg->id, KVMPPC_INST_EHPRIV);
1458 break;
1459 default:
1460 r = kvmppc_get_one_reg(vcpu, reg->id, &val);
1461 break;
1462 }
1463
1464 if (r)
1465 return r;
1466
1467 if (copy_to_user((char __user *)(unsigned long)reg->addr, &val, size))
1468 r = -EFAULT;
1469
1470 return r;
1471 }
1472
1473 int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
1474 {
1475 int r = 0;
1476 union kvmppc_one_reg val;
1477 int size;
1478 long int i;
1479
1480 size = one_reg_size(reg->id);
1481 if (size > sizeof(val))
1482 return -EINVAL;
1483
1484 if (copy_from_user(&val, (char __user *)(unsigned long)reg->addr, size))
1485 return -EFAULT;
1486
1487 switch (reg->id) {
1488 case KVM_REG_PPC_IAC1:
1489 case KVM_REG_PPC_IAC2:
1490 case KVM_REG_PPC_IAC3:
1491 case KVM_REG_PPC_IAC4:
1492 i = reg->id - KVM_REG_PPC_IAC1;
1493 vcpu->arch.dbg_reg.iac[i] = set_reg_val(reg->id, val);
1494 break;
1495 case KVM_REG_PPC_DAC1:
1496 case KVM_REG_PPC_DAC2:
1497 i = reg->id - KVM_REG_PPC_DAC1;
1498 vcpu->arch.dbg_reg.dac[i] = set_reg_val(reg->id, val);
1499 break;
1500 case KVM_REG_PPC_EPR: {
1501 u32 new_epr = set_reg_val(reg->id, val);
1502 kvmppc_set_epr(vcpu, new_epr);
1503 break;
1504 }
1505 #if defined(CONFIG_64BIT)
1506 case KVM_REG_PPC_EPCR: {
1507 u32 new_epcr = set_reg_val(reg->id, val);
1508 kvmppc_set_epcr(vcpu, new_epcr);
1509 break;
1510 }
1511 #endif
1512 case KVM_REG_PPC_OR_TSR: {
1513 u32 tsr_bits = set_reg_val(reg->id, val);
1514 kvmppc_set_tsr_bits(vcpu, tsr_bits);
1515 break;
1516 }
1517 case KVM_REG_PPC_CLEAR_TSR: {
1518 u32 tsr_bits = set_reg_val(reg->id, val);
1519 kvmppc_clr_tsr_bits(vcpu, tsr_bits);
1520 break;
1521 }
1522 case KVM_REG_PPC_TSR: {
1523 u32 tsr = set_reg_val(reg->id, val);
1524 kvmppc_set_tsr(vcpu, tsr);
1525 break;
1526 }
1527 case KVM_REG_PPC_TCR: {
1528 u32 tcr = set_reg_val(reg->id, val);
1529 kvmppc_set_tcr(vcpu, tcr);
1530 break;
1531 }
1532 default:
1533 r = kvmppc_set_one_reg(vcpu, reg->id, &val);
1534 break;
1535 }
1536
1537 return r;
1538 }
1539
1540 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
1541 struct kvm_guest_debug *dbg)
1542 {
1543 return -EINVAL;
1544 }
1545
1546 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
1547 {
1548 return -ENOTSUPP;
1549 }
1550
1551 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
1552 {
1553 return -ENOTSUPP;
1554 }
1555
1556 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
1557 struct kvm_translation *tr)
1558 {
1559 int r;
1560
1561 r = kvmppc_core_vcpu_translate(vcpu, tr);
1562 return r;
1563 }
1564
1565 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
1566 {
1567 return -ENOTSUPP;
1568 }
1569
1570 void kvmppc_core_free_memslot(struct kvm_memory_slot *free,
1571 struct kvm_memory_slot *dont)
1572 {
1573 }
1574
1575 int kvmppc_core_create_memslot(struct kvm_memory_slot *slot,
1576 unsigned long npages)
1577 {
1578 return 0;
1579 }
1580
1581 int kvmppc_core_prepare_memory_region(struct kvm *kvm,
1582 struct kvm_memory_slot *memslot,
1583 struct kvm_userspace_memory_region *mem)
1584 {
1585 return 0;
1586 }
1587
1588 void kvmppc_core_commit_memory_region(struct kvm *kvm,
1589 struct kvm_userspace_memory_region *mem,
1590 const struct kvm_memory_slot *old)
1591 {
1592 }
1593
1594 void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot)
1595 {
1596 }
1597
1598 void kvmppc_set_epcr(struct kvm_vcpu *vcpu, u32 new_epcr)
1599 {
1600 #if defined(CONFIG_64BIT)
1601 vcpu->arch.epcr = new_epcr;
1602 #ifdef CONFIG_KVM_BOOKE_HV
1603 vcpu->arch.shadow_epcr &= ~SPRN_EPCR_GICM;
1604 if (vcpu->arch.epcr & SPRN_EPCR_ICM)
1605 vcpu->arch.shadow_epcr |= SPRN_EPCR_GICM;
1606 #endif
1607 #endif
1608 }
1609
1610 void kvmppc_set_tcr(struct kvm_vcpu *vcpu, u32 new_tcr)
1611 {
1612 vcpu->arch.tcr = new_tcr;
1613 arm_next_watchdog(vcpu);
1614 update_timer_ints(vcpu);
1615 }
1616
1617 void kvmppc_set_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
1618 {
1619 set_bits(tsr_bits, &vcpu->arch.tsr);
1620 smp_wmb();
1621 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1622 kvm_vcpu_kick(vcpu);
1623 }
1624
1625 void kvmppc_clr_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
1626 {
1627 clear_bits(tsr_bits, &vcpu->arch.tsr);
1628
1629 /*
1630 * We may have stopped the watchdog due to
1631 * being stuck on final expiration.
1632 */
1633 if (tsr_bits & (TSR_ENW | TSR_WIS))
1634 arm_next_watchdog(vcpu);
1635
1636 update_timer_ints(vcpu);
1637 }
1638
1639 void kvmppc_decrementer_func(unsigned long data)
1640 {
1641 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data;
1642
1643 if (vcpu->arch.tcr & TCR_ARE) {
1644 vcpu->arch.dec = vcpu->arch.decar;
1645 kvmppc_emulate_dec(vcpu);
1646 }
1647
1648 kvmppc_set_tsr_bits(vcpu, TSR_DIS);
1649 }
1650
1651 void kvmppc_booke_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1652 {
1653 vcpu->cpu = smp_processor_id();
1654 current->thread.kvm_vcpu = vcpu;
1655 }
1656
1657 void kvmppc_booke_vcpu_put(struct kvm_vcpu *vcpu)
1658 {
1659 current->thread.kvm_vcpu = NULL;
1660 vcpu->cpu = -1;
1661 }
1662
1663 int __init kvmppc_booke_init(void)
1664 {
1665 #ifndef CONFIG_KVM_BOOKE_HV
1666 unsigned long ivor[16];
1667 unsigned long *handler = kvmppc_booke_handler_addr;
1668 unsigned long max_ivor = 0;
1669 unsigned long handler_len;
1670 int i;
1671
1672 /* We install our own exception handlers by hijacking IVPR. IVPR must
1673 * be 16-bit aligned, so we need a 64KB allocation. */
1674 kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO,
1675 VCPU_SIZE_ORDER);
1676 if (!kvmppc_booke_handlers)
1677 return -ENOMEM;
1678
1679 /* XXX make sure our handlers are smaller than Linux's */
1680
1681 /* Copy our interrupt handlers to match host IVORs. That way we don't
1682 * have to swap the IVORs on every guest/host transition. */
1683 ivor[0] = mfspr(SPRN_IVOR0);
1684 ivor[1] = mfspr(SPRN_IVOR1);
1685 ivor[2] = mfspr(SPRN_IVOR2);
1686 ivor[3] = mfspr(SPRN_IVOR3);
1687 ivor[4] = mfspr(SPRN_IVOR4);
1688 ivor[5] = mfspr(SPRN_IVOR5);
1689 ivor[6] = mfspr(SPRN_IVOR6);
1690 ivor[7] = mfspr(SPRN_IVOR7);
1691 ivor[8] = mfspr(SPRN_IVOR8);
1692 ivor[9] = mfspr(SPRN_IVOR9);
1693 ivor[10] = mfspr(SPRN_IVOR10);
1694 ivor[11] = mfspr(SPRN_IVOR11);
1695 ivor[12] = mfspr(SPRN_IVOR12);
1696 ivor[13] = mfspr(SPRN_IVOR13);
1697 ivor[14] = mfspr(SPRN_IVOR14);
1698 ivor[15] = mfspr(SPRN_IVOR15);
1699
1700 for (i = 0; i < 16; i++) {
1701 if (ivor[i] > max_ivor)
1702 max_ivor = i;
1703
1704 handler_len = handler[i + 1] - handler[i];
1705 memcpy((void *)kvmppc_booke_handlers + ivor[i],
1706 (void *)handler[i], handler_len);
1707 }
1708
1709 handler_len = handler[max_ivor + 1] - handler[max_ivor];
1710 flush_icache_range(kvmppc_booke_handlers, kvmppc_booke_handlers +
1711 ivor[max_ivor] + handler_len);
1712 #endif /* !BOOKE_HV */
1713 return 0;
1714 }
1715
1716 void __exit kvmppc_booke_exit(void)
1717 {
1718 free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER);
1719 kvm_exit();
1720 }
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