arch/powerpc/mm/mmu_context_book3s64.c

   1 /*
   2  *  MMU context allocation for 64-bit kernels.
   3  *
   4  *  Copyright (C) 2004 Anton Blanchard, IBM Corp. <anton@samba.org>
   5  *
   6  *  This program is free software; you can redistribute it and/or
   7  *  modify it under the terms of the GNU General Public License
   8  *  as published by the Free Software Foundation; either version
   9  *  2 of the License, or (at your option) any later version.
  10  *
  11  */
  12
  13 #include <linux/sched.h>
  14 #include <linux/kernel.h>
  15 #include <linux/errno.h>
  16 #include <linux/string.h>
  17 #include <linux/types.h>
  18 #include <linux/mm.h>
  19 #include <linux/spinlock.h>
  20 #include <linux/idr.h>
  21 #include <linux/export.h>
  22 #include <linux/gfp.h>
  23 #include <linux/slab.h>
  24
  25 #include <asm/mmu_context.h>
  26 #include <asm/pgalloc.h>
  27
  28 #include "icswx.h"
  29
  30 static DEFINE_SPINLOCK(mmu_context_lock);
  31 static DEFINE_IDA(mmu_context_ida);
  32
  33 static int alloc_context_id(int min_id, int max_id)
  34 {
  35         int index, err;
  36
  37 again:
  38         if (!ida_pre_get(&mmu_context_ida, GFP_KERNEL))
  39                 return -ENOMEM;
  40
  41         spin_lock(&mmu_context_lock);
  42         err = ida_get_new_above(&mmu_context_ida, min_id, &index);
  43         spin_unlock(&mmu_context_lock);
  44
  45         if (err == -EAGAIN)
  46                 goto again;
  47         else if (err)
  48                 return err;
  49
  50         if (index > max_id) {
  51                 spin_lock(&mmu_context_lock);
  52                 ida_remove(&mmu_context_ida, index);
  53                 spin_unlock(&mmu_context_lock);
  54                 return -ENOMEM;
  55         }
  56
  57         return index;
  58 }
  59
  60 void hash__reserve_context_id(int id)
  61 {
  62         int rc, result = 0;
  63
  64         do {
  65                 if (!ida_pre_get(&mmu_context_ida, GFP_KERNEL))
  66                         break;
  67
  68                 spin_lock(&mmu_context_lock);
  69                 rc = ida_get_new_above(&mmu_context_ida, id, &result);
  70                 spin_unlock(&mmu_context_lock);
  71         } while (rc == -EAGAIN);
  72
  73         WARN(result != id, "mmu: Failed to reserve context id %d (rc %d)\n", id, result);
  74 }
  75
  76 int hash__alloc_context_id(void)
  77 {
  78         unsigned long max;
  79
  80         if (mmu_has_feature(MMU_FTR_68_BIT_VA))
  81                 max = MAX_USER_CONTEXT;
  82         else
  83                 max = MAX_USER_CONTEXT_65BIT_VA;
  84
  85         return alloc_context_id(MIN_USER_CONTEXT, max);
  86 }
  87 EXPORT_SYMBOL_GPL(hash__alloc_context_id);
  88
  89 static int hash__init_new_context(struct mm_struct *mm)
  90 {
  91         int index;
  92
  93         index = hash__alloc_context_id();
  94         if (index < 0)
  95                 return index;
  96
  97         /*
  98          * We do switch_slb() early in fork, even before we setup the
  99          * mm->context.addr_limit. Default to max task size so that we copy the
 100          * default values to paca which will help us to handle slb miss early.
 101          */
 102         mm->context.addr_limit = DEFAULT_MAP_WINDOW_USER64;
 103
 104         /*
 105          * The old code would re-promote on fork, we don't do that when using
 106          * slices as it could cause problem promoting slices that have been
 107          * forced down to 4K.
 108          *
 109          * For book3s we have MMU_NO_CONTEXT set to be ~0. Hence check
 110          * explicitly against context.id == 0. This ensures that we properly
 111          * initialize context slice details for newly allocated mm's (which will
 112          * have id == 0) and don't alter context slice inherited via fork (which
 113          * will have id != 0).
 114          *
 115          * We should not be calling init_new_context() on init_mm. Hence a
 116          * check against 0 is OK.
 117          */
 118         if (mm->context.id == 0)
 119                 slice_set_user_psize(mm, mmu_virtual_psize);
 120
 121         subpage_prot_init_new_context(mm);
 122
 123         return index;
 124 }
 125
 126 static int radix__init_new_context(struct mm_struct *mm)
 127 {
 128         unsigned long rts_field;
 129         int index;
 130
 131         index = alloc_context_id(1, PRTB_ENTRIES - 1);
 132         if (index < 0)
 133                 return index;
 134
 135         /*
 136          * set the process table entry,
 137          */
 138         rts_field = radix__get_tree_size();
 139         process_tb[index].prtb0 = cpu_to_be64(rts_field | __pa(mm->pgd) | RADIX_PGD_INDEX_SIZE);
 140
 141         /*
 142          * Order the above store with subsequent update of the PID
 143          * register (at which point HW can start loading/caching
 144          * the entry) and the corresponding load by the MMU from
 145          * the L2 cache.
 146          */
 147         asm volatile("ptesync;isync" : : : "memory");
 148
 149         mm->context.npu_context = NULL;
 150
 151         return index;
 152 }
 153
 154 int init_new_context(struct task_struct *tsk, struct mm_struct *mm)
 155 {
 156         int index;
 157
 158         if (radix_enabled())
 159                 index = radix__init_new_context(mm);
 160         else
 161                 index = hash__init_new_context(mm);
 162
 163         if (index < 0)
 164                 return index;
 165
 166         mm->context.id = index;
 167 #ifdef CONFIG_PPC_ICSWX
 168         mm->context.cop_lockp = kmalloc(sizeof(spinlock_t), GFP_KERNEL);
 169         if (!mm->context.cop_lockp) {
 170                 __destroy_context(index);
 171                 subpage_prot_free(mm);
 172                 mm->context.id = MMU_NO_CONTEXT;
 173                 return -ENOMEM;
 174         }
 175         spin_lock_init(mm->context.cop_lockp);
 176 #endif /* CONFIG_PPC_ICSWX */
 177
 178 #ifdef CONFIG_PPC_64K_PAGES
 179         mm->context.pte_frag = NULL;
 180 #endif
 181 #ifdef CONFIG_SPAPR_TCE_IOMMU
 182         mm_iommu_init(mm);
 183 #endif
 184         return 0;
 185 }
 186
 187 void __destroy_context(int context_id)
 188 {
 189         spin_lock(&mmu_context_lock);
 190         ida_remove(&mmu_context_ida, context_id);
 191         spin_unlock(&mmu_context_lock);
 192 }
 193 EXPORT_SYMBOL_GPL(__destroy_context);
 194
 195 #ifdef CONFIG_PPC_64K_PAGES
 196 static void destroy_pagetable_page(struct mm_struct *mm)
 197 {
 198         int count;
 199         void *pte_frag;
 200         struct page *page;
 201
 202         pte_frag = mm->context.pte_frag;
 203         if (!pte_frag)
 204                 return;
 205
 206         page = virt_to_page(pte_frag);
 207         /* drop all the pending references */
 208         count = ((unsigned long)pte_frag & ~PAGE_MASK) >> PTE_FRAG_SIZE_SHIFT;
 209         /* We allow PTE_FRAG_NR fragments from a PTE page */
 210         if (page_ref_sub_and_test(page, PTE_FRAG_NR - count)) {
 211                 pgtable_page_dtor(page);
 212                 free_hot_cold_page(page, 0);
 213         }
 214 }
 215
 216 #else
 217 static inline void destroy_pagetable_page(struct mm_struct *mm)
 218 {
 219         return;
 220 }
 221 #endif
 222
 223 void destroy_context(struct mm_struct *mm)
 224 {
 225 #ifdef CONFIG_SPAPR_TCE_IOMMU
 226         WARN_ON_ONCE(!list_empty(&mm->context.iommu_group_mem_list));
 227 #endif
 228 #ifdef CONFIG_PPC_ICSWX
 229         drop_cop(mm->context.acop, mm);
 230         kfree(mm->context.cop_lockp);
 231         mm->context.cop_lockp = NULL;
 232 #endif /* CONFIG_PPC_ICSWX */
 233
 234         if (radix_enabled()) {
 235                 /*
 236                  * Radix doesn't have a valid bit in the process table
 237                  * entries. However we know that at least P9 implementation
 238                  * will avoid caching an entry with an invalid RTS field,
 239                  * and 0 is invalid. So this will do.
 240                  */
 241                 process_tb[mm->context.id].prtb0 = 0;
 242         } else
 243                 subpage_prot_free(mm);
 244         destroy_pagetable_page(mm);
 245         __destroy_context(mm->context.id);
 246         mm->context.id = MMU_NO_CONTEXT;
 247 }
 248
 249 #ifdef CONFIG_PPC_RADIX_MMU
 250 void radix__switch_mmu_context(struct mm_struct *prev, struct mm_struct *next)
 251 {
 252
 253         if (cpu_has_feature(CPU_FTR_POWER9_DD1)) {
 254                 isync();
 255                 mtspr(SPRN_PID, next->context.id);
 256                 isync();
 257                 asm volatile(PPC_INVALIDATE_ERAT : : :"memory");
 258         } else {
 259                 mtspr(SPRN_PID, next->context.id);
 260                 isync();
 261         }
 262 }
 263 #endif