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git.proxmox.com Git - mirror_ubuntu-zesty-kernel.git/blob - arch/powerpc/mm/pgtable.c
2 * This file contains common routines for dealing with free of page tables
3 * Along with common page table handling code
5 * Derived from arch/powerpc/mm/tlb_64.c:
6 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
8 * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
9 * and Cort Dougan (PReP) (cort@cs.nmt.edu)
10 * Copyright (C) 1996 Paul Mackerras
12 * Derived from "arch/i386/mm/init.c"
13 * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
15 * Dave Engebretsen <engebret@us.ibm.com>
16 * Rework for PPC64 port.
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License
20 * as published by the Free Software Foundation; either version
21 * 2 of the License, or (at your option) any later version.
24 #include <linux/kernel.h>
25 #include <linux/gfp.h>
27 #include <linux/init.h>
28 #include <linux/percpu.h>
29 #include <linux/hardirq.h>
30 #include <asm/pgalloc.h>
31 #include <asm/tlbflush.h>
36 DEFINE_PER_CPU(struct mmu_gather
, mmu_gathers
);
41 * Handle batching of page table freeing on SMP. Page tables are
42 * queued up and send to be freed later by RCU in order to avoid
43 * freeing a page table page that is being walked without locks
46 static DEFINE_PER_CPU(struct pte_freelist_batch
*, pte_freelist_cur
);
47 static unsigned long pte_freelist_forced_free
;
49 struct pte_freelist_batch
53 unsigned long tables
[0];
56 #define PTE_FREELIST_SIZE \
57 ((PAGE_SIZE - sizeof(struct pte_freelist_batch)) \
58 / sizeof(unsigned long))
60 static void pte_free_smp_sync(void *arg
)
62 /* Do nothing, just ensure we sync with all CPUs */
65 /* This is only called when we are critically out of memory
66 * (and fail to get a page in pte_free_tlb).
68 static void pgtable_free_now(void *table
, unsigned shift
)
70 pte_freelist_forced_free
++;
72 smp_call_function(pte_free_smp_sync
, NULL
, 1);
74 pgtable_free(table
, shift
);
77 static void pte_free_rcu_callback(struct rcu_head
*head
)
79 struct pte_freelist_batch
*batch
=
80 container_of(head
, struct pte_freelist_batch
, rcu
);
83 for (i
= 0; i
< batch
->index
; i
++) {
84 void *table
= (void *)(batch
->tables
[i
] & ~MAX_PGTABLE_INDEX_SIZE
);
85 unsigned shift
= batch
->tables
[i
] & MAX_PGTABLE_INDEX_SIZE
;
87 pgtable_free(table
, shift
);
90 free_page((unsigned long)batch
);
93 static void pte_free_submit(struct pte_freelist_batch
*batch
)
95 INIT_RCU_HEAD(&batch
->rcu
);
96 call_rcu(&batch
->rcu
, pte_free_rcu_callback
);
99 void pgtable_free_tlb(struct mmu_gather
*tlb
, void *table
, unsigned shift
)
101 /* This is safe since tlb_gather_mmu has disabled preemption */
102 struct pte_freelist_batch
**batchp
= &__get_cpu_var(pte_freelist_cur
);
105 if (atomic_read(&tlb
->mm
->mm_users
) < 2 ||
106 cpumask_equal(mm_cpumask(tlb
->mm
), cpumask_of(smp_processor_id()))){
107 pgtable_free(table
, shift
);
111 if (*batchp
== NULL
) {
112 *batchp
= (struct pte_freelist_batch
*)__get_free_page(GFP_ATOMIC
);
113 if (*batchp
== NULL
) {
114 pgtable_free_now(table
, shift
);
117 (*batchp
)->index
= 0;
119 BUG_ON(shift
> MAX_PGTABLE_INDEX_SIZE
);
120 pgf
= (unsigned long)table
| shift
;
121 (*batchp
)->tables
[(*batchp
)->index
++] = pgf
;
122 if ((*batchp
)->index
== PTE_FREELIST_SIZE
) {
123 pte_free_submit(*batchp
);
128 void pte_free_finish(void)
130 /* This is safe since tlb_gather_mmu has disabled preemption */
131 struct pte_freelist_batch
**batchp
= &__get_cpu_var(pte_freelist_cur
);
135 pte_free_submit(*batchp
);
139 #endif /* CONFIG_SMP */
141 static inline int is_exec_fault(void)
143 return current
->thread
.regs
&& TRAP(current
->thread
.regs
) == 0x400;
146 /* We only try to do i/d cache coherency on stuff that looks like
147 * reasonably "normal" PTEs. We currently require a PTE to be present
148 * and we avoid _PAGE_SPECIAL and _PAGE_NO_CACHE. We also only do that
151 static inline int pte_looks_normal(pte_t pte
)
153 return (pte_val(pte
) &
154 (_PAGE_PRESENT
| _PAGE_SPECIAL
| _PAGE_NO_CACHE
| _PAGE_USER
)) ==
155 (_PAGE_PRESENT
| _PAGE_USER
);
158 struct page
* maybe_pte_to_page(pte_t pte
)
160 unsigned long pfn
= pte_pfn(pte
);
163 if (unlikely(!pfn_valid(pfn
)))
165 page
= pfn_to_page(pfn
);
166 if (PageReserved(page
))
171 #if defined(CONFIG_PPC_STD_MMU) || _PAGE_EXEC == 0
173 /* Server-style MMU handles coherency when hashing if HW exec permission
174 * is supposed per page (currently 64-bit only). If not, then, we always
175 * flush the cache for valid PTEs in set_pte. Embedded CPU without HW exec
176 * support falls into the same category.
179 static pte_t
set_pte_filter(pte_t pte
, unsigned long addr
)
181 pte
= __pte(pte_val(pte
) & ~_PAGE_HPTEFLAGS
);
182 if (pte_looks_normal(pte
) && !(cpu_has_feature(CPU_FTR_COHERENT_ICACHE
) ||
183 cpu_has_feature(CPU_FTR_NOEXECUTE
))) {
184 struct page
*pg
= maybe_pte_to_page(pte
);
187 if (!test_bit(PG_arch_1
, &pg
->flags
)) {
189 /* On 8xx, cache control instructions (particularly
190 * "dcbst" from flush_dcache_icache) fault as write
191 * operation if there is an unpopulated TLB entry
192 * for the address in question. To workaround that,
193 * we invalidate the TLB here, thus avoiding dcbst
196 /* 8xx doesn't care about PID, size or ind args */
197 _tlbil_va(addr
, 0, 0, 0);
198 #endif /* CONFIG_8xx */
199 flush_dcache_icache_page(pg
);
200 set_bit(PG_arch_1
, &pg
->flags
);
206 static pte_t
set_access_flags_filter(pte_t pte
, struct vm_area_struct
*vma
,
212 #else /* defined(CONFIG_PPC_STD_MMU) || _PAGE_EXEC == 0 */
214 /* Embedded type MMU with HW exec support. This is a bit more complicated
215 * as we don't have two bits to spare for _PAGE_EXEC and _PAGE_HWEXEC so
216 * instead we "filter out" the exec permission for non clean pages.
218 static pte_t
set_pte_filter(pte_t pte
, unsigned long addr
)
222 /* No exec permission in the first place, move on */
223 if (!(pte_val(pte
) & _PAGE_EXEC
) || !pte_looks_normal(pte
))
226 /* If you set _PAGE_EXEC on weird pages you're on your own */
227 pg
= maybe_pte_to_page(pte
);
231 /* If the page clean, we move on */
232 if (test_bit(PG_arch_1
, &pg
->flags
))
235 /* If it's an exec fault, we flush the cache and make it clean */
236 if (is_exec_fault()) {
237 flush_dcache_icache_page(pg
);
238 set_bit(PG_arch_1
, &pg
->flags
);
242 /* Else, we filter out _PAGE_EXEC */
243 return __pte(pte_val(pte
) & ~_PAGE_EXEC
);
246 static pte_t
set_access_flags_filter(pte_t pte
, struct vm_area_struct
*vma
,
251 /* So here, we only care about exec faults, as we use them
252 * to recover lost _PAGE_EXEC and perform I$/D$ coherency
253 * if necessary. Also if _PAGE_EXEC is already set, same deal,
256 if (dirty
|| (pte_val(pte
) & _PAGE_EXEC
) || !is_exec_fault())
259 #ifdef CONFIG_DEBUG_VM
260 /* So this is an exec fault, _PAGE_EXEC is not set. If it was
261 * an error we would have bailed out earlier in do_page_fault()
262 * but let's make sure of it
264 if (WARN_ON(!(vma
->vm_flags
& VM_EXEC
)))
266 #endif /* CONFIG_DEBUG_VM */
268 /* If you set _PAGE_EXEC on weird pages you're on your own */
269 pg
= maybe_pte_to_page(pte
);
273 /* If the page is already clean, we move on */
274 if (test_bit(PG_arch_1
, &pg
->flags
))
277 /* Clean the page and set PG_arch_1 */
278 flush_dcache_icache_page(pg
);
279 set_bit(PG_arch_1
, &pg
->flags
);
282 return __pte(pte_val(pte
) | _PAGE_EXEC
);
285 #endif /* !(defined(CONFIG_PPC_STD_MMU) || _PAGE_EXEC == 0) */
288 * set_pte stores a linux PTE into the linux page table.
290 void set_pte_at(struct mm_struct
*mm
, unsigned long addr
, pte_t
*ptep
,
293 #ifdef CONFIG_DEBUG_VM
294 WARN_ON(pte_present(*ptep
));
296 /* Note: mm->context.id might not yet have been assigned as
297 * this context might not have been activated yet when this
300 pte
= set_pte_filter(pte
, addr
);
302 /* Perform the setting of the PTE */
303 __set_pte_at(mm
, addr
, ptep
, pte
, 0);
307 * This is called when relaxing access to a PTE. It's also called in the page
308 * fault path when we don't hit any of the major fault cases, ie, a minor
309 * update of _PAGE_ACCESSED, _PAGE_DIRTY, etc... The generic code will have
310 * handled those two for us, we additionally deal with missing execute
311 * permission here on some processors
313 int ptep_set_access_flags(struct vm_area_struct
*vma
, unsigned long address
,
314 pte_t
*ptep
, pte_t entry
, int dirty
)
317 entry
= set_access_flags_filter(entry
, vma
, dirty
);
318 changed
= !pte_same(*(ptep
), entry
);
320 if (!(vma
->vm_flags
& VM_HUGETLB
))
321 assert_pte_locked(vma
->vm_mm
, address
);
322 __ptep_set_access_flags(ptep
, entry
);
323 flush_tlb_page_nohash(vma
, address
);
328 #ifdef CONFIG_DEBUG_VM
329 void assert_pte_locked(struct mm_struct
*mm
, unsigned long addr
)
337 pgd
= mm
->pgd
+ pgd_index(addr
);
338 BUG_ON(pgd_none(*pgd
));
339 pud
= pud_offset(pgd
, addr
);
340 BUG_ON(pud_none(*pud
));
341 pmd
= pmd_offset(pud
, addr
);
342 BUG_ON(!pmd_present(*pmd
));
343 assert_spin_locked(pte_lockptr(mm
, pmd
));
345 #endif /* CONFIG_DEBUG_VM */