arch/powerpc/perf/bhrb.S

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2 /*
   3  * Basic assembly code to read BHRB entries
   4  *
   5  * Copyright 2013 Anshuman Khandual, IBM Corporation.
   6  */
   7 #include <asm/ppc_asm.h>
   8 #include <asm/ppc-opcode.h>
   9
  10         .text
  11
  12 .balign 8
  13
  14 /* r3 = n  (where n = [0-31])
  15  * The maximum number of BHRB entries supported with PPC_MFBHRBE instruction
  16  * is 1024. We have limited number of table entries here as POWER8 implements
  17  * 32 BHRB entries.
  18  */
  19
  20 /* .global read_bhrb */
  21 _GLOBAL(read_bhrb)
  22         cmpldi  r3,31
  23         bgt     1f
  24         ld      r4,bhrb_table@got(r2)
  25         sldi    r3,r3,3
  26         add     r3,r4,r3
  27         mtctr   r3
  28         bctr
  29 1:      li      r3,0
  30         blr
  31
  32 #define MFBHRB_TABLE1(n) PPC_MFBHRBE(R3,n); blr
  33 #define MFBHRB_TABLE2(n) MFBHRB_TABLE1(n); MFBHRB_TABLE1(n+1)
  34 #define MFBHRB_TABLE4(n) MFBHRB_TABLE2(n); MFBHRB_TABLE2(n+2)
  35 #define MFBHRB_TABLE8(n) MFBHRB_TABLE4(n); MFBHRB_TABLE4(n+4)
  36 #define MFBHRB_TABLE16(n) MFBHRB_TABLE8(n); MFBHRB_TABLE8(n+8)
  37 #define MFBHRB_TABLE32(n) MFBHRB_TABLE16(n); MFBHRB_TABLE16(n+16)
  38
  39 bhrb_table:
  40         MFBHRB_TABLE32(0)