arch/powerpc/platforms/44x/machine_check.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  */
   4
   5 #include <linux/kernel.h>
   6 #include <linux/printk.h>
   7 #include <linux/ptrace.h>
   8
   9 #include <asm/reg.h>
  10
  11 int machine_check_440A(struct pt_regs *regs)
  12 {
  13         unsigned long reason = regs->dsisr;
  14
  15         printk("Machine check in kernel mode.\n");
  16         if (reason & ESR_IMCP){
  17                 printk("Instruction Synchronous Machine Check exception\n");
  18                 mtspr(SPRN_ESR, reason & ~ESR_IMCP);
  19         }
  20         else {
  21                 u32 mcsr = mfspr(SPRN_MCSR);
  22                 if (mcsr & MCSR_IB)
  23                         printk("Instruction Read PLB Error\n");
  24                 if (mcsr & MCSR_DRB)
  25                         printk("Data Read PLB Error\n");
  26                 if (mcsr & MCSR_DWB)
  27                         printk("Data Write PLB Error\n");
  28                 if (mcsr & MCSR_TLBP)
  29                         printk("TLB Parity Error\n");
  30                 if (mcsr & MCSR_ICP){
  31                         flush_instruction_cache();
  32                         printk("I-Cache Parity Error\n");
  33                 }
  34                 if (mcsr & MCSR_DCSP)
  35                         printk("D-Cache Search Parity Error\n");
  36                 if (mcsr & MCSR_DCFP)
  37                         printk("D-Cache Flush Parity Error\n");
  38                 if (mcsr & MCSR_IMPE)
  39                         printk("Machine Check exception is imprecise\n");
  40
  41                 /* Clear MCSR */
  42                 mtspr(SPRN_MCSR, mcsr);
  43         }
  44         return 0;
  45 }
  46
  47 #ifdef CONFIG_PPC_47x
  48 int machine_check_47x(struct pt_regs *regs)
  49 {
  50         unsigned long reason = regs->dsisr;
  51         u32 mcsr;
  52
  53         printk(KERN_ERR "Machine check in kernel mode.\n");
  54         if (reason & ESR_IMCP) {
  55                 printk(KERN_ERR "Instruction Synchronous Machine Check exception\n");
  56                 mtspr(SPRN_ESR, reason & ~ESR_IMCP);
  57                 return 0;
  58         }
  59         mcsr = mfspr(SPRN_MCSR);
  60         if (mcsr & MCSR_IB)
  61                 printk(KERN_ERR "Instruction Read PLB Error\n");
  62         if (mcsr & MCSR_DRB)
  63                 printk(KERN_ERR "Data Read PLB Error\n");
  64         if (mcsr & MCSR_DWB)
  65                 printk(KERN_ERR "Data Write PLB Error\n");
  66         if (mcsr & MCSR_TLBP)
  67                 printk(KERN_ERR "TLB Parity Error\n");
  68         if (mcsr & MCSR_ICP) {
  69                 flush_instruction_cache();
  70                 printk(KERN_ERR "I-Cache Parity Error\n");
  71         }
  72         if (mcsr & MCSR_DCSP)
  73                 printk(KERN_ERR "D-Cache Search Parity Error\n");
  74         if (mcsr & PPC47x_MCSR_GPR)
  75                 printk(KERN_ERR "GPR Parity Error\n");
  76         if (mcsr & PPC47x_MCSR_FPR)
  77                 printk(KERN_ERR "FPR Parity Error\n");
  78         if (mcsr & PPC47x_MCSR_IPR)
  79                 printk(KERN_ERR "Machine Check exception is imprecise\n");
  80
  81         /* Clear MCSR */
  82         mtspr(SPRN_MCSR, mcsr);
  83
  84         return 0;
  85 }
  86 #endif /* CONFIG_PPC_47x */