arch/powerpc/platforms/83xx/misc.c

   1 /*
   2  * misc setup functions for MPC83xx
   3  *
   4  * Maintainer: Kumar Gala <galak@kernel.crashing.org>
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 #include <linux/stddef.h>
  13 #include <linux/kernel.h>
  14 #include <linux/of_platform.h>
  15 #include <linux/pci.h>
  16
  17 #include <asm/io.h>
  18 #include <asm/hw_irq.h>
  19 #include <asm/ipic.h>
  20 #include <soc/fsl/qe/qe_ic.h>
  21 #include <sysdev/fsl_soc.h>
  22 #include <sysdev/fsl_pci.h>
  23
  24 #include "mpc83xx.h"
  25
  26 static __be32 __iomem *restart_reg_base;
  27
  28 static int __init mpc83xx_restart_init(void)
  29 {
  30         /* map reset restart_reg_baseister space */
  31         restart_reg_base = ioremap(get_immrbase() + 0x900, 0xff);
  32
  33         return 0;
  34 }
  35
  36 arch_initcall(mpc83xx_restart_init);
  37
  38 void mpc83xx_restart(char *cmd)
  39 {
  40 #define RST_OFFSET      0x00000900
  41 #define RST_PROT_REG    0x00000018
  42 #define RST_CTRL_REG    0x0000001c
  43
  44         local_irq_disable();
  45
  46         if (restart_reg_base) {
  47                 /* enable software reset "RSTE" */
  48                 out_be32(restart_reg_base + (RST_PROT_REG >> 2), 0x52535445);
  49
  50                 /* set software hard reset */
  51                 out_be32(restart_reg_base + (RST_CTRL_REG >> 2), 0x2);
  52         } else {
  53                 printk (KERN_EMERG "Error: Restart registers not mapped, spinning!\n");
  54         }
  55
  56         for (;;) ;
  57 }
  58
  59 long __init mpc83xx_time_init(void)
  60 {
  61 #define SPCR_OFFSET     0x00000110
  62 #define SPCR_TBEN       0x00400000
  63         __be32 __iomem *spcr = ioremap(get_immrbase() + SPCR_OFFSET, 4);
  64         __be32 tmp;
  65
  66         tmp = in_be32(spcr);
  67         out_be32(spcr, tmp | SPCR_TBEN);
  68
  69         iounmap(spcr);
  70
  71         return 0;
  72 }
  73
  74 void __init mpc83xx_ipic_init_IRQ(void)
  75 {
  76         struct device_node *np;
  77
  78         /* looking for fsl,pq2pro-pic which is asl compatible with fsl,ipic */
  79         np = of_find_compatible_node(NULL, NULL, "fsl,ipic");
  80         if (!np)
  81                 np = of_find_node_by_type(NULL, "ipic");
  82         if (!np)
  83                 return;
  84
  85         ipic_init(np, 0);
  86
  87         of_node_put(np);
  88
  89         /* Initialize the default interrupt mapping priorities,
  90          * in case the boot rom changed something on us.
  91          */
  92         ipic_set_default_priority();
  93 }
  94
  95 #ifdef CONFIG_QUICC_ENGINE
  96 void __init mpc83xx_qe_init_IRQ(void)
  97 {
  98         struct device_node *np;
  99
 100         np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
 101         if (!np) {
 102                 np = of_find_node_by_type(NULL, "qeic");
 103                 if (!np)
 104                         return;
 105         }
 106         qe_ic_init(np, 0, qe_ic_cascade_low_ipic, qe_ic_cascade_high_ipic);
 107         of_node_put(np);
 108 }
 109
 110 void __init mpc83xx_ipic_and_qe_init_IRQ(void)
 111 {
 112         mpc83xx_ipic_init_IRQ();
 113         mpc83xx_qe_init_IRQ();
 114 }
 115 #endif /* CONFIG_QUICC_ENGINE */
 116
 117 static const struct of_device_id of_bus_ids[] __initconst = {
 118         { .type = "soc", },
 119         { .compatible = "soc", },
 120         { .compatible = "simple-bus" },
 121         { .compatible = "gianfar" },
 122         { .compatible = "gpio-leds", },
 123         { .type = "qe", },
 124         { .compatible = "fsl,qe", },
 125         {},
 126 };
 127
 128 int __init mpc83xx_declare_of_platform_devices(void)
 129 {
 130         of_platform_bus_probe(NULL, of_bus_ids, NULL);
 131         return 0;
 132 }
 133
 134 #ifdef CONFIG_PCI
 135 void __init mpc83xx_setup_pci(void)
 136 {
 137         struct device_node *np;
 138
 139         for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
 140                 mpc83xx_add_bridge(np);
 141         for_each_compatible_node(np, "pci", "fsl,mpc8314-pcie")
 142                 mpc83xx_add_bridge(np);
 143 }
 144 #endif