arch/powerpc/platforms/Kconfig

   1 menu "Platform support"
   2
   3 source "arch/powerpc/platforms/pseries/Kconfig"
   4 source "arch/powerpc/platforms/iseries/Kconfig"
   5 source "arch/powerpc/platforms/chrp/Kconfig"
   6 source "arch/powerpc/platforms/512x/Kconfig"
   7 source "arch/powerpc/platforms/52xx/Kconfig"
   8 source "arch/powerpc/platforms/powermac/Kconfig"
   9 source "arch/powerpc/platforms/prep/Kconfig"
  10 source "arch/powerpc/platforms/maple/Kconfig"
  11 source "arch/powerpc/platforms/pasemi/Kconfig"
  12 source "arch/powerpc/platforms/ps3/Kconfig"
  13 source "arch/powerpc/platforms/cell/Kconfig"
  14 source "arch/powerpc/platforms/8xx/Kconfig"
  15 source "arch/powerpc/platforms/82xx/Kconfig"
  16 source "arch/powerpc/platforms/83xx/Kconfig"
  17 source "arch/powerpc/platforms/85xx/Kconfig"
  18 source "arch/powerpc/platforms/86xx/Kconfig"
  19 source "arch/powerpc/platforms/embedded6xx/Kconfig"
  20 source "arch/powerpc/platforms/44x/Kconfig"
  21 source "arch/powerpc/platforms/40x/Kconfig"
  22 source "arch/powerpc/platforms/amigaone/Kconfig"
  23
  24 config KVM_GUEST
  25         bool "KVM Guest support"
  26         default y
  27         ---help---
  28           This option enables various optimizations for running under the KVM
  29           hypervisor. Overhead for the kernel when not running inside KVM should
  30           be minimal.
  31
  32           In case of doubt, say Y
  33
  34 config PPC_NATIVE
  35         bool
  36         depends on 6xx || PPC64
  37         help
  38           Support for running natively on the hardware, i.e. without
  39           a hypervisor. This option is not user-selectable but should
  40           be selected by all platforms that need it.
  41
  42 config PPC_OF_BOOT_TRAMPOLINE
  43         bool "Support booting from Open Firmware or yaboot"
  44         depends on 6xx || PPC64
  45         default y
  46         help
  47           Support from booting from Open Firmware or yaboot using an
  48           Open Firmware client interface. This enables the kernel to
  49           communicate with open firmware to retrieve system informations
  50           such as the device tree.
  51
  52           In case of doubt, say Y
  53
  54 config UDBG_RTAS_CONSOLE
  55         bool "RTAS based debug console"
  56         depends on PPC_RTAS
  57         default n
  58
  59 config PPC_UDBG_BEAT
  60         bool "BEAT based debug console"
  61         depends on PPC_CELLEB
  62         default n
  63
  64 config XICS
  65         depends on PPC_PSERIES
  66         bool
  67         default y
  68
  69 config IPIC
  70         bool
  71         default n
  72
  73 config MPIC
  74         bool
  75         default n
  76
  77 config MPIC_WEIRD
  78         bool
  79         default n
  80
  81 config PPC_I8259
  82         bool
  83         default n
  84
  85 config U3_DART
  86         bool
  87         depends on PPC64
  88         default n
  89
  90 config PPC_RTAS
  91         bool
  92         default n
  93
  94 config RTAS_ERROR_LOGGING
  95         bool
  96         depends on PPC_RTAS
  97         default n
  98
  99 config PPC_RTAS_DAEMON
 100         bool
 101         depends on PPC_RTAS
 102         default n
 103
 104 config RTAS_PROC
 105         bool "Proc interface to RTAS"
 106         depends on PPC_RTAS
 107         default y
 108
 109 config RTAS_FLASH
 110         tristate "Firmware flash interface"
 111         depends on PPC64 && RTAS_PROC
 112
 113 config MMIO_NVRAM
 114         bool
 115         default n
 116
 117 config MPIC_U3_HT_IRQS
 118         bool
 119         default n
 120
 121 config MPIC_BROKEN_REGREAD
 122         bool
 123         depends on MPIC
 124         help
 125           This option enables a MPIC driver workaround for some chips
 126           that have a bug that causes some interrupt source information
 127           to not read back properly. It is safe to use on other chips as
 128           well, but enabling it uses about 8KB of memory to keep copies
 129           of the register contents in software.
 130
 131 config IBMVIO
 132         depends on PPC_PSERIES || PPC_ISERIES
 133         bool
 134         default y
 135
 136 config IBMEBUS
 137         depends on PPC_PSERIES
 138         bool "Support for GX bus based adapters"
 139         help
 140           Bus device driver for GX bus based adapters.
 141
 142 config PPC_MPC106
 143         bool
 144         default n
 145
 146 config PPC_970_NAP
 147         bool
 148         default n
 149
 150 config PPC_INDIRECT_IO
 151         bool
 152         select GENERIC_IOMAP
 153         default n
 154
 155 config GENERIC_IOMAP
 156         bool
 157         default n
 158
 159 source "drivers/cpufreq/Kconfig"
 160
 161 menu "CPU Frequency drivers"
 162         depends on CPU_FREQ
 163
 164 config CPU_FREQ_PMAC
 165         bool "Support for Apple PowerBooks"
 166         depends on ADB_PMU && PPC32
 167         select CPU_FREQ_TABLE
 168         help
 169           This adds support for frequency switching on Apple PowerBooks,
 170           this currently includes some models of iBook & Titanium
 171           PowerBook.
 172
 173 config CPU_FREQ_PMAC64
 174         bool "Support for some Apple G5s"
 175         depends on PPC_PMAC && PPC64
 176         select CPU_FREQ_TABLE
 177         help
 178           This adds support for frequency switching on Apple iMac G5,
 179           and some of the more recent desktop G5 machines as well.
 180
 181 config PPC_PASEMI_CPUFREQ
 182         bool "Support for PA Semi PWRficient"
 183         depends on PPC_PASEMI
 184         default y
 185         select CPU_FREQ_TABLE
 186         help
 187           This adds the support for frequency switching on PA Semi
 188           PWRficient processors.
 189
 190 endmenu
 191
 192 config PPC601_SYNC_FIX
 193         bool "Workarounds for PPC601 bugs"
 194         depends on 6xx && (PPC_PREP || PPC_PMAC)
 195         help
 196           Some versions of the PPC601 (the first PowerPC chip) have bugs which
 197           mean that extra synchronization instructions are required near
 198           certain instructions, typically those that make major changes to the
 199           CPU state.  These extra instructions reduce performance slightly.
 200           If you say N here, these extra instructions will not be included,
 201           resulting in a kernel which will run faster but may not run at all
 202           on some systems with the PPC601 chip.
 203
 204           If in doubt, say Y here.
 205
 206 config TAU
 207         bool "On-chip CPU temperature sensor support"
 208         depends on 6xx
 209         help
 210           G3 and G4 processors have an on-chip temperature sensor called the
 211           'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
 212           temperature within 2-4 degrees Celsius. This option shows the current
 213           on-die temperature in /proc/cpuinfo if the cpu supports it.
 214
 215           Unfortunately, on some chip revisions, this sensor is very inaccurate
 216           and in many cases, does not work at all, so don't assume the cpu
 217           temp is actually what /proc/cpuinfo says it is.
 218
 219 config TAU_INT
 220         bool "Interrupt driven TAU driver (DANGEROUS)"
 221         depends on TAU
 222         ---help---
 223           The TAU supports an interrupt driven mode which causes an interrupt
 224           whenever the temperature goes out of range. This is the fastest way
 225           to get notified the temp has exceeded a range. With this option off,
 226           a timer is used to re-check the temperature periodically.
 227
 228           However, on some cpus it appears that the TAU interrupt hardware
 229           is buggy and can cause a situation which would lead unexplained hard
 230           lockups.
 231
 232           Unless you are extending the TAU driver, or enjoy kernel/hardware
 233           debugging, leave this option off.
 234
 235 config TAU_AVERAGE
 236         bool "Average high and low temp"
 237         depends on TAU
 238         ---help---
 239           The TAU hardware can compare the temperature to an upper and lower
 240           bound.  The default behavior is to show both the upper and lower
 241           bound in /proc/cpuinfo. If the range is large, the temperature is
 242           either changing a lot, or the TAU hardware is broken (likely on some
 243           G4's). If the range is small (around 4 degrees), the temperature is
 244           relatively stable.  If you say Y here, a single temperature value,
 245           halfway between the upper and lower bounds, will be reported in
 246           /proc/cpuinfo.
 247
 248           If in doubt, say N here.
 249
 250 config QUICC_ENGINE
 251         bool "Freescale QUICC Engine (QE) Support"
 252         depends on FSL_SOC
 253         select PPC_LIB_RHEAP
 254         select CRC32
 255         help
 256           The QUICC Engine (QE) is a new generation of communications
 257           coprocessors on Freescale embedded CPUs (akin to CPM in older chips).
 258           Selecting this option means that you wish to build a kernel
 259           for a machine with a QE coprocessor.
 260
 261 config QE_GPIO
 262         bool "QE GPIO support"
 263         depends on QUICC_ENGINE
 264         select GENERIC_GPIO
 265         select ARCH_REQUIRE_GPIOLIB
 266         help
 267           Say Y here if you're going to use hardware that connects to the
 268           QE GPIOs.
 269
 270 config CPM2
 271         bool "Enable support for the CPM2 (Communications Processor Module)"
 272         depends on (FSL_SOC_BOOKE && PPC32) || 8260
 273         select CPM
 274         select PPC_LIB_RHEAP
 275         select PPC_PCI_CHOICE
 276         select ARCH_REQUIRE_GPIOLIB
 277         select GENERIC_GPIO
 278         help
 279           The CPM2 (Communications Processor Module) is a coprocessor on
 280           embedded CPUs made by Freescale.  Selecting this option means that
 281           you wish to build a kernel for a machine with a CPM2 coprocessor
 282           on it (826x, 827x, 8560).
 283
 284 config AXON_RAM
 285         tristate "Axon DDR2 memory device driver"
 286         depends on PPC_IBM_CELL_BLADE && BLOCK
 287         default m
 288         help
 289           It registers one block device per Axon's DDR2 memory bank found
 290           on a system. Block devices are called axonram?, their major and
 291           minor numbers are available in /proc/devices, /proc/partitions or
 292           in /sys/block/axonram?/dev.
 293
 294 config FSL_ULI1575
 295         bool
 296         default n
 297         select GENERIC_ISA_DMA
 298         help
 299           Supports for the ULI1575 PCIe south bridge that exists on some
 300           Freescale reference boards. The boards all use the ULI in pretty
 301           much the same way.
 302
 303 config CPM
 304         bool
 305         select PPC_CLOCK
 306
 307 config OF_RTC
 308         bool
 309         help
 310           Uses information from the OF or flattened device tree to instantiate
 311           platform devices for direct mapped RTC chips like the DS1742 or DS1743.
 312
 313 source "arch/powerpc/sysdev/bestcomm/Kconfig"
 314
 315 config MPC8xxx_GPIO
 316         bool "MPC8xxx GPIO support"
 317         depends on PPC_MPC831x || PPC_MPC834x || PPC_MPC837x || FSL_SOC_BOOKE || PPC_86xx
 318         select GENERIC_GPIO
 319         select ARCH_REQUIRE_GPIOLIB
 320         help
 321           Say Y here if you're going to use hardware that connects to the
 322           MPC831x/834x/837x/8572/8610 GPIOs.
 323
 324 config SIMPLE_GPIO
 325         bool "Support for simple, memory-mapped GPIO controllers"
 326         depends on PPC
 327         select GENERIC_GPIO
 328         select ARCH_REQUIRE_GPIOLIB
 329         help
 330           Say Y here to support simple, memory-mapped GPIO controllers.
 331           These are usually BCSRs used to control board's switches, LEDs,
 332           chip-selects, Ethernet/USB PHY's power and various other small
 333           on-board peripherals.
 334
 335 config MCU_MPC8349EMITX
 336         tristate "MPC8349E-mITX MCU driver"
 337         depends on I2C && PPC_83xx
 338         select GENERIC_GPIO
 339         select ARCH_REQUIRE_GPIOLIB
 340         help
 341           Say Y here to enable soft power-off functionality on the Freescale
 342           boards with the MPC8349E-mITX-compatible MCU chips. This driver will
 343           also register MCU GPIOs with the generic GPIO API, so you'll able
 344           to use MCU pins as GPIOs.
 345
 346 config XILINX_PCI
 347         bool "Xilinx PCI host bridge support"
 348         depends on PCI && XILINX_VIRTEX
 349
 350 endmenu