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1 menu "Platform support"
2
3 source "arch/powerpc/platforms/powernv/Kconfig"
4 source "arch/powerpc/platforms/pseries/Kconfig"
5 source "arch/powerpc/platforms/chrp/Kconfig"
6 source "arch/powerpc/platforms/512x/Kconfig"
7 source "arch/powerpc/platforms/52xx/Kconfig"
8 source "arch/powerpc/platforms/powermac/Kconfig"
9 source "arch/powerpc/platforms/prep/Kconfig"
10 source "arch/powerpc/platforms/maple/Kconfig"
11 source "arch/powerpc/platforms/pasemi/Kconfig"
12 source "arch/powerpc/platforms/ps3/Kconfig"
13 source "arch/powerpc/platforms/cell/Kconfig"
14 source "arch/powerpc/platforms/8xx/Kconfig"
15 source "arch/powerpc/platforms/82xx/Kconfig"
16 source "arch/powerpc/platforms/83xx/Kconfig"
17 source "arch/powerpc/platforms/85xx/Kconfig"
18 source "arch/powerpc/platforms/86xx/Kconfig"
19 source "arch/powerpc/platforms/embedded6xx/Kconfig"
20 source "arch/powerpc/platforms/44x/Kconfig"
21 source "arch/powerpc/platforms/40x/Kconfig"
22 source "arch/powerpc/platforms/amigaone/Kconfig"
23 source "arch/powerpc/platforms/wsp/Kconfig"
24
25 config KVM_GUEST
26 bool "KVM Guest support"
27 default n
28 select EPAPR_PARAVIRT
29 ---help---
30 This option enables various optimizations for running under the KVM
31 hypervisor. Overhead for the kernel when not running inside KVM should
32 be minimal.
33
34 In case of doubt, say Y
35
36 config EPAPR_PARAVIRT
37 bool "ePAPR para-virtualization support"
38 default n
39 help
40 Enables ePAPR para-virtualization support for guests.
41
42 In case of doubt, say Y
43
44 config PPC_NATIVE
45 bool
46 depends on 6xx || PPC64
47 help
48 Support for running natively on the hardware, i.e. without
49 a hypervisor. This option is not user-selectable but should
50 be selected by all platforms that need it.
51
52 config PPC_OF_BOOT_TRAMPOLINE
53 bool "Support booting from Open Firmware or yaboot"
54 depends on 6xx || PPC64
55 default y
56 help
57 Support from booting from Open Firmware or yaboot using an
58 Open Firmware client interface. This enables the kernel to
59 communicate with open firmware to retrieve system information
60 such as the device tree.
61
62 In case of doubt, say Y
63
64 config UDBG_RTAS_CONSOLE
65 bool "RTAS based debug console"
66 depends on PPC_RTAS
67 default n
68
69 config PPC_SMP_MUXED_IPI
70 bool
71 help
72 Select this opton if your platform supports SMP and your
73 interrupt controller provides less than 4 interrupts to each
74 cpu. This will enable the generic code to multiplex the 4
75 messages on to one ipi.
76
77 config PPC_UDBG_BEAT
78 bool "BEAT based debug console"
79 depends on PPC_CELLEB
80 default n
81
82 config IPIC
83 bool
84 default n
85
86 config MPIC
87 bool
88 default n
89
90 config PPC_EPAPR_HV_PIC
91 bool
92 default n
93 select EPAPR_PARAVIRT
94
95 config MPIC_WEIRD
96 bool
97 default n
98
99 config MPIC_MSGR
100 bool "MPIC message register support"
101 depends on MPIC
102 default n
103 help
104 Enables support for the MPIC message registers. These
105 registers are used for inter-processor communication.
106
107 config PPC_I8259
108 bool
109 default n
110
111 config U3_DART
112 bool
113 depends on PPC64
114 default n
115
116 config PPC_RTAS
117 bool
118 default n
119
120 config RTAS_ERROR_LOGGING
121 bool
122 depends on PPC_RTAS
123 default n
124
125 config PPC_RTAS_DAEMON
126 bool
127 depends on PPC_RTAS
128 default n
129
130 config RTAS_PROC
131 bool "Proc interface to RTAS"
132 depends on PPC_RTAS
133 default y
134
135 config RTAS_FLASH
136 tristate "Firmware flash interface"
137 depends on PPC64 && RTAS_PROC
138
139 config MMIO_NVRAM
140 bool
141 default n
142
143 config MPIC_U3_HT_IRQS
144 bool
145 default n
146
147 config MPIC_BROKEN_REGREAD
148 bool
149 depends on MPIC
150 help
151 This option enables a MPIC driver workaround for some chips
152 that have a bug that causes some interrupt source information
153 to not read back properly. It is safe to use on other chips as
154 well, but enabling it uses about 8KB of memory to keep copies
155 of the register contents in software.
156
157 config IBMVIO
158 depends on PPC_PSERIES
159 bool
160 default y
161
162 config IBMEBUS
163 depends on PPC_PSERIES
164 bool "Support for GX bus based adapters"
165 help
166 Bus device driver for GX bus based adapters.
167
168 config PPC_MPC106
169 bool
170 default n
171
172 config PPC_970_NAP
173 bool
174 default n
175
176 config PPC_P7_NAP
177 bool
178 default n
179
180 config PPC_INDIRECT_IO
181 bool
182 select GENERIC_IOMAP
183
184 config PPC_INDIRECT_PIO
185 bool
186 select PPC_INDIRECT_IO
187
188 config PPC_INDIRECT_MMIO
189 bool
190 select PPC_INDIRECT_IO
191
192 config PPC_IO_WORKAROUNDS
193 bool
194
195 source "drivers/cpufreq/Kconfig"
196
197 menu "CPU Frequency drivers"
198 depends on CPU_FREQ
199
200 config CPU_FREQ_PMAC
201 bool "Support for Apple PowerBooks"
202 depends on ADB_PMU && PPC32
203 select CPU_FREQ_TABLE
204 help
205 This adds support for frequency switching on Apple PowerBooks,
206 this currently includes some models of iBook & Titanium
207 PowerBook.
208
209 config CPU_FREQ_PMAC64
210 bool "Support for some Apple G5s"
211 depends on PPC_PMAC && PPC64
212 select CPU_FREQ_TABLE
213 help
214 This adds support for frequency switching on Apple iMac G5,
215 and some of the more recent desktop G5 machines as well.
216
217 config PPC_PASEMI_CPUFREQ
218 bool "Support for PA Semi PWRficient"
219 depends on PPC_PASEMI
220 default y
221 select CPU_FREQ_TABLE
222 help
223 This adds the support for frequency switching on PA Semi
224 PWRficient processors.
225
226 endmenu
227
228 menu "CPUIdle driver"
229
230 source "drivers/cpuidle/Kconfig"
231
232 endmenu
233
234 config PPC601_SYNC_FIX
235 bool "Workarounds for PPC601 bugs"
236 depends on 6xx && (PPC_PREP || PPC_PMAC)
237 help
238 Some versions of the PPC601 (the first PowerPC chip) have bugs which
239 mean that extra synchronization instructions are required near
240 certain instructions, typically those that make major changes to the
241 CPU state. These extra instructions reduce performance slightly.
242 If you say N here, these extra instructions will not be included,
243 resulting in a kernel which will run faster but may not run at all
244 on some systems with the PPC601 chip.
245
246 If in doubt, say Y here.
247
248 config TAU
249 bool "On-chip CPU temperature sensor support"
250 depends on 6xx
251 help
252 G3 and G4 processors have an on-chip temperature sensor called the
253 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
254 temperature within 2-4 degrees Celsius. This option shows the current
255 on-die temperature in /proc/cpuinfo if the cpu supports it.
256
257 Unfortunately, on some chip revisions, this sensor is very inaccurate
258 and in many cases, does not work at all, so don't assume the cpu
259 temp is actually what /proc/cpuinfo says it is.
260
261 config TAU_INT
262 bool "Interrupt driven TAU driver (DANGEROUS)"
263 depends on TAU
264 ---help---
265 The TAU supports an interrupt driven mode which causes an interrupt
266 whenever the temperature goes out of range. This is the fastest way
267 to get notified the temp has exceeded a range. With this option off,
268 a timer is used to re-check the temperature periodically.
269
270 However, on some cpus it appears that the TAU interrupt hardware
271 is buggy and can cause a situation which would lead unexplained hard
272 lockups.
273
274 Unless you are extending the TAU driver, or enjoy kernel/hardware
275 debugging, leave this option off.
276
277 config TAU_AVERAGE
278 bool "Average high and low temp"
279 depends on TAU
280 ---help---
281 The TAU hardware can compare the temperature to an upper and lower
282 bound. The default behavior is to show both the upper and lower
283 bound in /proc/cpuinfo. If the range is large, the temperature is
284 either changing a lot, or the TAU hardware is broken (likely on some
285 G4's). If the range is small (around 4 degrees), the temperature is
286 relatively stable. If you say Y here, a single temperature value,
287 halfway between the upper and lower bounds, will be reported in
288 /proc/cpuinfo.
289
290 If in doubt, say N here.
291
292 config QUICC_ENGINE
293 bool "Freescale QUICC Engine (QE) Support"
294 depends on FSL_SOC && PPC32
295 select PPC_LIB_RHEAP
296 select CRC32
297 help
298 The QUICC Engine (QE) is a new generation of communications
299 coprocessors on Freescale embedded CPUs (akin to CPM in older chips).
300 Selecting this option means that you wish to build a kernel
301 for a machine with a QE coprocessor.
302
303 config QE_GPIO
304 bool "QE GPIO support"
305 depends on QUICC_ENGINE
306 select GENERIC_GPIO
307 select ARCH_REQUIRE_GPIOLIB
308 help
309 Say Y here if you're going to use hardware that connects to the
310 QE GPIOs.
311
312 config CPM2
313 bool "Enable support for the CPM2 (Communications Processor Module)"
314 depends on (FSL_SOC_BOOKE && PPC32) || 8260
315 select CPM
316 select PPC_LIB_RHEAP
317 select PPC_PCI_CHOICE
318 select ARCH_REQUIRE_GPIOLIB
319 select GENERIC_GPIO
320 help
321 The CPM2 (Communications Processor Module) is a coprocessor on
322 embedded CPUs made by Freescale. Selecting this option means that
323 you wish to build a kernel for a machine with a CPM2 coprocessor
324 on it (826x, 827x, 8560).
325
326 config AXON_RAM
327 tristate "Axon DDR2 memory device driver"
328 depends on PPC_IBM_CELL_BLADE && BLOCK
329 default m
330 help
331 It registers one block device per Axon's DDR2 memory bank found
332 on a system. Block devices are called axonram?, their major and
333 minor numbers are available in /proc/devices, /proc/partitions or
334 in /sys/block/axonram?/dev.
335
336 config FSL_ULI1575
337 bool
338 default n
339 select GENERIC_ISA_DMA
340 help
341 Supports for the ULI1575 PCIe south bridge that exists on some
342 Freescale reference boards. The boards all use the ULI in pretty
343 much the same way.
344
345 config CPM
346 bool
347 select PPC_CLOCK
348
349 config OF_RTC
350 bool
351 help
352 Uses information from the OF or flattened device tree to instantiate
353 platform devices for direct mapped RTC chips like the DS1742 or DS1743.
354
355 config SIMPLE_GPIO
356 bool "Support for simple, memory-mapped GPIO controllers"
357 depends on PPC
358 select GENERIC_GPIO
359 select ARCH_REQUIRE_GPIOLIB
360 help
361 Say Y here to support simple, memory-mapped GPIO controllers.
362 These are usually BCSRs used to control board's switches, LEDs,
363 chip-selects, Ethernet/USB PHY's power and various other small
364 on-board peripherals.
365
366 config MCU_MPC8349EMITX
367 bool "MPC8349E-mITX MCU driver"
368 depends on I2C=y && PPC_83xx
369 select GENERIC_GPIO
370 select ARCH_REQUIRE_GPIOLIB
371 help
372 Say Y here to enable soft power-off functionality on the Freescale
373 boards with the MPC8349E-mITX-compatible MCU chips. This driver will
374 also register MCU GPIOs with the generic GPIO API, so you'll able
375 to use MCU pins as GPIOs.
376
377 config XILINX_PCI
378 bool "Xilinx PCI host bridge support"
379 depends on PCI && XILINX_VIRTEX
380
381 endmenu