arch/powerpc/platforms/cell/Kconfig

   1 # SPDX-License-Identifier: GPL-2.0
   2 config PPC_CELL
   3         bool
   4
   5 config PPC_CELL_COMMON
   6         bool
   7         select PPC_CELL
   8         select PPC_DCR_MMIO
   9         select PPC_INDIRECT_PIO
  10         select PPC_INDIRECT_MMIO
  11         select PPC_NATIVE
  12         select PPC_RTAS
  13         select IRQ_EDGE_EOI_HANDLER
  14
  15 config PPC_CELL_NATIVE
  16         bool
  17         select PPC_CELL_COMMON
  18         select MPIC
  19         select PPC_IO_WORKAROUNDS
  20         select IBM_EMAC_EMAC4 if IBM_EMAC
  21         select IBM_EMAC_RGMII if IBM_EMAC
  22         select IBM_EMAC_ZMII if IBM_EMAC #test only
  23         select IBM_EMAC_TAH if IBM_EMAC  #test only
  24
  25 config PPC_IBM_CELL_BLADE
  26         bool "IBM Cell Blade"
  27         depends on PPC64 && PPC_BOOK3S && CPU_BIG_ENDIAN
  28         select PPC_CELL_NATIVE
  29         select PPC_OF_PLATFORM_PCI
  30         select FORCE_PCI
  31         select MMIO_NVRAM
  32         select PPC_UDBG_16550
  33         select UDBG_RTAS_CONSOLE
  34
  35 config AXON_MSI
  36         bool
  37         depends on PPC_IBM_CELL_BLADE && PCI_MSI
  38         default y
  39
  40 menu "Cell Broadband Engine options"
  41         depends on PPC_CELL
  42
  43 config SPU_FS
  44         tristate "SPU file system"
  45         default m
  46         depends on PPC_CELL
  47         select SPU_BASE
  48         help
  49           The SPU file system is used to access Synergistic Processing
  50           Units on machines implementing the Broadband Processor
  51           Architecture.
  52
  53 config SPU_BASE
  54         bool
  55         select PPC_COPRO_BASE
  56
  57 config CBE_RAS
  58         bool "RAS features for bare metal Cell BE"
  59         depends on PPC_CELL_NATIVE
  60         default y
  61
  62 config PPC_IBM_CELL_RESETBUTTON
  63         bool "IBM Cell Blade Pinhole reset button"
  64         depends on CBE_RAS && PPC_IBM_CELL_BLADE
  65         default y
  66         help
  67           Support Pinhole Resetbutton on IBM Cell blades.
  68           This adds a method to trigger system reset via front panel pinhole button.
  69
  70 config PPC_IBM_CELL_POWERBUTTON
  71         tristate "IBM Cell Blade power button"
  72         depends on PPC_IBM_CELL_BLADE && INPUT_EVDEV
  73         default y
  74         help
  75           Support Powerbutton on IBM Cell blades.
  76           This will enable the powerbutton as an input device.
  77
  78 config CBE_THERM
  79         tristate "CBE thermal support"
  80         default m
  81         depends on CBE_RAS && SPU_BASE
  82
  83 config PPC_PMI
  84         tristate
  85         default y
  86         depends on CPU_FREQ_CBE_PMI || PPC_IBM_CELL_POWERBUTTON
  87         help
  88           PMI (Platform Management Interrupt) is a way to
  89           communicate with the BMC (Baseboard Management Controller).
  90           It is used in some IBM Cell blades.
  91
  92 config CBE_CPUFREQ_SPU_GOVERNOR
  93         tristate "CBE frequency scaling based on SPU usage"
  94         depends on SPU_FS && CPU_FREQ
  95         default m
  96         help
  97           This governor checks for spu usage to adjust the cpu frequency.
  98           If no spu is running on a given cpu, that cpu will be throttled to
  99           the minimal possible frequency.
 100
 101 endmenu
 102
 103 config OPROFILE_CELL
 104         def_bool y
 105         depends on PPC_CELL_NATIVE && (OPROFILE = m || OPROFILE = y) && SPU_BASE
 106