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1 /*
2 * Low-level SPU handling
3 *
4 * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
5 *
6 * Author: Arnd Bergmann <arndb@de.ibm.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2, or (at your option)
11 * any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23 #undef DEBUG
24
25 #include <linux/interrupt.h>
26 #include <linux/list.h>
27 #include <linux/module.h>
28 #include <linux/poll.h>
29 #include <linux/ptrace.h>
30 #include <linux/slab.h>
31 #include <linux/wait.h>
32
33 #include <asm/io.h>
34 #include <asm/prom.h>
35 #include <linux/mutex.h>
36 #include <asm/spu.h>
37 #include <asm/spu_priv1.h>
38 #include <asm/mmu_context.h>
39
40 #include "interrupt.h"
41
42 const struct spu_priv1_ops *spu_priv1_ops;
43
44 EXPORT_SYMBOL_GPL(spu_priv1_ops);
45
46 static int __spu_trap_invalid_dma(struct spu *spu)
47 {
48 pr_debug("%s\n", __FUNCTION__);
49 force_sig(SIGBUS, /* info, */ current);
50 return 0;
51 }
52
53 static int __spu_trap_dma_align(struct spu *spu)
54 {
55 pr_debug("%s\n", __FUNCTION__);
56 force_sig(SIGBUS, /* info, */ current);
57 return 0;
58 }
59
60 static int __spu_trap_error(struct spu *spu)
61 {
62 pr_debug("%s\n", __FUNCTION__);
63 force_sig(SIGILL, /* info, */ current);
64 return 0;
65 }
66
67 static void spu_restart_dma(struct spu *spu)
68 {
69 struct spu_priv2 __iomem *priv2 = spu->priv2;
70
71 if (!test_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags))
72 out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESTART_DMA_COMMAND);
73 }
74
75 static int __spu_trap_data_seg(struct spu *spu, unsigned long ea)
76 {
77 struct spu_priv2 __iomem *priv2 = spu->priv2;
78 struct mm_struct *mm = spu->mm;
79 u64 esid, vsid, llp;
80
81 pr_debug("%s\n", __FUNCTION__);
82
83 if (test_bit(SPU_CONTEXT_SWITCH_ACTIVE, &spu->flags)) {
84 /* SLBs are pre-loaded for context switch, so
85 * we should never get here!
86 */
87 printk("%s: invalid access during switch!\n", __func__);
88 return 1;
89 }
90 if (!mm || (REGION_ID(ea) != USER_REGION_ID)) {
91 /* Future: support kernel segments so that drivers
92 * can use SPUs.
93 */
94 pr_debug("invalid region access at %016lx\n", ea);
95 return 1;
96 }
97
98 esid = (ea & ESID_MASK) | SLB_ESID_V;
99 #ifdef CONFIG_HUGETLB_PAGE
100 if (in_hugepage_area(mm->context, ea))
101 llp = mmu_psize_defs[mmu_huge_psize].sllp;
102 else
103 #endif
104 llp = mmu_psize_defs[mmu_virtual_psize].sllp;
105 vsid = (get_vsid(mm->context.id, ea) << SLB_VSID_SHIFT) |
106 SLB_VSID_USER | llp;
107
108 out_be64(&priv2->slb_index_W, spu->slb_replace);
109 out_be64(&priv2->slb_vsid_RW, vsid);
110 out_be64(&priv2->slb_esid_RW, esid);
111
112 spu->slb_replace++;
113 if (spu->slb_replace >= 8)
114 spu->slb_replace = 0;
115
116 spu_restart_dma(spu);
117
118 return 0;
119 }
120
121 extern int hash_page(unsigned long ea, unsigned long access, unsigned long trap); //XXX
122 static int __spu_trap_data_map(struct spu *spu, unsigned long ea, u64 dsisr)
123 {
124 pr_debug("%s, %lx, %lx\n", __FUNCTION__, dsisr, ea);
125
126 /* Handle kernel space hash faults immediately.
127 User hash faults need to be deferred to process context. */
128 if ((dsisr & MFC_DSISR_PTE_NOT_FOUND)
129 && REGION_ID(ea) != USER_REGION_ID
130 && hash_page(ea, _PAGE_PRESENT, 0x300) == 0) {
131 spu_restart_dma(spu);
132 return 0;
133 }
134
135 if (test_bit(SPU_CONTEXT_SWITCH_ACTIVE, &spu->flags)) {
136 printk("%s: invalid access during switch!\n", __func__);
137 return 1;
138 }
139
140 spu->dar = ea;
141 spu->dsisr = dsisr;
142 mb();
143 spu->stop_callback(spu);
144 return 0;
145 }
146
147 static irqreturn_t
148 spu_irq_class_0(int irq, void *data, struct pt_regs *regs)
149 {
150 struct spu *spu;
151
152 spu = data;
153 spu->class_0_pending = 1;
154 spu->stop_callback(spu);
155
156 return IRQ_HANDLED;
157 }
158
159 int
160 spu_irq_class_0_bottom(struct spu *spu)
161 {
162 unsigned long stat, mask;
163
164 spu->class_0_pending = 0;
165
166 mask = spu_int_mask_get(spu, 0);
167 stat = spu_int_stat_get(spu, 0);
168
169 stat &= mask;
170
171 if (stat & 1) /* invalid DMA alignment */
172 __spu_trap_dma_align(spu);
173
174 if (stat & 2) /* invalid MFC DMA */
175 __spu_trap_invalid_dma(spu);
176
177 if (stat & 4) /* error on SPU */
178 __spu_trap_error(spu);
179
180 spu_int_stat_clear(spu, 0, stat);
181
182 return (stat & 0x7) ? -EIO : 0;
183 }
184 EXPORT_SYMBOL_GPL(spu_irq_class_0_bottom);
185
186 static irqreturn_t
187 spu_irq_class_1(int irq, void *data, struct pt_regs *regs)
188 {
189 struct spu *spu;
190 unsigned long stat, mask, dar, dsisr;
191
192 spu = data;
193
194 /* atomically read & clear class1 status. */
195 spin_lock(&spu->register_lock);
196 mask = spu_int_mask_get(spu, 1);
197 stat = spu_int_stat_get(spu, 1) & mask;
198 dar = spu_mfc_dar_get(spu);
199 dsisr = spu_mfc_dsisr_get(spu);
200 if (stat & 2) /* mapping fault */
201 spu_mfc_dsisr_set(spu, 0ul);
202 spu_int_stat_clear(spu, 1, stat);
203 spin_unlock(&spu->register_lock);
204 pr_debug("%s: %lx %lx %lx %lx\n", __FUNCTION__, mask, stat,
205 dar, dsisr);
206
207 if (stat & 1) /* segment fault */
208 __spu_trap_data_seg(spu, dar);
209
210 if (stat & 2) { /* mapping fault */
211 __spu_trap_data_map(spu, dar, dsisr);
212 }
213
214 if (stat & 4) /* ls compare & suspend on get */
215 ;
216
217 if (stat & 8) /* ls compare & suspend on put */
218 ;
219
220 return stat ? IRQ_HANDLED : IRQ_NONE;
221 }
222 EXPORT_SYMBOL_GPL(spu_irq_class_1_bottom);
223
224 static irqreturn_t
225 spu_irq_class_2(int irq, void *data, struct pt_regs *regs)
226 {
227 struct spu *spu;
228 unsigned long stat;
229 unsigned long mask;
230
231 spu = data;
232 spin_lock(&spu->register_lock);
233 stat = spu_int_stat_get(spu, 2);
234 mask = spu_int_mask_get(spu, 2);
235 /* ignore interrupts we're not waiting for */
236 stat &= mask;
237 /*
238 * mailbox interrupts (0x1 and 0x10) are level triggered.
239 * mask them now before acknowledging.
240 */
241 if (stat & 0x11)
242 spu_int_mask_and(spu, 2, ~(stat & 0x11));
243 /* acknowledge all interrupts before the callbacks */
244 spu_int_stat_clear(spu, 2, stat);
245 spin_unlock(&spu->register_lock);
246
247 pr_debug("class 2 interrupt %d, %lx, %lx\n", irq, stat, mask);
248
249 if (stat & 1) /* PPC core mailbox */
250 spu->ibox_callback(spu);
251
252 if (stat & 2) /* SPU stop-and-signal */
253 spu->stop_callback(spu);
254
255 if (stat & 4) /* SPU halted */
256 spu->stop_callback(spu);
257
258 if (stat & 8) /* DMA tag group complete */
259 spu->mfc_callback(spu);
260
261 if (stat & 0x10) /* SPU mailbox threshold */
262 spu->wbox_callback(spu);
263
264 return stat ? IRQ_HANDLED : IRQ_NONE;
265 }
266
267 static int spu_request_irqs(struct spu *spu)
268 {
269 int ret = 0;
270
271 if (spu->irqs[0] != NO_IRQ) {
272 snprintf(spu->irq_c0, sizeof (spu->irq_c0), "spe%02d.0",
273 spu->number);
274 ret = request_irq(spu->irqs[0], spu_irq_class_0,
275 IRQF_DISABLED,
276 spu->irq_c0, spu);
277 if (ret)
278 goto bail0;
279 }
280 if (spu->irqs[1] != NO_IRQ) {
281 snprintf(spu->irq_c1, sizeof (spu->irq_c1), "spe%02d.1",
282 spu->number);
283 ret = request_irq(spu->irqs[1], spu_irq_class_1,
284 IRQF_DISABLED,
285 spu->irq_c1, spu);
286 if (ret)
287 goto bail1;
288 }
289 if (spu->irqs[2] != NO_IRQ) {
290 snprintf(spu->irq_c2, sizeof (spu->irq_c2), "spe%02d.2",
291 spu->number);
292 ret = request_irq(spu->irqs[2], spu_irq_class_2,
293 IRQF_DISABLED,
294 spu->irq_c2, spu);
295 if (ret)
296 goto bail2;
297 }
298 return 0;
299
300 bail2:
301 if (spu->irqs[1] != NO_IRQ)
302 free_irq(spu->irqs[1], spu);
303 bail1:
304 if (spu->irqs[0] != NO_IRQ)
305 free_irq(spu->irqs[0], spu);
306 bail0:
307 return ret;
308 }
309
310 static void spu_free_irqs(struct spu *spu)
311 {
312 if (spu->irqs[0] != NO_IRQ)
313 free_irq(spu->irqs[0], spu);
314 if (spu->irqs[1] != NO_IRQ)
315 free_irq(spu->irqs[1], spu);
316 if (spu->irqs[2] != NO_IRQ)
317 free_irq(spu->irqs[2], spu);
318 }
319
320 static LIST_HEAD(spu_list);
321 static DEFINE_MUTEX(spu_mutex);
322
323 static void spu_init_channels(struct spu *spu)
324 {
325 static const struct {
326 unsigned channel;
327 unsigned count;
328 } zero_list[] = {
329 { 0x00, 1, }, { 0x01, 1, }, { 0x03, 1, }, { 0x04, 1, },
330 { 0x18, 1, }, { 0x19, 1, }, { 0x1b, 1, }, { 0x1d, 1, },
331 }, count_list[] = {
332 { 0x00, 0, }, { 0x03, 0, }, { 0x04, 0, }, { 0x15, 16, },
333 { 0x17, 1, }, { 0x18, 0, }, { 0x19, 0, }, { 0x1b, 0, },
334 { 0x1c, 1, }, { 0x1d, 0, }, { 0x1e, 1, },
335 };
336 struct spu_priv2 __iomem *priv2;
337 int i;
338
339 priv2 = spu->priv2;
340
341 /* initialize all channel data to zero */
342 for (i = 0; i < ARRAY_SIZE(zero_list); i++) {
343 int count;
344
345 out_be64(&priv2->spu_chnlcntptr_RW, zero_list[i].channel);
346 for (count = 0; count < zero_list[i].count; count++)
347 out_be64(&priv2->spu_chnldata_RW, 0);
348 }
349
350 /* initialize channel counts to meaningful values */
351 for (i = 0; i < ARRAY_SIZE(count_list); i++) {
352 out_be64(&priv2->spu_chnlcntptr_RW, count_list[i].channel);
353 out_be64(&priv2->spu_chnlcnt_RW, count_list[i].count);
354 }
355 }
356
357 struct spu *spu_alloc(void)
358 {
359 struct spu *spu;
360
361 mutex_lock(&spu_mutex);
362 if (!list_empty(&spu_list)) {
363 spu = list_entry(spu_list.next, struct spu, list);
364 list_del_init(&spu->list);
365 pr_debug("Got SPU %x %d\n", spu->isrc, spu->number);
366 } else {
367 pr_debug("No SPU left\n");
368 spu = NULL;
369 }
370 mutex_unlock(&spu_mutex);
371
372 if (spu)
373 spu_init_channels(spu);
374
375 return spu;
376 }
377 EXPORT_SYMBOL_GPL(spu_alloc);
378
379 void spu_free(struct spu *spu)
380 {
381 mutex_lock(&spu_mutex);
382 list_add_tail(&spu->list, &spu_list);
383 mutex_unlock(&spu_mutex);
384 }
385 EXPORT_SYMBOL_GPL(spu_free);
386
387 static int spu_handle_mm_fault(struct spu *spu)
388 {
389 struct mm_struct *mm = spu->mm;
390 struct vm_area_struct *vma;
391 u64 ea, dsisr, is_write;
392 int ret;
393
394 ea = spu->dar;
395 dsisr = spu->dsisr;
396 #if 0
397 if (!IS_VALID_EA(ea)) {
398 return -EFAULT;
399 }
400 #endif /* XXX */
401 if (mm == NULL) {
402 return -EFAULT;
403 }
404 if (mm->pgd == NULL) {
405 return -EFAULT;
406 }
407
408 down_read(&mm->mmap_sem);
409 vma = find_vma(mm, ea);
410 if (!vma)
411 goto bad_area;
412 if (vma->vm_start <= ea)
413 goto good_area;
414 if (!(vma->vm_flags & VM_GROWSDOWN))
415 goto bad_area;
416 #if 0
417 if (expand_stack(vma, ea))
418 goto bad_area;
419 #endif /* XXX */
420 good_area:
421 is_write = dsisr & MFC_DSISR_ACCESS_PUT;
422 if (is_write) {
423 if (!(vma->vm_flags & VM_WRITE))
424 goto bad_area;
425 } else {
426 if (dsisr & MFC_DSISR_ACCESS_DENIED)
427 goto bad_area;
428 if (!(vma->vm_flags & (VM_READ | VM_EXEC)))
429 goto bad_area;
430 }
431 ret = 0;
432 switch (handle_mm_fault(mm, vma, ea, is_write)) {
433 case VM_FAULT_MINOR:
434 current->min_flt++;
435 break;
436 case VM_FAULT_MAJOR:
437 current->maj_flt++;
438 break;
439 case VM_FAULT_SIGBUS:
440 ret = -EFAULT;
441 goto bad_area;
442 case VM_FAULT_OOM:
443 ret = -ENOMEM;
444 goto bad_area;
445 default:
446 BUG();
447 }
448 up_read(&mm->mmap_sem);
449 return ret;
450
451 bad_area:
452 up_read(&mm->mmap_sem);
453 return -EFAULT;
454 }
455
456 int spu_irq_class_1_bottom(struct spu *spu)
457 {
458 u64 ea, dsisr, access, error = 0UL;
459 int ret = 0;
460
461 ea = spu->dar;
462 dsisr = spu->dsisr;
463 if (dsisr & (MFC_DSISR_PTE_NOT_FOUND | MFC_DSISR_ACCESS_DENIED)) {
464 u64 flags;
465
466 access = (_PAGE_PRESENT | _PAGE_USER);
467 access |= (dsisr & MFC_DSISR_ACCESS_PUT) ? _PAGE_RW : 0UL;
468 local_irq_save(flags);
469 if (hash_page(ea, access, 0x300) != 0)
470 error |= CLASS1_ENABLE_STORAGE_FAULT_INTR;
471 local_irq_restore(flags);
472 }
473 if (error & CLASS1_ENABLE_STORAGE_FAULT_INTR) {
474 if ((ret = spu_handle_mm_fault(spu)) != 0)
475 error |= CLASS1_ENABLE_STORAGE_FAULT_INTR;
476 else
477 error &= ~CLASS1_ENABLE_STORAGE_FAULT_INTR;
478 }
479 spu->dar = 0UL;
480 spu->dsisr = 0UL;
481 if (!error) {
482 spu_restart_dma(spu);
483 } else {
484 __spu_trap_invalid_dma(spu);
485 }
486 return ret;
487 }
488
489 static int __init find_spu_node_id(struct device_node *spe)
490 {
491 unsigned int *id;
492 struct device_node *cpu;
493 cpu = spe->parent->parent;
494 id = (unsigned int *)get_property(cpu, "node-id", NULL);
495 return id ? *id : 0;
496 }
497
498 static int __init cell_spuprop_present(struct spu *spu, struct device_node *spe,
499 const char *prop)
500 {
501 static DEFINE_MUTEX(add_spumem_mutex);
502
503 struct address_prop {
504 unsigned long address;
505 unsigned int len;
506 } __attribute__((packed)) *p;
507 int proplen;
508
509 unsigned long start_pfn, nr_pages;
510 struct pglist_data *pgdata;
511 struct zone *zone;
512 int ret;
513
514 p = (void*)get_property(spe, prop, &proplen);
515 WARN_ON(proplen != sizeof (*p));
516
517 start_pfn = p->address >> PAGE_SHIFT;
518 nr_pages = ((unsigned long)p->len + PAGE_SIZE - 1) >> PAGE_SHIFT;
519
520 pgdata = NODE_DATA(spu->nid);
521 zone = pgdata->node_zones;
522
523 /* XXX rethink locking here */
524 mutex_lock(&add_spumem_mutex);
525 ret = __add_pages(zone, start_pfn, nr_pages);
526 mutex_unlock(&add_spumem_mutex);
527
528 return ret;
529 }
530
531 static void __iomem * __init map_spe_prop(struct spu *spu,
532 struct device_node *n, const char *name)
533 {
534 struct address_prop {
535 unsigned long address;
536 unsigned int len;
537 } __attribute__((packed)) *prop;
538
539 void *p;
540 int proplen;
541 void* ret = NULL;
542 int err = 0;
543
544 p = get_property(n, name, &proplen);
545 if (proplen != sizeof (struct address_prop))
546 return NULL;
547
548 prop = p;
549
550 err = cell_spuprop_present(spu, n, name);
551 if (err && (err != -EEXIST))
552 goto out;
553
554 ret = ioremap(prop->address, prop->len);
555
556 out:
557 return ret;
558 }
559
560 static void spu_unmap(struct spu *spu)
561 {
562 iounmap(spu->priv2);
563 iounmap(spu->priv1);
564 iounmap(spu->problem);
565 iounmap((u8 __iomem *)spu->local_store);
566 }
567
568 /* This function shall be abstracted for HV platforms */
569 static int __init spu_map_interrupts(struct spu *spu, struct device_node *np)
570 {
571 struct irq_host *host;
572 unsigned int isrc;
573 u32 *tmp;
574
575 host = iic_get_irq_host(spu->node);
576 if (host == NULL)
577 return -ENODEV;
578
579 /* Get the interrupt source from the device-tree */
580 tmp = (u32 *)get_property(np, "isrc", NULL);
581 if (!tmp)
582 return -ENODEV;
583 spu->isrc = isrc = tmp[0];
584
585 /* Now map interrupts of all 3 classes */
586 spu->irqs[0] = irq_create_mapping(host, 0x00 | isrc);
587 spu->irqs[1] = irq_create_mapping(host, 0x10 | isrc);
588 spu->irqs[2] = irq_create_mapping(host, 0x20 | isrc);
589
590 /* Right now, we only fail if class 2 failed */
591 return spu->irqs[2] == NO_IRQ ? -EINVAL : 0;
592 }
593
594 static int __init spu_map_device(struct spu *spu, struct device_node *node)
595 {
596 char *prop;
597 int ret;
598
599 ret = -ENODEV;
600 spu->name = get_property(node, "name", NULL);
601 if (!spu->name)
602 goto out;
603
604 prop = get_property(node, "local-store", NULL);
605 if (!prop)
606 goto out;
607 spu->local_store_phys = *(unsigned long *)prop;
608
609 /* we use local store as ram, not io memory */
610 spu->local_store = (void __force *)
611 map_spe_prop(spu, node, "local-store");
612 if (!spu->local_store)
613 goto out;
614
615 prop = get_property(node, "problem", NULL);
616 if (!prop)
617 goto out_unmap;
618 spu->problem_phys = *(unsigned long *)prop;
619
620 spu->problem= map_spe_prop(spu, node, "problem");
621 if (!spu->problem)
622 goto out_unmap;
623
624 spu->priv1= map_spe_prop(spu, node, "priv1");
625 /* priv1 is not available on a hypervisor */
626
627 spu->priv2= map_spe_prop(spu, node, "priv2");
628 if (!spu->priv2)
629 goto out_unmap;
630 ret = 0;
631 goto out;
632
633 out_unmap:
634 spu_unmap(spu);
635 out:
636 return ret;
637 }
638
639 struct sysdev_class spu_sysdev_class = {
640 set_kset_name("spu")
641 };
642
643 static ssize_t spu_show_isrc(struct sys_device *sysdev, char *buf)
644 {
645 struct spu *spu = container_of(sysdev, struct spu, sysdev);
646 return sprintf(buf, "%d\n", spu->isrc);
647
648 }
649 static SYSDEV_ATTR(isrc, 0400, spu_show_isrc, NULL);
650
651 extern int attach_sysdev_to_node(struct sys_device *dev, int nid);
652
653 static int spu_create_sysdev(struct spu *spu)
654 {
655 int ret;
656
657 spu->sysdev.id = spu->number;
658 spu->sysdev.cls = &spu_sysdev_class;
659 ret = sysdev_register(&spu->sysdev);
660 if (ret) {
661 printk(KERN_ERR "Can't register SPU %d with sysfs\n",
662 spu->number);
663 return ret;
664 }
665
666 if (spu->isrc != 0)
667 sysdev_create_file(&spu->sysdev, &attr_isrc);
668 sysfs_add_device_to_node(&spu->sysdev, spu->nid);
669
670 return 0;
671 }
672
673 static void spu_destroy_sysdev(struct spu *spu)
674 {
675 sysdev_remove_file(&spu->sysdev, &attr_isrc);
676 sysfs_remove_device_from_node(&spu->sysdev, spu->nid);
677 sysdev_unregister(&spu->sysdev);
678 }
679
680 static int __init create_spu(struct device_node *spe)
681 {
682 struct spu *spu;
683 int ret;
684 static int number;
685
686 ret = -ENOMEM;
687 spu = kzalloc(sizeof (*spu), GFP_KERNEL);
688 if (!spu)
689 goto out;
690
691 ret = spu_map_device(spu, spe);
692 if (ret)
693 goto out_free;
694
695 spu->node = find_spu_node_id(spe);
696 spu->nid = of_node_to_nid(spe);
697 if (spu->nid == -1)
698 spu->nid = 0;
699 ret = spu_map_interrupts(spu, spe);
700 if (ret)
701 goto out_unmap;
702 spin_lock_init(&spu->register_lock);
703 spu_mfc_sdr_set(spu, mfspr(SPRN_SDR1));
704 spu_mfc_sr1_set(spu, 0x33);
705 mutex_lock(&spu_mutex);
706
707 spu->number = number++;
708 ret = spu_request_irqs(spu);
709 if (ret)
710 goto out_unmap;
711
712 ret = spu_create_sysdev(spu);
713 if (ret)
714 goto out_free_irqs;
715
716 list_add(&spu->list, &spu_list);
717 mutex_unlock(&spu_mutex);
718
719 pr_debug(KERN_DEBUG "Using SPE %s %02x %p %p %p %p %d\n",
720 spu->name, spu->isrc, spu->local_store,
721 spu->problem, spu->priv1, spu->priv2, spu->number);
722 goto out;
723
724 out_free_irqs:
725 spu_free_irqs(spu);
726
727 out_unmap:
728 mutex_unlock(&spu_mutex);
729 spu_unmap(spu);
730 out_free:
731 kfree(spu);
732 out:
733 return ret;
734 }
735
736 static void destroy_spu(struct spu *spu)
737 {
738 list_del_init(&spu->list);
739
740 spu_destroy_sysdev(spu);
741 spu_free_irqs(spu);
742 spu_unmap(spu);
743 kfree(spu);
744 }
745
746 static void cleanup_spu_base(void)
747 {
748 struct spu *spu, *tmp;
749 mutex_lock(&spu_mutex);
750 list_for_each_entry_safe(spu, tmp, &spu_list, list)
751 destroy_spu(spu);
752 mutex_unlock(&spu_mutex);
753 sysdev_class_unregister(&spu_sysdev_class);
754 }
755 module_exit(cleanup_spu_base);
756
757 static int __init init_spu_base(void)
758 {
759 struct device_node *node;
760 int ret;
761
762 /* create sysdev class for spus */
763 ret = sysdev_class_register(&spu_sysdev_class);
764 if (ret)
765 return ret;
766
767 ret = -ENODEV;
768 for (node = of_find_node_by_type(NULL, "spe");
769 node; node = of_find_node_by_type(node, "spe")) {
770 ret = create_spu(node);
771 if (ret) {
772 printk(KERN_WARNING "%s: Error initializing %s\n",
773 __FUNCTION__, node->name);
774 cleanup_spu_base();
775 break;
776 }
777 }
778 /* in some old firmware versions, the spe is called 'spc', so we
779 look for that as well */
780 for (node = of_find_node_by_type(NULL, "spc");
781 node; node = of_find_node_by_type(node, "spc")) {
782 ret = create_spu(node);
783 if (ret) {
784 printk(KERN_WARNING "%s: Error initializing %s\n",
785 __FUNCTION__, node->name);
786 cleanup_spu_base();
787 break;
788 }
789 }
790 return ret;
791 }
792 module_init(init_spu_base);
793
794 MODULE_LICENSE("GPL");
795 MODULE_AUTHOR("Arnd Bergmann <arndb@de.ibm.com>");