2 * Copyright (c) 2000 Mike Corrigan <mikejc@us.ibm.com>
3 * Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
6 * Architecture- / platform-specific boot-time initialization code for
7 * the IBM iSeries LPAR. Adapted from original code by Grant Erickson and
8 * code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version
14 * 2 of the License, or (at your option) any later version.
19 #include <linux/config.h>
20 #include <linux/init.h>
21 #include <linux/threads.h>
22 #include <linux/smp.h>
23 #include <linux/param.h>
24 #include <linux/string.h>
25 #include <linux/initrd.h>
26 #include <linux/seq_file.h>
27 #include <linux/kdev_t.h>
28 #include <linux/major.h>
29 #include <linux/root_dev.h>
30 #include <linux/kernel.h>
32 #include <asm/processor.h>
33 #include <asm/machdep.h>
36 #include <asm/pgtable.h>
37 #include <asm/mmu_context.h>
38 #include <asm/cputable.h>
39 #include <asm/sections.h>
40 #include <asm/iommu.h>
41 #include <asm/firmware.h>
42 #include <asm/system.h>
45 #include <asm/cache.h>
46 #include <asm/sections.h>
47 #include <asm/abs_addr.h>
48 #include <asm/iseries/hv_lp_config.h>
49 #include <asm/iseries/hv_call_event.h>
50 #include <asm/iseries/hv_call_xm.h>
51 #include <asm/iseries/it_lp_queue.h>
52 #include <asm/iseries/mf.h>
53 #include <asm/iseries/hv_lp_event.h>
54 #include <asm/iseries/lpar_map.h>
60 #include "vpd_areas.h"
61 #include "processor_vpd.h"
62 #include "main_store.h"
67 #define DBG(fmt...) udbg_printf(fmt)
72 /* Function Prototypes */
73 static unsigned long build_iSeries_Memory_Map(void);
74 static void iseries_shared_idle(void);
75 static void iseries_dedicated_idle(void);
77 extern void iSeries_pci_final_fixup(void);
79 static void iSeries_pci_final_fixup(void) { }
82 /* Global Variables */
83 int piranha_simulator
;
85 extern int rd_size
; /* Defined in drivers/block/rd.c */
86 extern unsigned long embedded_sysmap_start
;
87 extern unsigned long embedded_sysmap_end
;
89 extern unsigned long iSeries_recal_tb
;
90 extern unsigned long iSeries_recal_titan
;
92 static int mf_initialized
;
94 static unsigned long cmd_mem_limit
;
97 unsigned long absStart
;
99 unsigned long logicalStart
;
100 unsigned long logicalEnd
;
104 * Process the main store vpd to determine where the holes in memory are
105 * and return the number of physical blocks and fill in the array of
108 static unsigned long iSeries_process_Condor_mainstore_vpd(
109 struct MemoryBlock
*mb_array
, unsigned long max_entries
)
111 unsigned long holeFirstChunk
, holeSizeChunks
;
112 unsigned long numMemoryBlocks
= 1;
113 struct IoHriMainStoreSegment4
*msVpd
=
114 (struct IoHriMainStoreSegment4
*)xMsVpd
;
115 unsigned long holeStart
= msVpd
->nonInterleavedBlocksStartAdr
;
116 unsigned long holeEnd
= msVpd
->nonInterleavedBlocksEndAdr
;
117 unsigned long holeSize
= holeEnd
- holeStart
;
119 printk("Mainstore_VPD: Condor\n");
121 * Determine if absolute memory has any
122 * holes so that we can interpret the
123 * access map we get back from the hypervisor
126 mb_array
[0].logicalStart
= 0;
127 mb_array
[0].logicalEnd
= 0x100000000;
128 mb_array
[0].absStart
= 0;
129 mb_array
[0].absEnd
= 0x100000000;
133 holeStart
= holeStart
& 0x000fffffffffffff;
134 holeStart
= addr_to_chunk(holeStart
);
135 holeFirstChunk
= holeStart
;
136 holeSize
= addr_to_chunk(holeSize
);
137 holeSizeChunks
= holeSize
;
138 printk( "Main store hole: start chunk = %0lx, size = %0lx chunks\n",
139 holeFirstChunk
, holeSizeChunks
);
140 mb_array
[0].logicalEnd
= holeFirstChunk
;
141 mb_array
[0].absEnd
= holeFirstChunk
;
142 mb_array
[1].logicalStart
= holeFirstChunk
;
143 mb_array
[1].logicalEnd
= 0x100000000 - holeSizeChunks
;
144 mb_array
[1].absStart
= holeFirstChunk
+ holeSizeChunks
;
145 mb_array
[1].absEnd
= 0x100000000;
147 return numMemoryBlocks
;
150 #define MaxSegmentAreas 32
151 #define MaxSegmentAdrRangeBlocks 128
152 #define MaxAreaRangeBlocks 4
154 static unsigned long iSeries_process_Regatta_mainstore_vpd(
155 struct MemoryBlock
*mb_array
, unsigned long max_entries
)
157 struct IoHriMainStoreSegment5
*msVpdP
=
158 (struct IoHriMainStoreSegment5
*)xMsVpd
;
159 unsigned long numSegmentBlocks
= 0;
160 u32 existsBits
= msVpdP
->msAreaExists
;
161 unsigned long area_num
;
163 printk("Mainstore_VPD: Regatta\n");
165 for (area_num
= 0; area_num
< MaxSegmentAreas
; ++area_num
) {
166 unsigned long numAreaBlocks
;
167 struct IoHriMainStoreArea4
*currentArea
;
169 if (existsBits
& 0x80000000) {
170 unsigned long block_num
;
172 currentArea
= &msVpdP
->msAreaArray
[area_num
];
173 numAreaBlocks
= currentArea
->numAdrRangeBlocks
;
174 printk("ms_vpd: processing area %2ld blocks=%ld",
175 area_num
, numAreaBlocks
);
176 for (block_num
= 0; block_num
< numAreaBlocks
;
178 /* Process an address range block */
179 struct MemoryBlock tempBlock
;
183 (unsigned long)currentArea
->xAdrRangeBlock
[block_num
].blockStart
;
185 (unsigned long)currentArea
->xAdrRangeBlock
[block_num
].blockEnd
;
186 tempBlock
.logicalStart
= 0;
187 tempBlock
.logicalEnd
= 0;
188 printk("\n block %ld absStart=%016lx absEnd=%016lx",
189 block_num
, tempBlock
.absStart
,
192 for (i
= 0; i
< numSegmentBlocks
; ++i
) {
193 if (mb_array
[i
].absStart
==
197 if (i
== numSegmentBlocks
) {
198 if (numSegmentBlocks
== max_entries
)
199 panic("iSeries_process_mainstore_vpd: too many memory blocks");
200 mb_array
[numSegmentBlocks
] = tempBlock
;
203 printk(" (duplicate)");
209 /* Now sort the blocks found into ascending sequence */
210 if (numSegmentBlocks
> 1) {
213 for (m
= 0; m
< numSegmentBlocks
- 1; ++m
) {
214 for (n
= numSegmentBlocks
- 1; m
< n
; --n
) {
215 if (mb_array
[n
].absStart
<
216 mb_array
[n
-1].absStart
) {
217 struct MemoryBlock tempBlock
;
219 tempBlock
= mb_array
[n
];
220 mb_array
[n
] = mb_array
[n
-1];
221 mb_array
[n
-1] = tempBlock
;
227 * Assign "logical" addresses to each block. These
228 * addresses correspond to the hypervisor "bitmap" space.
229 * Convert all addresses into units of 256K chunks.
232 unsigned long i
, nextBitmapAddress
;
234 printk("ms_vpd: %ld sorted memory blocks\n", numSegmentBlocks
);
235 nextBitmapAddress
= 0;
236 for (i
= 0; i
< numSegmentBlocks
; ++i
) {
237 unsigned long length
= mb_array
[i
].absEnd
-
238 mb_array
[i
].absStart
;
240 mb_array
[i
].logicalStart
= nextBitmapAddress
;
241 mb_array
[i
].logicalEnd
= nextBitmapAddress
+ length
;
242 nextBitmapAddress
+= length
;
243 printk(" Bitmap range: %016lx - %016lx\n"
244 " Absolute range: %016lx - %016lx\n",
245 mb_array
[i
].logicalStart
,
246 mb_array
[i
].logicalEnd
,
247 mb_array
[i
].absStart
, mb_array
[i
].absEnd
);
248 mb_array
[i
].absStart
= addr_to_chunk(mb_array
[i
].absStart
&
250 mb_array
[i
].absEnd
= addr_to_chunk(mb_array
[i
].absEnd
&
252 mb_array
[i
].logicalStart
=
253 addr_to_chunk(mb_array
[i
].logicalStart
);
254 mb_array
[i
].logicalEnd
= addr_to_chunk(mb_array
[i
].logicalEnd
);
258 return numSegmentBlocks
;
261 static unsigned long iSeries_process_mainstore_vpd(struct MemoryBlock
*mb_array
,
262 unsigned long max_entries
)
265 unsigned long mem_blocks
= 0;
267 if (cpu_has_feature(CPU_FTR_SLB
))
268 mem_blocks
= iSeries_process_Regatta_mainstore_vpd(mb_array
,
271 mem_blocks
= iSeries_process_Condor_mainstore_vpd(mb_array
,
274 printk("Mainstore_VPD: numMemoryBlocks = %ld \n", mem_blocks
);
275 for (i
= 0; i
< mem_blocks
; ++i
) {
276 printk("Mainstore_VPD: block %3ld logical chunks %016lx - %016lx\n"
277 " abs chunks %016lx - %016lx\n",
278 i
, mb_array
[i
].logicalStart
, mb_array
[i
].logicalEnd
,
279 mb_array
[i
].absStart
, mb_array
[i
].absEnd
);
284 static void __init
iSeries_get_cmdline(void)
288 /* copy the command line parameter from the primary VSP */
289 HvCallEvent_dmaToSp(cmd_line
, 2 * 64* 1024, 256,
290 HvLpDma_Direction_RemoteToLocal
);
295 if (!*p
|| *p
== '\n')
302 static void __init
iSeries_init_early(void)
304 DBG(" -> iSeries_init_early()\n");
306 ppc64_firmware_features
= FW_FEATURE_ISERIES
;
308 ppc64_interrupt_controller
= IC_ISERIES
;
310 #if defined(CONFIG_BLK_DEV_INITRD)
312 * If the init RAM disk has been configured and there is
313 * a non-zero starting address for it, set it up
316 initrd_start
= (unsigned long)__va(naca
.xRamDisk
);
317 initrd_end
= initrd_start
+ naca
.xRamDiskSize
* HW_PAGE_SIZE
;
318 initrd_below_start_ok
= 1; // ramdisk in kernel space
319 ROOT_DEV
= Root_RAM0
;
320 if (((rd_size
* 1024) / HW_PAGE_SIZE
) < naca
.xRamDiskSize
)
321 rd_size
= (naca
.xRamDiskSize
* HW_PAGE_SIZE
) / 1024;
323 #endif /* CONFIG_BLK_DEV_INITRD */
325 /* ROOT_DEV = MKDEV(VIODASD_MAJOR, 1); */
328 iSeries_recal_tb
= get_tb();
329 iSeries_recal_titan
= HvCallXm_loadTod();
332 * Initialize the hash table management pointers
337 * Initialize the DMA/TCE management
339 iommu_init_early_iSeries();
341 /* Initialize machine-dependency vectors */
345 if (itLpNaca
.xPirEnvironMode
== 0)
346 piranha_simulator
= 1;
348 /* Associate Lp Event Queue 0 with processor 0 */
349 HvCallEvent_setLpEventQueueInterruptProc(0, 0);
355 /* If we were passed an initrd, set the ROOT_DEV properly if the values
356 * look sensible. If not, clear initrd reference.
358 #ifdef CONFIG_BLK_DEV_INITRD
359 if (initrd_start
>= KERNELBASE
&& initrd_end
>= KERNELBASE
&&
360 initrd_end
> initrd_start
)
361 ROOT_DEV
= Root_RAM0
;
363 initrd_start
= initrd_end
= 0;
364 #endif /* CONFIG_BLK_DEV_INITRD */
366 DBG(" <- iSeries_init_early()\n");
369 struct mschunks_map mschunks_map
= {
370 /* XXX We don't use these, but Piranha might need them. */
371 .chunk_size
= MSCHUNKS_CHUNK_SIZE
,
372 .chunk_shift
= MSCHUNKS_CHUNK_SHIFT
,
373 .chunk_mask
= MSCHUNKS_OFFSET_MASK
,
375 EXPORT_SYMBOL(mschunks_map
);
377 void mschunks_alloc(unsigned long num_chunks
)
379 klimit
= _ALIGN(klimit
, sizeof(u32
));
380 mschunks_map
.mapping
= (u32
*)klimit
;
381 klimit
+= num_chunks
* sizeof(u32
);
382 mschunks_map
.num_chunks
= num_chunks
;
386 * The iSeries may have very large memories ( > 128 GB ) and a partition
387 * may get memory in "chunks" that may be anywhere in the 2**52 real
388 * address space. The chunks are 256K in size. To map this to the
389 * memory model Linux expects, the AS/400 specific code builds a
390 * translation table to translate what Linux thinks are "physical"
391 * addresses to the actual real addresses. This allows us to make
392 * it appear to Linux that we have contiguous memory starting at
393 * physical address zero while in fact this could be far from the truth.
394 * To avoid confusion, I'll let the words physical and/or real address
395 * apply to the Linux addresses while I'll use "absolute address" to
396 * refer to the actual hardware real address.
398 * build_iSeries_Memory_Map gets information from the Hypervisor and
399 * looks at the Main Store VPD to determine the absolute addresses
400 * of the memory that has been assigned to our partition and builds
401 * a table used to translate Linux's physical addresses to these
402 * absolute addresses. Absolute addresses are needed when
403 * communicating with the hypervisor (e.g. to build HPT entries)
405 * Returns the physical memory size
408 static unsigned long __init
build_iSeries_Memory_Map(void)
410 u32 loadAreaFirstChunk
, loadAreaLastChunk
, loadAreaSize
;
412 u32 hptFirstChunk
, hptLastChunk
, hptSizeChunks
, hptSizePages
;
413 u32 totalChunks
,moreChunks
;
414 u32 currChunk
, thisChunk
, absChunk
;
418 struct MemoryBlock mb
[32];
419 unsigned long numMemoryBlocks
, curBlock
;
421 /* Chunk size on iSeries is 256K bytes */
422 totalChunks
= (u32
)HvLpConfig_getMsChunks();
423 mschunks_alloc(totalChunks
);
426 * Get absolute address of our load area
427 * and map it to physical address 0
428 * This guarantees that the loadarea ends up at physical 0
429 * otherwise, it might not be returned by PLIC as the first
433 loadAreaFirstChunk
= (u32
)addr_to_chunk(itLpNaca
.xLoadAreaAddr
);
434 loadAreaSize
= itLpNaca
.xLoadAreaChunks
;
437 * Only add the pages already mapped here.
438 * Otherwise we might add the hpt pages
439 * The rest of the pages of the load area
440 * aren't in the HPT yet and can still
441 * be assigned an arbitrary physical address
443 if ((loadAreaSize
* 64) > HvPagesToMap
)
444 loadAreaSize
= HvPagesToMap
/ 64;
446 loadAreaLastChunk
= loadAreaFirstChunk
+ loadAreaSize
- 1;
449 * TODO Do we need to do something if the HPT is in the 64MB load area?
450 * This would be required if the itLpNaca.xLoadAreaChunks includes
454 printk("Mapping load area - physical addr = 0000000000000000\n"
455 " absolute addr = %016lx\n",
456 chunk_to_addr(loadAreaFirstChunk
));
457 printk("Load area size %dK\n", loadAreaSize
* 256);
459 for (nextPhysChunk
= 0; nextPhysChunk
< loadAreaSize
; ++nextPhysChunk
)
460 mschunks_map
.mapping
[nextPhysChunk
] =
461 loadAreaFirstChunk
+ nextPhysChunk
;
464 * Get absolute address of our HPT and remember it so
465 * we won't map it to any physical address
467 hptFirstChunk
= (u32
)addr_to_chunk(HvCallHpt_getHptAddress());
468 hptSizePages
= (u32
)HvCallHpt_getHptPages();
469 hptSizeChunks
= hptSizePages
>>
470 (MSCHUNKS_CHUNK_SHIFT
- HW_PAGE_SHIFT
);
471 hptLastChunk
= hptFirstChunk
+ hptSizeChunks
- 1;
473 printk("HPT absolute addr = %016lx, size = %dK\n",
474 chunk_to_addr(hptFirstChunk
), hptSizeChunks
* 256);
477 * Determine if absolute memory has any
478 * holes so that we can interpret the
479 * access map we get back from the hypervisor
482 numMemoryBlocks
= iSeries_process_mainstore_vpd(mb
, 32);
485 * Process the main store access map from the hypervisor
486 * to build up our physical -> absolute translation table
491 moreChunks
= totalChunks
;
494 map
= HvCallSm_get64BitsOfAccessMap(itLpNaca
.xLpIndex
,
496 thisChunk
= currChunk
;
498 chunkBit
= map
>> 63;
502 while (thisChunk
>= mb
[curBlock
].logicalEnd
) {
504 if (curBlock
>= numMemoryBlocks
)
505 panic("out of memory blocks");
507 if (thisChunk
< mb
[curBlock
].logicalStart
)
508 panic("memory block error");
510 absChunk
= mb
[curBlock
].absStart
+
511 (thisChunk
- mb
[curBlock
].logicalStart
);
512 if (((absChunk
< hptFirstChunk
) ||
513 (absChunk
> hptLastChunk
)) &&
514 ((absChunk
< loadAreaFirstChunk
) ||
515 (absChunk
> loadAreaLastChunk
))) {
516 mschunks_map
.mapping
[nextPhysChunk
] =
528 * main store size (in chunks) is
529 * totalChunks - hptSizeChunks
530 * which should be equal to
533 return chunk_to_addr(nextPhysChunk
);
539 static void __init
iSeries_setup_arch(void)
541 if (get_lppaca()->shared_proc
) {
542 ppc_md
.idle_loop
= iseries_shared_idle
;
543 printk(KERN_INFO
"Using shared processor idle loop\n");
545 ppc_md
.idle_loop
= iseries_dedicated_idle
;
546 printk(KERN_INFO
"Using dedicated idle loop\n");
549 /* Setup the Lp Event Queue */
550 setup_hvlpevent_queue();
552 printk("Max logical processors = %d\n",
553 itVpdAreas
.xSlicMaxLogicalProcs
);
554 printk("Max physical processors = %d\n",
555 itVpdAreas
.xSlicMaxPhysicalProcs
);
558 static void iSeries_show_cpuinfo(struct seq_file
*m
)
560 seq_printf(m
, "machine\t\t: 64-bit iSeries Logical Partition\n");
566 static void iSeries_restart(char *cmd
)
574 static void iSeries_power_off(void)
582 static void iSeries_halt(void)
587 static void __init
iSeries_progress(char * st
, unsigned short code
)
589 printk("Progress: [%04x] - %s\n", (unsigned)code
, st
);
590 if (!piranha_simulator
&& mf_initialized
) {
592 mf_display_progress(code
);
598 static void __init
iSeries_fixup_klimit(void)
601 * Change klimit to take into account any ram disk
602 * that may be included
605 klimit
= KERNELBASE
+ (u64
)naca
.xRamDisk
+
606 (naca
.xRamDiskSize
* HW_PAGE_SIZE
);
609 * No ram disk was included - check and see if there
610 * was an embedded system map. Change klimit to take
611 * into account any embedded system map
613 if (embedded_sysmap_end
)
614 klimit
= KERNELBASE
+ ((embedded_sysmap_end
+ 4095) &
619 static int __init
iSeries_src_init(void)
621 /* clear the progress line */
622 ppc_md
.progress(" ", 0xffff);
626 late_initcall(iSeries_src_init
);
628 static inline void process_iSeries_events(void)
630 asm volatile ("li 0,0x5555; sc" : : : "r0", "r3");
633 static void yield_shared_processor(void)
637 HvCall_setEnabledInterrupts(HvCall_MaskIPI
|
643 /* Compute future tb value when yield should expire */
644 HvCall_yieldProcessor(HvCall_YieldTimed
, tb
+tb_ticks_per_jiffy
);
647 * The decrementer stops during the yield. Force a fake decrementer
648 * here and let the timer_interrupt code sort out the actual time.
650 get_lppaca()->int_dword
.fields
.decr_int
= 1;
651 process_iSeries_events();
654 static void iseries_shared_idle(void)
657 while (!need_resched() && !hvlpevent_is_pending()) {
659 ppc64_runlatch_off();
661 /* Recheck with irqs off */
662 if (!need_resched() && !hvlpevent_is_pending())
663 yield_shared_processor();
671 if (hvlpevent_is_pending())
672 process_iSeries_events();
674 preempt_enable_no_resched();
680 static void iseries_dedicated_idle(void)
682 set_thread_flag(TIF_POLLING_NRFLAG
);
685 if (!need_resched()) {
686 while (!need_resched()) {
687 ppc64_runlatch_off();
690 if (hvlpevent_is_pending()) {
693 process_iSeries_events();
701 preempt_enable_no_resched();
708 void __init
iSeries_init_IRQ(void) { }
711 static int __init
iseries_probe(int platform
)
713 return PLATFORM_ISERIES_LPAR
== platform
;
716 struct machdep_calls __initdata iseries_md
= {
717 .setup_arch
= iSeries_setup_arch
,
718 .show_cpuinfo
= iSeries_show_cpuinfo
,
719 .init_IRQ
= iSeries_init_IRQ
,
720 .get_irq
= iSeries_get_irq
,
721 .init_early
= iSeries_init_early
,
722 .pcibios_fixup
= iSeries_pci_final_fixup
,
723 .restart
= iSeries_restart
,
724 .power_off
= iSeries_power_off
,
725 .halt
= iSeries_halt
,
726 .get_boot_time
= iSeries_get_boot_time
,
727 .set_rtc_time
= iSeries_set_rtc_time
,
728 .get_rtc_time
= iSeries_get_rtc_time
,
729 .calibrate_decr
= generic_calibrate_decr
,
730 .progress
= iSeries_progress
,
731 .probe
= iseries_probe
,
732 /* XXX Implement enable_pmcs for iSeries */
736 unsigned char data
[PAGE_SIZE
];
740 struct iseries_flat_dt
{
741 struct boot_param_header header
;
747 struct iseries_flat_dt iseries_dt
;
749 void dt_init(struct iseries_flat_dt
*dt
)
751 dt
->header
.off_mem_rsvmap
=
752 offsetof(struct iseries_flat_dt
, reserve_map
);
753 dt
->header
.off_dt_struct
= offsetof(struct iseries_flat_dt
, dt
);
754 dt
->header
.off_dt_strings
= offsetof(struct iseries_flat_dt
, strings
);
755 dt
->header
.totalsize
= sizeof(struct iseries_flat_dt
);
756 dt
->header
.dt_strings_size
= sizeof(struct blob
);
758 /* There is no notion of hardware cpu id on iSeries */
759 dt
->header
.boot_cpuid_phys
= smp_processor_id();
761 dt
->dt
.next
= (unsigned long)&dt
->dt
.data
;
762 dt
->strings
.next
= (unsigned long)&dt
->strings
.data
;
764 dt
->header
.magic
= OF_DT_HEADER
;
765 dt
->header
.version
= 0x10;
766 dt
->header
.last_comp_version
= 0x10;
768 dt
->reserve_map
[0] = 0;
769 dt
->reserve_map
[1] = 0;
772 void dt_check_blob(struct blob
*b
)
774 if (b
->next
>= (unsigned long)&b
->next
) {
775 DBG("Ran out of space in flat device tree blob!\n");
780 void dt_push_u32(struct iseries_flat_dt
*dt
, u32 value
)
782 *((u32
*)dt
->dt
.next
) = value
;
783 dt
->dt
.next
+= sizeof(u32
);
785 dt_check_blob(&dt
->dt
);
788 void dt_push_u64(struct iseries_flat_dt
*dt
, u64 value
)
790 *((u64
*)dt
->dt
.next
) = value
;
791 dt
->dt
.next
+= sizeof(u64
);
793 dt_check_blob(&dt
->dt
);
796 unsigned long dt_push_bytes(struct blob
*blob
, char *data
, int len
)
798 unsigned long start
= blob
->next
- (unsigned long)blob
->data
;
800 memcpy((char *)blob
->next
, data
, len
);
801 blob
->next
= _ALIGN(blob
->next
+ len
, 4);
808 void dt_start_node(struct iseries_flat_dt
*dt
, char *name
)
810 dt_push_u32(dt
, OF_DT_BEGIN_NODE
);
811 dt_push_bytes(&dt
->dt
, name
, strlen(name
) + 1);
814 #define dt_end_node(dt) dt_push_u32(dt, OF_DT_END_NODE)
816 void dt_prop(struct iseries_flat_dt
*dt
, char *name
, char *data
, int len
)
818 unsigned long offset
;
820 dt_push_u32(dt
, OF_DT_PROP
);
822 /* Length of the data */
823 dt_push_u32(dt
, len
);
825 /* Put the property name in the string blob. */
826 offset
= dt_push_bytes(&dt
->strings
, name
, strlen(name
) + 1);
828 /* The offset of the properties name in the string blob. */
829 dt_push_u32(dt
, (u32
)offset
);
831 /* The actual data. */
832 dt_push_bytes(&dt
->dt
, data
, len
);
835 void dt_prop_str(struct iseries_flat_dt
*dt
, char *name
, char *data
)
837 dt_prop(dt
, name
, data
, strlen(data
) + 1); /* + 1 for NULL */
840 void dt_prop_u32(struct iseries_flat_dt
*dt
, char *name
, u32 data
)
842 dt_prop(dt
, name
, (char *)&data
, sizeof(u32
));
845 void dt_prop_u64(struct iseries_flat_dt
*dt
, char *name
, u64 data
)
847 dt_prop(dt
, name
, (char *)&data
, sizeof(u64
));
850 void dt_prop_u64_list(struct iseries_flat_dt
*dt
, char *name
, u64
*data
, int n
)
852 dt_prop(dt
, name
, (char *)data
, sizeof(u64
) * n
);
855 void dt_prop_u32_list(struct iseries_flat_dt
*dt
, char *name
, u32
*data
, int n
)
857 dt_prop(dt
, name
, (char *)data
, sizeof(u32
) * n
);
860 void dt_prop_empty(struct iseries_flat_dt
*dt
, char *name
)
862 dt_prop(dt
, name
, NULL
, 0);
865 void dt_cpus(struct iseries_flat_dt
*dt
)
867 unsigned char buf
[32];
869 unsigned int i
, index
;
870 struct IoHriProcessorVpd
*d
;
874 snprintf(buf
, 32, "PowerPC,%s", cur_cpu_spec
->cpu_name
);
875 p
= strchr(buf
, ' ');
876 if (!p
) p
= buf
+ strlen(buf
);
878 dt_start_node(dt
, "cpus");
879 dt_prop_u32(dt
, "#address-cells", 1);
880 dt_prop_u32(dt
, "#size-cells", 0);
882 pft_size
[0] = 0; /* NUMA CEC cookie, 0 for non NUMA */
883 pft_size
[1] = __ilog2(HvCallHpt_getHptPages() * HW_PAGE_SIZE
);
885 for (i
= 0; i
< NR_CPUS
; i
++) {
886 if (lppaca
[i
].dyn_proc_status
>= 2)
889 snprintf(p
, 32 - (p
- buf
), "@%d", i
);
890 dt_start_node(dt
, buf
);
892 dt_prop_str(dt
, "device_type", "cpu");
894 index
= lppaca
[i
].dyn_hv_phys_proc_index
;
895 d
= &xIoHriProcessorVpd
[index
];
897 dt_prop_u32(dt
, "i-cache-size", d
->xInstCacheSize
* 1024);
898 dt_prop_u32(dt
, "i-cache-line-size", d
->xInstCacheOperandSize
);
900 dt_prop_u32(dt
, "d-cache-size", d
->xDataL1CacheSizeKB
* 1024);
901 dt_prop_u32(dt
, "d-cache-line-size", d
->xDataCacheOperandSize
);
903 /* magic conversions to Hz copied from old code */
904 dt_prop_u32(dt
, "clock-frequency",
905 ((1UL << 34) * 1000000) / d
->xProcFreq
);
906 dt_prop_u32(dt
, "timebase-frequency",
907 ((1UL << 32) * 1000000) / d
->xTimeBaseFreq
);
909 dt_prop_u32(dt
, "reg", i
);
911 dt_prop_u32_list(dt
, "ibm,pft-size", pft_size
, 2);
919 void build_flat_dt(struct iseries_flat_dt
*dt
, unsigned long phys_mem_size
)
925 dt_start_node(dt
, "");
927 dt_prop_u32(dt
, "#address-cells", 2);
928 dt_prop_u32(dt
, "#size-cells", 2);
931 dt_start_node(dt
, "memory@0");
932 dt_prop_str(dt
, "name", "memory");
933 dt_prop_str(dt
, "device_type", "memory");
935 tmp
[1] = phys_mem_size
;
936 dt_prop_u64_list(dt
, "reg", tmp
, 2);
940 dt_start_node(dt
, "chosen");
941 dt_prop_u32(dt
, "linux,platform", PLATFORM_ISERIES_LPAR
);
943 dt_prop_u64(dt
, "linux,memory-limit", cmd_mem_limit
);
950 dt_push_u32(dt
, OF_DT_END
);
953 void * __init
iSeries_early_setup(void)
955 unsigned long phys_mem_size
;
957 iSeries_fixup_klimit();
960 * Initialize the table which translate Linux physical addresses to
961 * AS/400 absolute addresses
963 phys_mem_size
= build_iSeries_Memory_Map();
965 iSeries_get_cmdline();
967 /* Save unparsed command line copy for /proc/cmdline */
968 strlcpy(saved_command_line
, cmd_line
, COMMAND_LINE_SIZE
);
970 /* Parse early parameters, in particular mem=x */
973 build_flat_dt(&iseries_dt
, phys_mem_size
);
975 return (void *) __pa(&iseries_dt
);
979 * On iSeries we just parse the mem=X option from the command line.
980 * On pSeries it's a bit more complicated, see prom_init_mem()
982 static int __init
early_parsemem(char *p
)
985 cmd_mem_limit
= ALIGN(memparse(p
, &p
), PAGE_SIZE
);
988 early_param("mem", early_parsemem
);
990 static void hvputc(char c
)
995 HvCall_writeLogBuffer(&c
, 1);
998 void __init
udbg_init_iseries(void)