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1 /*
2 * Powermac setup and early boot code plus other random bits.
3 *
4 * PowerPC version
5 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
6 *
7 * Adapted for Power Macintosh by Paul Mackerras
8 * Copyright (C) 1996 Paul Mackerras (paulus@samba.org)
9 *
10 * Derived from "arch/alpha/kernel/setup.c"
11 * Copyright (C) 1995 Linus Torvalds
12 *
13 * Maintained by Benjamin Herrenschmidt (benh@kernel.crashing.org)
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License
17 * as published by the Free Software Foundation; either version
18 * 2 of the License, or (at your option) any later version.
19 *
20 */
21
22 /*
23 * bootup setup stuff..
24 */
25
26 #include <linux/config.h>
27 #include <linux/init.h>
28 #include <linux/errno.h>
29 #include <linux/sched.h>
30 #include <linux/kernel.h>
31 #include <linux/mm.h>
32 #include <linux/stddef.h>
33 #include <linux/unistd.h>
34 #include <linux/ptrace.h>
35 #include <linux/slab.h>
36 #include <linux/user.h>
37 #include <linux/a.out.h>
38 #include <linux/tty.h>
39 #include <linux/string.h>
40 #include <linux/delay.h>
41 #include <linux/ioport.h>
42 #include <linux/major.h>
43 #include <linux/initrd.h>
44 #include <linux/vt_kern.h>
45 #include <linux/console.h>
46 #include <linux/ide.h>
47 #include <linux/pci.h>
48 #include <linux/adb.h>
49 #include <linux/cuda.h>
50 #include <linux/pmu.h>
51 #include <linux/irq.h>
52 #include <linux/seq_file.h>
53 #include <linux/root_dev.h>
54 #include <linux/bitops.h>
55 #include <linux/suspend.h>
56
57 #include <asm/reg.h>
58 #include <asm/sections.h>
59 #include <asm/prom.h>
60 #include <asm/system.h>
61 #include <asm/pgtable.h>
62 #include <asm/io.h>
63 #include <asm/pci-bridge.h>
64 #include <asm/ohare.h>
65 #include <asm/mediabay.h>
66 #include <asm/machdep.h>
67 #include <asm/dma.h>
68 #include <asm/cputable.h>
69 #include <asm/btext.h>
70 #include <asm/pmac_feature.h>
71 #include <asm/time.h>
72 #include <asm/of_device.h>
73 #include <asm/mmu_context.h>
74 #include <asm/iommu.h>
75 #include <asm/smu.h>
76 #include <asm/pmc.h>
77 #include <asm/mpic.h>
78 #include <asm/lmb.h>
79
80 #include "pmac.h"
81
82 #undef SHOW_GATWICK_IRQS
83
84 unsigned char drive_info;
85
86 int ppc_override_l2cr = 0;
87 int ppc_override_l2cr_value;
88 int has_l2cache = 0;
89
90 int pmac_newworld = 1;
91
92 static int current_root_goodness = -1;
93
94 extern int pmac_newworld;
95 extern struct machdep_calls pmac_md;
96
97 #define DEFAULT_ROOT_DEVICE Root_SDA1 /* sda1 - slightly silly choice */
98
99 #ifdef CONFIG_PPC64
100 #include <asm/udbg.h>
101 int sccdbg;
102 #endif
103
104 extern void zs_kgdb_hook(int tty_num);
105
106 sys_ctrler_t sys_ctrler = SYS_CTRLER_UNKNOWN;
107 EXPORT_SYMBOL(sys_ctrler);
108
109 #ifdef CONFIG_PMAC_SMU
110 unsigned long smu_cmdbuf_abs;
111 EXPORT_SYMBOL(smu_cmdbuf_abs);
112 #endif
113
114 #ifdef CONFIG_SMP
115 extern struct smp_ops_t psurge_smp_ops;
116 extern struct smp_ops_t core99_smp_ops;
117 #endif /* CONFIG_SMP */
118
119 static void pmac_show_cpuinfo(struct seq_file *m)
120 {
121 struct device_node *np;
122 char *pp;
123 int plen;
124 int mbmodel;
125 unsigned int mbflags;
126 char* mbname;
127
128 mbmodel = pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL,
129 PMAC_MB_INFO_MODEL, 0);
130 mbflags = pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL,
131 PMAC_MB_INFO_FLAGS, 0);
132 if (pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL, PMAC_MB_INFO_NAME,
133 (long) &mbname) != 0)
134 mbname = "Unknown";
135
136 /* find motherboard type */
137 seq_printf(m, "machine\t\t: ");
138 np = of_find_node_by_path("/");
139 if (np != NULL) {
140 pp = (char *) get_property(np, "model", NULL);
141 if (pp != NULL)
142 seq_printf(m, "%s\n", pp);
143 else
144 seq_printf(m, "PowerMac\n");
145 pp = (char *) get_property(np, "compatible", &plen);
146 if (pp != NULL) {
147 seq_printf(m, "motherboard\t:");
148 while (plen > 0) {
149 int l = strlen(pp) + 1;
150 seq_printf(m, " %s", pp);
151 plen -= l;
152 pp += l;
153 }
154 seq_printf(m, "\n");
155 }
156 of_node_put(np);
157 } else
158 seq_printf(m, "PowerMac\n");
159
160 /* print parsed model */
161 seq_printf(m, "detected as\t: %d (%s)\n", mbmodel, mbname);
162 seq_printf(m, "pmac flags\t: %08x\n", mbflags);
163
164 /* find l2 cache info */
165 np = of_find_node_by_name(NULL, "l2-cache");
166 if (np == NULL)
167 np = of_find_node_by_type(NULL, "cache");
168 if (np != NULL) {
169 unsigned int *ic = (unsigned int *)
170 get_property(np, "i-cache-size", NULL);
171 unsigned int *dc = (unsigned int *)
172 get_property(np, "d-cache-size", NULL);
173 seq_printf(m, "L2 cache\t:");
174 has_l2cache = 1;
175 if (get_property(np, "cache-unified", NULL) != 0 && dc) {
176 seq_printf(m, " %dK unified", *dc / 1024);
177 } else {
178 if (ic)
179 seq_printf(m, " %dK instruction", *ic / 1024);
180 if (dc)
181 seq_printf(m, "%s %dK data",
182 (ic? " +": ""), *dc / 1024);
183 }
184 pp = get_property(np, "ram-type", NULL);
185 if (pp)
186 seq_printf(m, " %s", pp);
187 seq_printf(m, "\n");
188 of_node_put(np);
189 }
190
191 /* Indicate newworld/oldworld */
192 seq_printf(m, "pmac-generation\t: %s\n",
193 pmac_newworld ? "NewWorld" : "OldWorld");
194 }
195
196 static void pmac_show_percpuinfo(struct seq_file *m, int i)
197 {
198 #ifdef CONFIG_CPU_FREQ_PMAC
199 extern unsigned int pmac_get_one_cpufreq(int i);
200 unsigned int freq = pmac_get_one_cpufreq(i);
201 if (freq != 0) {
202 seq_printf(m, "clock\t\t: %dMHz\n", freq/1000);
203 return;
204 }
205 #endif /* CONFIG_CPU_FREQ_PMAC */
206 }
207
208 #ifndef CONFIG_ADB_CUDA
209 int find_via_cuda(void)
210 {
211 if (!find_devices("via-cuda"))
212 return 0;
213 printk("WARNING ! Your machine is CUDA-based but your kernel\n");
214 printk(" wasn't compiled with CONFIG_ADB_CUDA option !\n");
215 return 0;
216 }
217 #endif
218
219 #ifndef CONFIG_ADB_PMU
220 int find_via_pmu(void)
221 {
222 if (!find_devices("via-pmu"))
223 return 0;
224 printk("WARNING ! Your machine is PMU-based but your kernel\n");
225 printk(" wasn't compiled with CONFIG_ADB_PMU option !\n");
226 return 0;
227 }
228 #endif
229
230 #ifndef CONFIG_PMAC_SMU
231 int smu_init(void)
232 {
233 /* should check and warn if SMU is present */
234 return 0;
235 }
236 #endif
237
238 #ifdef CONFIG_PPC32
239 static volatile u32 *sysctrl_regs;
240
241 static void __init ohare_init(void)
242 {
243 /* this area has the CPU identification register
244 and some registers used by smp boards */
245 sysctrl_regs = (volatile u32 *) ioremap(0xf8000000, 0x1000);
246
247 /*
248 * Turn on the L2 cache.
249 * We assume that we have a PSX memory controller iff
250 * we have an ohare I/O controller.
251 */
252 if (find_devices("ohare") != NULL) {
253 if (((sysctrl_regs[2] >> 24) & 0xf) >= 3) {
254 if (sysctrl_regs[4] & 0x10)
255 sysctrl_regs[4] |= 0x04000020;
256 else
257 sysctrl_regs[4] |= 0x04000000;
258 if(has_l2cache)
259 printk(KERN_INFO "Level 2 cache enabled\n");
260 }
261 }
262 }
263
264 static void __init l2cr_init(void)
265 {
266 /* Checks "l2cr-value" property in the registry */
267 if (cpu_has_feature(CPU_FTR_L2CR)) {
268 struct device_node *np = find_devices("cpus");
269 if (np == 0)
270 np = find_type_devices("cpu");
271 if (np != 0) {
272 unsigned int *l2cr = (unsigned int *)
273 get_property(np, "l2cr-value", NULL);
274 if (l2cr != 0) {
275 ppc_override_l2cr = 1;
276 ppc_override_l2cr_value = *l2cr;
277 _set_L2CR(0);
278 _set_L2CR(ppc_override_l2cr_value);
279 }
280 }
281 }
282
283 if (ppc_override_l2cr)
284 printk(KERN_INFO "L2CR overridden (0x%x), "
285 "backside cache is %s\n",
286 ppc_override_l2cr_value,
287 (ppc_override_l2cr_value & 0x80000000)
288 ? "enabled" : "disabled");
289 }
290 #endif
291
292 void __init pmac_setup_arch(void)
293 {
294 struct device_node *cpu, *ic;
295 int *fp;
296 unsigned long pvr;
297
298 pvr = PVR_VER(mfspr(SPRN_PVR));
299
300 /* Set loops_per_jiffy to a half-way reasonable value,
301 for use until calibrate_delay gets called. */
302 loops_per_jiffy = 50000000 / HZ;
303 cpu = of_find_node_by_type(NULL, "cpu");
304 if (cpu != NULL) {
305 fp = (int *) get_property(cpu, "clock-frequency", NULL);
306 if (fp != NULL) {
307 if (pvr >= 0x30 && pvr < 0x80)
308 /* PPC970 etc. */
309 loops_per_jiffy = *fp / (3 * HZ);
310 else if (pvr == 4 || pvr >= 8)
311 /* 604, G3, G4 etc. */
312 loops_per_jiffy = *fp / HZ;
313 else
314 /* 601, 603, etc. */
315 loops_per_jiffy = *fp / (2 * HZ);
316 }
317 of_node_put(cpu);
318 }
319
320 /* See if newworld or oldworld */
321 for (ic = NULL; (ic = of_find_all_nodes(ic)) != NULL; )
322 if (get_property(ic, "interrupt-controller", NULL))
323 break;
324 pmac_newworld = (ic != NULL);
325 if (ic)
326 of_node_put(ic);
327
328 /* Lookup PCI hosts */
329 pmac_pci_init();
330
331 #ifdef CONFIG_PPC32
332 ohare_init();
333 l2cr_init();
334 #endif /* CONFIG_PPC32 */
335
336 #ifdef CONFIG_PPC64
337 /* Probe motherboard chipset */
338 /* this is done earlier in setup_arch for 32-bit */
339 pmac_feature_init();
340
341 /* We can NAP */
342 powersave_nap = 1;
343 printk(KERN_INFO "Using native/NAP idle loop\n");
344 #endif
345
346 #ifdef CONFIG_KGDB
347 zs_kgdb_hook(0);
348 #endif
349
350 find_via_cuda();
351 find_via_pmu();
352 smu_init();
353
354 #if defined(CONFIG_NVRAM) || defined(CONFIG_PPC64)
355 pmac_nvram_init();
356 #endif
357
358 #ifdef CONFIG_PPC32
359 #ifdef CONFIG_BLK_DEV_INITRD
360 if (initrd_start)
361 ROOT_DEV = Root_RAM0;
362 else
363 #endif
364 ROOT_DEV = DEFAULT_ROOT_DEVICE;
365 #endif
366
367 #ifdef CONFIG_SMP
368 /* Check for Core99 */
369 if (find_devices("uni-n") || find_devices("u3"))
370 smp_ops = &core99_smp_ops;
371 #ifdef CONFIG_PPC32
372 else
373 smp_ops = &psurge_smp_ops;
374 #endif
375 #endif /* CONFIG_SMP */
376 }
377
378 char *bootpath;
379 char *bootdevice;
380 void *boot_host;
381 int boot_target;
382 int boot_part;
383 extern dev_t boot_dev;
384
385 #ifdef CONFIG_SCSI
386 void __init note_scsi_host(struct device_node *node, void *host)
387 {
388 int l;
389 char *p;
390
391 l = strlen(node->full_name);
392 if (bootpath != NULL && bootdevice != NULL
393 && strncmp(node->full_name, bootdevice, l) == 0
394 && (bootdevice[l] == '/' || bootdevice[l] == 0)) {
395 boot_host = host;
396 /*
397 * There's a bug in OF 1.0.5. (Why am I not surprised.)
398 * If you pass a path like scsi/sd@1:0 to canon, it returns
399 * something like /bandit@F2000000/gc@10/53c94@10000/sd@0,0
400 * That is, the scsi target number doesn't get preserved.
401 * So we pick the target number out of bootpath and use that.
402 */
403 p = strstr(bootpath, "/sd@");
404 if (p != NULL) {
405 p += 4;
406 boot_target = simple_strtoul(p, NULL, 10);
407 p = strchr(p, ':');
408 if (p != NULL)
409 boot_part = simple_strtoul(p + 1, NULL, 10);
410 }
411 }
412 }
413 EXPORT_SYMBOL(note_scsi_host);
414 #endif
415
416 #if defined(CONFIG_BLK_DEV_IDE) && defined(CONFIG_BLK_DEV_IDE_PMAC)
417 static dev_t __init find_ide_boot(void)
418 {
419 char *p;
420 int n;
421 dev_t __init pmac_find_ide_boot(char *bootdevice, int n);
422
423 if (bootdevice == NULL)
424 return 0;
425 p = strrchr(bootdevice, '/');
426 if (p == NULL)
427 return 0;
428 n = p - bootdevice;
429
430 return pmac_find_ide_boot(bootdevice, n);
431 }
432 #endif /* CONFIG_BLK_DEV_IDE && CONFIG_BLK_DEV_IDE_PMAC */
433
434 static void __init find_boot_device(void)
435 {
436 #if defined(CONFIG_BLK_DEV_IDE) && defined(CONFIG_BLK_DEV_IDE_PMAC)
437 boot_dev = find_ide_boot();
438 #endif
439 }
440
441 /* TODO: Merge the suspend-to-ram with the common code !!!
442 * currently, this is a stub implementation for suspend-to-disk
443 * only
444 */
445
446 #ifdef CONFIG_SOFTWARE_SUSPEND
447
448 static int pmac_pm_prepare(suspend_state_t state)
449 {
450 printk(KERN_DEBUG "%s(%d)\n", __FUNCTION__, state);
451
452 return 0;
453 }
454
455 static int pmac_pm_enter(suspend_state_t state)
456 {
457 printk(KERN_DEBUG "%s(%d)\n", __FUNCTION__, state);
458
459 /* Giveup the lazy FPU & vec so we don't have to back them
460 * up from the low level code
461 */
462 enable_kernel_fp();
463
464 #ifdef CONFIG_ALTIVEC
465 if (cur_cpu_spec->cpu_features & CPU_FTR_ALTIVEC)
466 enable_kernel_altivec();
467 #endif /* CONFIG_ALTIVEC */
468
469 return 0;
470 }
471
472 static int pmac_pm_finish(suspend_state_t state)
473 {
474 printk(KERN_DEBUG "%s(%d)\n", __FUNCTION__, state);
475
476 /* Restore userland MMU context */
477 set_context(current->active_mm->context, current->active_mm->pgd);
478
479 return 0;
480 }
481
482 static struct pm_ops pmac_pm_ops = {
483 .pm_disk_mode = PM_DISK_SHUTDOWN,
484 .prepare = pmac_pm_prepare,
485 .enter = pmac_pm_enter,
486 .finish = pmac_pm_finish,
487 };
488
489 #endif /* CONFIG_SOFTWARE_SUSPEND */
490
491 static int initializing = 1;
492
493 static int pmac_late_init(void)
494 {
495 initializing = 0;
496 #ifdef CONFIG_SOFTWARE_SUSPEND
497 pm_set_ops(&pmac_pm_ops);
498 #endif /* CONFIG_SOFTWARE_SUSPEND */
499 return 0;
500 }
501
502 late_initcall(pmac_late_init);
503
504 /* can't be __init - can be called whenever a disk is first accessed */
505 void note_bootable_part(dev_t dev, int part, int goodness)
506 {
507 static int found_boot = 0;
508 char *p;
509
510 if (!initializing)
511 return;
512 if ((goodness <= current_root_goodness) &&
513 ROOT_DEV != DEFAULT_ROOT_DEVICE)
514 return;
515 p = strstr(saved_command_line, "root=");
516 if (p != NULL && (p == saved_command_line || p[-1] == ' '))
517 return;
518
519 if (!found_boot) {
520 find_boot_device();
521 found_boot = 1;
522 }
523 if (!boot_dev || dev == boot_dev) {
524 ROOT_DEV = dev + part;
525 boot_dev = 0;
526 current_root_goodness = goodness;
527 }
528 }
529
530 #ifdef CONFIG_ADB_CUDA
531 static void cuda_restart(void)
532 {
533 struct adb_request req;
534
535 cuda_request(&req, NULL, 2, CUDA_PACKET, CUDA_RESET_SYSTEM);
536 for (;;)
537 cuda_poll();
538 }
539
540 static void cuda_shutdown(void)
541 {
542 struct adb_request req;
543
544 cuda_request(&req, NULL, 2, CUDA_PACKET, CUDA_POWERDOWN);
545 for (;;)
546 cuda_poll();
547 }
548
549 #else
550 #define cuda_restart()
551 #define cuda_shutdown()
552 #endif
553
554 #ifndef CONFIG_ADB_PMU
555 #define pmu_restart()
556 #define pmu_shutdown()
557 #endif
558
559 #ifndef CONFIG_PMAC_SMU
560 #define smu_restart()
561 #define smu_shutdown()
562 #endif
563
564 static void pmac_restart(char *cmd)
565 {
566 switch (sys_ctrler) {
567 case SYS_CTRLER_CUDA:
568 cuda_restart();
569 break;
570 case SYS_CTRLER_PMU:
571 pmu_restart();
572 break;
573 case SYS_CTRLER_SMU:
574 smu_restart();
575 break;
576 default: ;
577 }
578 }
579
580 static void pmac_power_off(void)
581 {
582 switch (sys_ctrler) {
583 case SYS_CTRLER_CUDA:
584 cuda_shutdown();
585 break;
586 case SYS_CTRLER_PMU:
587 pmu_shutdown();
588 break;
589 case SYS_CTRLER_SMU:
590 smu_shutdown();
591 break;
592 default: ;
593 }
594 }
595
596 static void
597 pmac_halt(void)
598 {
599 pmac_power_off();
600 }
601
602 #ifdef CONFIG_PPC32
603 void __init pmac_init(void)
604 {
605 /* isa_io_base gets set in pmac_pci_init */
606 isa_mem_base = PMAC_ISA_MEM_BASE;
607 pci_dram_offset = PMAC_PCI_DRAM_OFFSET;
608 ISA_DMA_THRESHOLD = ~0L;
609 DMA_MODE_READ = 1;
610 DMA_MODE_WRITE = 2;
611
612 ppc_md = pmac_md;
613
614 #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
615 #ifdef CONFIG_BLK_DEV_IDE_PMAC
616 ppc_ide_md.ide_init_hwif = pmac_ide_init_hwif_ports;
617 ppc_ide_md.default_io_base = pmac_ide_get_base;
618 #endif /* CONFIG_BLK_DEV_IDE_PMAC */
619 #endif /* defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE) */
620
621 if (ppc_md.progress) ppc_md.progress("pmac_init(): exit", 0);
622
623 }
624 #endif
625
626 /*
627 * Early initialization.
628 */
629 static void __init pmac_init_early(void)
630 {
631 #ifdef CONFIG_PPC64
632 /* Initialize hash table, from now on, we can take hash faults
633 * and call ioremap
634 */
635 hpte_init_native();
636
637 /* Init SCC */
638 if (strstr(cmd_line, "sccdbg")) {
639 sccdbg = 1;
640 udbg_init_scc(NULL);
641 }
642
643 /* Setup interrupt mapping options */
644 ppc64_interrupt_controller = IC_OPEN_PIC;
645
646 iommu_init_early_u3();
647 #endif
648 }
649
650 static void __init pmac_progress(char *s, unsigned short hex)
651 {
652 #ifdef CONFIG_PPC64
653 if (sccdbg) {
654 udbg_puts(s);
655 udbg_puts("\n");
656 return;
657 }
658 #endif
659 #ifdef CONFIG_BOOTX_TEXT
660 if (boot_text_mapped) {
661 btext_drawstring(s);
662 btext_drawchar('\n');
663 }
664 #endif /* CONFIG_BOOTX_TEXT */
665 }
666
667 /*
668 * pmac has no legacy IO, anything calling this function has to
669 * fail or bad things will happen
670 */
671 static int pmac_check_legacy_ioport(unsigned int baseport)
672 {
673 return -ENODEV;
674 }
675
676 static int __init pmac_declare_of_platform_devices(void)
677 {
678 struct device_node *np, *npp;
679
680 np = find_devices("uni-n");
681 if (np) {
682 for (np = np->child; np != NULL; np = np->sibling)
683 if (strncmp(np->name, "i2c", 3) == 0) {
684 of_platform_device_create(np, "uni-n-i2c",
685 NULL);
686 break;
687 }
688 }
689 np = find_devices("valkyrie");
690 if (np)
691 of_platform_device_create(np, "valkyrie", NULL);
692 np = find_devices("platinum");
693 if (np)
694 of_platform_device_create(np, "platinum", NULL);
695
696 npp = of_find_node_by_name(NULL, "u3");
697 if (npp) {
698 for (np = NULL; (np = of_get_next_child(npp, np)) != NULL;) {
699 if (strncmp(np->name, "i2c", 3) == 0) {
700 of_platform_device_create(np, "u3-i2c", NULL);
701 of_node_put(np);
702 break;
703 }
704 }
705 of_node_put(npp);
706 }
707 np = of_find_node_by_type(NULL, "smu");
708 if (np) {
709 of_platform_device_create(np, "smu", NULL);
710 of_node_put(np);
711 }
712
713 return 0;
714 }
715
716 device_initcall(pmac_declare_of_platform_devices);
717
718 /*
719 * Called very early, MMU is off, device-tree isn't unflattened
720 */
721 static int __init pmac_probe(int platform)
722 {
723 #ifdef CONFIG_PPC64
724 if (platform != PLATFORM_POWERMAC)
725 return 0;
726
727 /*
728 * On U3, the DART (iommu) must be allocated now since it
729 * has an impact on htab_initialize (due to the large page it
730 * occupies having to be broken up so the DART itself is not
731 * part of the cacheable linar mapping
732 */
733 alloc_u3_dart_table();
734 #endif
735
736 #ifdef CONFIG_PMAC_SMU
737 /*
738 * SMU based G5s need some memory below 2Gb, at least the current
739 * driver needs that. We have to allocate it now. We allocate 4k
740 * (1 small page) for now.
741 */
742 smu_cmdbuf_abs = lmb_alloc_base(4096, 4096, 0x80000000UL);
743 #endif /* CONFIG_PMAC_SMU */
744
745 return 1;
746 }
747
748 #ifdef CONFIG_PPC64
749 static int pmac_probe_mode(struct pci_bus *bus)
750 {
751 struct device_node *node = bus->sysdata;
752
753 /* We need to use normal PCI probing for the AGP bus,
754 since the device for the AGP bridge isn't in the tree. */
755 if (bus->self == NULL && device_is_compatible(node, "u3-agp"))
756 return PCI_PROBE_NORMAL;
757
758 return PCI_PROBE_DEVTREE;
759 }
760 #endif
761
762 struct machdep_calls __initdata pmac_md = {
763 #if defined(CONFIG_HOTPLUG_CPU) && defined(CONFIG_PPC64)
764 .cpu_die = generic_mach_cpu_die,
765 #endif
766 .probe = pmac_probe,
767 .setup_arch = pmac_setup_arch,
768 .init_early = pmac_init_early,
769 .show_cpuinfo = pmac_show_cpuinfo,
770 .show_percpuinfo = pmac_show_percpuinfo,
771 .init_IRQ = pmac_pic_init,
772 .get_irq = mpic_get_irq, /* changed later */
773 .pcibios_fixup = pmac_pcibios_fixup,
774 .restart = pmac_restart,
775 .power_off = pmac_power_off,
776 .halt = pmac_halt,
777 .time_init = pmac_time_init,
778 .get_boot_time = pmac_get_boot_time,
779 .set_rtc_time = pmac_set_rtc_time,
780 .get_rtc_time = pmac_get_rtc_time,
781 .calibrate_decr = pmac_calibrate_decr,
782 .feature_call = pmac_do_feature_call,
783 .check_legacy_ioport = pmac_check_legacy_ioport,
784 .progress = pmac_progress,
785 #ifdef CONFIG_PPC64
786 .pci_probe_mode = pmac_probe_mode,
787 .idle_loop = native_idle,
788 .enable_pmcs = power4_enable_pmcs,
789 #endif
790 #ifdef CONFIG_PPC32
791 .pcibios_enable_device_hook = pmac_pci_enable_device_hook,
792 .pcibios_after_init = pmac_pcibios_after_init,
793 .phys_mem_access_prot = pci_phys_mem_access_prot,
794 #endif
795 };