arch/powerpc/platforms/powernv/setup.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * PowerNV setup code.
   4  *
   5  * Copyright 2011 IBM Corp.
   6  */
   7
   8 #undef DEBUG
   9
  10 #include <linux/cpu.h>
  11 #include <linux/errno.h>
  12 #include <linux/sched.h>
  13 #include <linux/kernel.h>
  14 #include <linux/tty.h>
  15 #include <linux/reboot.h>
  16 #include <linux/init.h>
  17 #include <linux/console.h>
  18 #include <linux/delay.h>
  19 #include <linux/irq.h>
  20 #include <linux/seq_file.h>
  21 #include <linux/of.h>
  22 #include <linux/of_fdt.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/bug.h>
  25 #include <linux/pci.h>
  26 #include <linux/cpufreq.h>
  27
  28 #include <asm/machdep.h>
  29 #include <asm/firmware.h>
  30 #include <asm/xics.h>
  31 #include <asm/xive.h>
  32 #include <asm/opal.h>
  33 #include <asm/kexec.h>
  34 #include <asm/smp.h>
  35 #include <asm/tm.h>
  36 #include <asm/setup.h>
  37 #include <asm/security_features.h>
  38
  39 #include "powernv.h"
  40
  41
  42 static bool fw_feature_is(const char *state, const char *name,
  43                           struct device_node *fw_features)
  44 {
  45         struct device_node *np;
  46         bool rc = false;
  47
  48         np = of_get_child_by_name(fw_features, name);
  49         if (np) {
  50                 rc = of_property_read_bool(np, state);
  51                 of_node_put(np);
  52         }
  53
  54         return rc;
  55 }
  56
  57 static void init_fw_feat_flags(struct device_node *np)
  58 {
  59         if (fw_feature_is("enabled", "inst-spec-barrier-ori31,31,0", np))
  60                 security_ftr_set(SEC_FTR_SPEC_BAR_ORI31);
  61
  62         if (fw_feature_is("enabled", "fw-bcctrl-serialized", np))
  63                 security_ftr_set(SEC_FTR_BCCTRL_SERIALISED);
  64
  65         if (fw_feature_is("enabled", "inst-l1d-flush-ori30,30,0", np))
  66                 security_ftr_set(SEC_FTR_L1D_FLUSH_ORI30);
  67
  68         if (fw_feature_is("enabled", "inst-l1d-flush-trig2", np))
  69                 security_ftr_set(SEC_FTR_L1D_FLUSH_TRIG2);
  70
  71         if (fw_feature_is("enabled", "fw-l1d-thread-split", np))
  72                 security_ftr_set(SEC_FTR_L1D_THREAD_PRIV);
  73
  74         if (fw_feature_is("enabled", "fw-count-cache-disabled", np))
  75                 security_ftr_set(SEC_FTR_COUNT_CACHE_DISABLED);
  76
  77         if (fw_feature_is("enabled", "fw-count-cache-flush-bcctr2,0,0", np))
  78                 security_ftr_set(SEC_FTR_BCCTR_FLUSH_ASSIST);
  79
  80         if (fw_feature_is("enabled", "needs-count-cache-flush-on-context-switch", np))
  81                 security_ftr_set(SEC_FTR_FLUSH_COUNT_CACHE);
  82
  83         /*
  84          * The features below are enabled by default, so we instead look to see
  85          * if firmware has *disabled* them, and clear them if so.
  86          */
  87         if (fw_feature_is("disabled", "speculation-policy-favor-security", np))
  88                 security_ftr_clear(SEC_FTR_FAVOUR_SECURITY);
  89
  90         if (fw_feature_is("disabled", "needs-l1d-flush-msr-pr-0-to-1", np))
  91                 security_ftr_clear(SEC_FTR_L1D_FLUSH_PR);
  92
  93         if (fw_feature_is("disabled", "needs-l1d-flush-msr-hv-1-to-0", np))
  94                 security_ftr_clear(SEC_FTR_L1D_FLUSH_HV);
  95
  96         if (fw_feature_is("disabled", "needs-spec-barrier-for-bound-checks", np))
  97                 security_ftr_clear(SEC_FTR_BNDS_CHK_SPEC_BAR);
  98 }
  99
 100 static void pnv_setup_rfi_flush(void)
 101 {
 102         struct device_node *np, *fw_features;
 103         enum l1d_flush_type type;
 104         bool enable;
 105
 106         /* Default to fallback in case fw-features are not available */
 107         type = L1D_FLUSH_FALLBACK;
 108
 109         np = of_find_node_by_name(NULL, "ibm,opal");
 110         fw_features = of_get_child_by_name(np, "fw-features");
 111         of_node_put(np);
 112
 113         if (fw_features) {
 114                 init_fw_feat_flags(fw_features);
 115                 of_node_put(fw_features);
 116
 117                 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_TRIG2))
 118                         type = L1D_FLUSH_MTTRIG;
 119
 120                 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_ORI30))
 121                         type = L1D_FLUSH_ORI;
 122         }
 123
 124         enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && \
 125                  (security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR)   || \
 126                   security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV));
 127
 128         setup_rfi_flush(type, enable);
 129         setup_count_cache_flush();
 130 }
 131
 132 static void __init pnv_setup_arch(void)
 133 {
 134         set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT);
 135
 136         pnv_setup_rfi_flush();
 137         setup_stf_barrier();
 138
 139         /* Initialize SMP */
 140         pnv_smp_init();
 141
 142         /* Setup PCI */
 143         pnv_pci_init();
 144
 145         /* Setup RTC and NVRAM callbacks */
 146         if (firmware_has_feature(FW_FEATURE_OPAL))
 147                 opal_nvram_init();
 148
 149         /* Enable NAP mode */
 150         powersave_nap = 1;
 151
 152         /* XXX PMCS */
 153 }
 154
 155 static void __init pnv_init(void)
 156 {
 157         /*
 158          * Initialize the LPC bus now so that legacy serial
 159          * ports can be found on it
 160          */
 161         opal_lpc_init();
 162
 163 #ifdef CONFIG_HVC_OPAL
 164         if (firmware_has_feature(FW_FEATURE_OPAL))
 165                 hvc_opal_init_early();
 166         else
 167 #endif
 168                 add_preferred_console("hvc", 0, NULL);
 169 }
 170
 171 static void __init pnv_init_IRQ(void)
 172 {
 173         /* Try using a XIVE if available, otherwise use a XICS */
 174         if (!xive_native_init())
 175                 xics_init();
 176
 177         WARN_ON(!ppc_md.get_irq);
 178 }
 179
 180 static void pnv_show_cpuinfo(struct seq_file *m)
 181 {
 182         struct device_node *root;
 183         const char *model = "";
 184
 185         root = of_find_node_by_path("/");
 186         if (root)
 187                 model = of_get_property(root, "model", NULL);
 188         seq_printf(m, "machine\t\t: PowerNV %s\n", model);
 189         if (firmware_has_feature(FW_FEATURE_OPAL))
 190                 seq_printf(m, "firmware\t: OPAL\n");
 191         else
 192                 seq_printf(m, "firmware\t: BML\n");
 193         of_node_put(root);
 194         if (radix_enabled())
 195                 seq_printf(m, "MMU\t\t: Radix\n");
 196         else
 197                 seq_printf(m, "MMU\t\t: Hash\n");
 198 }
 199
 200 static void pnv_prepare_going_down(void)
 201 {
 202         /*
 203          * Disable all notifiers from OPAL, we can't
 204          * service interrupts anymore anyway
 205          */
 206         opal_event_shutdown();
 207
 208         /* Print flash update message if one is scheduled. */
 209         opal_flash_update_print_message();
 210
 211         smp_send_stop();
 212
 213         hard_irq_disable();
 214 }
 215
 216 static void  __noreturn pnv_restart(char *cmd)
 217 {
 218         long rc;
 219
 220         pnv_prepare_going_down();
 221
 222         do {
 223                 if (!cmd)
 224                         rc = opal_cec_reboot();
 225                 else if (strcmp(cmd, "full") == 0)
 226                         rc = opal_cec_reboot2(OPAL_REBOOT_FULL_IPL, NULL);
 227                 else
 228                         rc = OPAL_UNSUPPORTED;
 229
 230                 if (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
 231                         /* Opal is busy wait for some time and retry */
 232                         opal_poll_events(NULL);
 233                         mdelay(10);
 234
 235                 } else  if (cmd && rc) {
 236                         /* Unknown error while issuing reboot */
 237                         if (rc == OPAL_UNSUPPORTED)
 238                                 pr_err("Unsupported '%s' reboot.\n", cmd);
 239                         else
 240                                 pr_err("Unable to issue '%s' reboot. Err=%ld\n",
 241                                        cmd, rc);
 242                         pr_info("Forcing a cec-reboot\n");
 243                         cmd = NULL;
 244                         rc = OPAL_BUSY;
 245
 246                 } else if (rc != OPAL_SUCCESS) {
 247                         /* Unknown error while issuing cec-reboot */
 248                         pr_err("Unable to reboot. Err=%ld\n", rc);
 249                 }
 250
 251         } while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT);
 252
 253         for (;;)
 254                 opal_poll_events(NULL);
 255 }
 256
 257 static void __noreturn pnv_power_off(void)
 258 {
 259         long rc = OPAL_BUSY;
 260
 261         pnv_prepare_going_down();
 262
 263         while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
 264                 rc = opal_cec_power_down(0);
 265                 if (rc == OPAL_BUSY_EVENT)
 266                         opal_poll_events(NULL);
 267                 else
 268                         mdelay(10);
 269         }
 270         for (;;)
 271                 opal_poll_events(NULL);
 272 }
 273
 274 static void __noreturn pnv_halt(void)
 275 {
 276         pnv_power_off();
 277 }
 278
 279 static void pnv_progress(char *s, unsigned short hex)
 280 {
 281 }
 282
 283 static void pnv_shutdown(void)
 284 {
 285         /* Let the PCI code clear up IODA tables */
 286         pnv_pci_shutdown();
 287
 288         /*
 289          * Stop OPAL activity: Unregister all OPAL interrupts so they
 290          * don't fire up while we kexec and make sure all potentially
 291          * DMA'ing ops are complete (such as dump retrieval).
 292          */
 293         opal_shutdown();
 294 }
 295
 296 #ifdef CONFIG_KEXEC_CORE
 297 static void pnv_kexec_wait_secondaries_down(void)
 298 {
 299         int my_cpu, i, notified = -1;
 300
 301         my_cpu = get_cpu();
 302
 303         for_each_online_cpu(i) {
 304                 uint8_t status;
 305                 int64_t rc, timeout = 1000;
 306
 307                 if (i == my_cpu)
 308                         continue;
 309
 310                 for (;;) {
 311                         rc = opal_query_cpu_status(get_hard_smp_processor_id(i),
 312                                                    &status);
 313                         if (rc != OPAL_SUCCESS || status != OPAL_THREAD_STARTED)
 314                                 break;
 315                         barrier();
 316                         if (i != notified) {
 317                                 printk(KERN_INFO "kexec: waiting for cpu %d "
 318                                        "(physical %d) to enter OPAL\n",
 319                                        i, paca_ptrs[i]->hw_cpu_id);
 320                                 notified = i;
 321                         }
 322
 323                         /*
 324                          * On crash secondaries might be unreachable or hung,
 325                          * so timeout if we've waited too long
 326                          * */
 327                         mdelay(1);
 328                         if (timeout-- == 0) {
 329                                 printk(KERN_ERR "kexec: timed out waiting for "
 330                                        "cpu %d (physical %d) to enter OPAL\n",
 331                                        i, paca_ptrs[i]->hw_cpu_id);
 332                                 break;
 333                         }
 334                 }
 335         }
 336 }
 337
 338 static void pnv_kexec_cpu_down(int crash_shutdown, int secondary)
 339 {
 340         u64 reinit_flags;
 341
 342         if (xive_enabled())
 343                 xive_teardown_cpu();
 344         else
 345                 xics_kexec_teardown_cpu(secondary);
 346
 347         /* On OPAL, we return all CPUs to firmware */
 348         if (!firmware_has_feature(FW_FEATURE_OPAL))
 349                 return;
 350
 351         if (secondary) {
 352                 /* Return secondary CPUs to firmware on OPAL v3 */
 353                 mb();
 354                 get_paca()->kexec_state = KEXEC_STATE_REAL_MODE;
 355                 mb();
 356
 357                 /* Return the CPU to OPAL */
 358                 opal_return_cpu();
 359         } else {
 360                 /* Primary waits for the secondaries to have reached OPAL */
 361                 pnv_kexec_wait_secondaries_down();
 362
 363                 /* Switch XIVE back to emulation mode */
 364                 if (xive_enabled())
 365                         xive_shutdown();
 366
 367                 /*
 368                  * We might be running as little-endian - now that interrupts
 369                  * are disabled, reset the HILE bit to big-endian so we don't
 370                  * take interrupts in the wrong endian later
 371                  *
 372                  * We reinit to enable both radix and hash on P9 to ensure
 373                  * the mode used by the next kernel is always supported.
 374                  */
 375                 reinit_flags = OPAL_REINIT_CPUS_HILE_BE;
 376                 if (cpu_has_feature(CPU_FTR_ARCH_300))
 377                         reinit_flags |= OPAL_REINIT_CPUS_MMU_RADIX |
 378                                 OPAL_REINIT_CPUS_MMU_HASH;
 379                 opal_reinit_cpus(reinit_flags);
 380         }
 381 }
 382 #endif /* CONFIG_KEXEC_CORE */
 383
 384 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
 385 static unsigned long pnv_memory_block_size(void)
 386 {
 387         return 256UL * 1024 * 1024;
 388 }
 389 #endif
 390
 391 static void __init pnv_setup_machdep_opal(void)
 392 {
 393         ppc_md.get_boot_time = opal_get_boot_time;
 394         ppc_md.restart = pnv_restart;
 395         pm_power_off = pnv_power_off;
 396         ppc_md.halt = pnv_halt;
 397         /* ppc_md.system_reset_exception gets filled in by pnv_smp_init() */
 398         ppc_md.machine_check_exception = opal_machine_check;
 399         ppc_md.mce_check_early_recovery = opal_mce_check_early_recovery;
 400         if (opal_check_token(OPAL_HANDLE_HMI2))
 401                 ppc_md.hmi_exception_early = opal_hmi_exception_early2;
 402         else
 403                 ppc_md.hmi_exception_early = opal_hmi_exception_early;
 404         ppc_md.handle_hmi_exception = opal_handle_hmi_exception;
 405 }
 406
 407 static int __init pnv_probe(void)
 408 {
 409         if (!of_machine_is_compatible("ibm,powernv"))
 410                 return 0;
 411
 412         if (firmware_has_feature(FW_FEATURE_OPAL))
 413                 pnv_setup_machdep_opal();
 414
 415         pr_debug("PowerNV detected !\n");
 416
 417         pnv_init();
 418
 419         return 1;
 420 }
 421
 422 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
 423 void __init pnv_tm_init(void)
 424 {
 425         if (!firmware_has_feature(FW_FEATURE_OPAL) ||
 426             !pvr_version_is(PVR_POWER9) ||
 427             early_cpu_has_feature(CPU_FTR_TM))
 428                 return;
 429
 430         if (opal_reinit_cpus(OPAL_REINIT_CPUS_TM_SUSPEND_DISABLED) != OPAL_SUCCESS)
 431                 return;
 432
 433         pr_info("Enabling TM (Transactional Memory) with Suspend Disabled\n");
 434         cur_cpu_spec->cpu_features |= CPU_FTR_TM;
 435         /* Make sure "normal" HTM is off (it should be) */
 436         cur_cpu_spec->cpu_user_features2 &= ~PPC_FEATURE2_HTM;
 437         /* Turn on no suspend mode, and HTM no SC */
 438         cur_cpu_spec->cpu_user_features2 |= PPC_FEATURE2_HTM_NO_SUSPEND | \
 439                                             PPC_FEATURE2_HTM_NOSC;
 440         tm_suspend_disabled = true;
 441 }
 442 #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
 443
 444 /*
 445  * Returns the cpu frequency for 'cpu' in Hz. This is used by
 446  * /proc/cpuinfo
 447  */
 448 static unsigned long pnv_get_proc_freq(unsigned int cpu)
 449 {
 450         unsigned long ret_freq;
 451
 452         ret_freq = cpufreq_get(cpu) * 1000ul;
 453
 454         /*
 455          * If the backend cpufreq driver does not exist,
 456          * then fallback to old way of reporting the clockrate.
 457          */
 458         if (!ret_freq)
 459                 ret_freq = ppc_proc_freq;
 460         return ret_freq;
 461 }
 462
 463 static long pnv_machine_check_early(struct pt_regs *regs)
 464 {
 465         long handled = 0;
 466
 467         if (cur_cpu_spec && cur_cpu_spec->machine_check_early)
 468                 handled = cur_cpu_spec->machine_check_early(regs);
 469
 470         return handled;
 471 }
 472
 473 define_machine(powernv) {
 474         .name                   = "PowerNV",
 475         .probe                  = pnv_probe,
 476         .setup_arch             = pnv_setup_arch,
 477         .init_IRQ               = pnv_init_IRQ,
 478         .show_cpuinfo           = pnv_show_cpuinfo,
 479         .get_proc_freq          = pnv_get_proc_freq,
 480         .progress               = pnv_progress,
 481         .machine_shutdown       = pnv_shutdown,
 482         .power_save             = NULL,
 483         .calibrate_decr         = generic_calibrate_decr,
 484         .machine_check_early    = pnv_machine_check_early,
 485 #ifdef CONFIG_KEXEC_CORE
 486         .kexec_cpu_down         = pnv_kexec_cpu_down,
 487 #endif
 488 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
 489         .memory_block_size      = pnv_memory_block_size,
 490 #endif
 491 };