arch/powerpc/platforms/powernv/setup.c

   1 /*
   2  * PowerNV setup code.
   3  *
   4  * Copyright 2011 IBM Corp.
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version
   9  * 2 of the License, or (at your option) any later version.
  10  */
  11
  12 #undef DEBUG
  13
  14 #include <linux/cpu.h>
  15 #include <linux/errno.h>
  16 #include <linux/sched.h>
  17 #include <linux/kernel.h>
  18 #include <linux/tty.h>
  19 #include <linux/reboot.h>
  20 #include <linux/init.h>
  21 #include <linux/console.h>
  22 #include <linux/delay.h>
  23 #include <linux/irq.h>
  24 #include <linux/seq_file.h>
  25 #include <linux/of.h>
  26 #include <linux/of_fdt.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/bug.h>
  29 #include <linux/pci.h>
  30 #include <linux/cpufreq.h>
  31
  32 #include <asm/machdep.h>
  33 #include <asm/firmware.h>
  34 #include <asm/xics.h>
  35 #include <asm/xive.h>
  36 #include <asm/opal.h>
  37 #include <asm/kexec.h>
  38 #include <asm/smp.h>
  39 #include <asm/setup.h>
  40 #include <asm/security_features.h>
  41
  42 #include "powernv.h"
  43
  44
  45 static bool fw_feature_is(const char *state, const char *name,
  46                           struct device_node *fw_features)
  47 {
  48         struct device_node *np;
  49         bool rc = false;
  50
  51         np = of_get_child_by_name(fw_features, name);
  52         if (np) {
  53                 rc = of_property_read_bool(np, state);
  54                 of_node_put(np);
  55         }
  56
  57         return rc;
  58 }
  59
  60 static void init_fw_feat_flags(struct device_node *np)
  61 {
  62         if (fw_feature_is("enabled", "inst-spec-barrier-ori31,31,0", np))
  63                 security_ftr_set(SEC_FTR_SPEC_BAR_ORI31);
  64
  65         if (fw_feature_is("enabled", "fw-bcctrl-serialized", np))
  66                 security_ftr_set(SEC_FTR_BCCTRL_SERIALISED);
  67
  68         if (fw_feature_is("enabled", "inst-l1d-flush-ori30,30,0", np))
  69                 security_ftr_set(SEC_FTR_L1D_FLUSH_ORI30);
  70
  71         if (fw_feature_is("enabled", "inst-l1d-flush-trig2", np))
  72                 security_ftr_set(SEC_FTR_L1D_FLUSH_TRIG2);
  73
  74         if (fw_feature_is("enabled", "fw-l1d-thread-split", np))
  75                 security_ftr_set(SEC_FTR_L1D_THREAD_PRIV);
  76
  77         if (fw_feature_is("enabled", "fw-count-cache-disabled", np))
  78                 security_ftr_set(SEC_FTR_COUNT_CACHE_DISABLED);
  79
  80         /*
  81          * The features below are enabled by default, so we instead look to see
  82          * if firmware has *disabled* them, and clear them if so.
  83          */
  84         if (fw_feature_is("disabled", "speculation-policy-favor-security", np))
  85                 security_ftr_clear(SEC_FTR_FAVOUR_SECURITY);
  86
  87         if (fw_feature_is("disabled", "needs-l1d-flush-msr-pr-0-to-1", np))
  88                 security_ftr_clear(SEC_FTR_L1D_FLUSH_PR);
  89
  90         if (fw_feature_is("disabled", "needs-l1d-flush-msr-hv-1-to-0", np))
  91                 security_ftr_clear(SEC_FTR_L1D_FLUSH_HV);
  92
  93         if (fw_feature_is("disabled", "needs-spec-barrier-for-bound-checks", np))
  94                 security_ftr_clear(SEC_FTR_BNDS_CHK_SPEC_BAR);
  95 }
  96
  97 static void pnv_setup_rfi_flush(void)
  98 {
  99         struct device_node *np, *fw_features;
 100         enum l1d_flush_type type;
 101         bool enable;
 102
 103         /* Default to fallback in case fw-features are not available */
 104         type = L1D_FLUSH_FALLBACK;
 105
 106         np = of_find_node_by_name(NULL, "ibm,opal");
 107         fw_features = of_get_child_by_name(np, "fw-features");
 108         of_node_put(np);
 109
 110         if (fw_features) {
 111                 init_fw_feat_flags(fw_features);
 112                 of_node_put(fw_features);
 113
 114                 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_TRIG2))
 115                         type = L1D_FLUSH_MTTRIG;
 116
 117                 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_ORI30))
 118                         type = L1D_FLUSH_ORI;
 119         }
 120
 121         enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && \
 122                  (security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR)   || \
 123                   security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV));
 124
 125         setup_rfi_flush(type, enable);
 126 }
 127
 128 static void __init pnv_setup_arch(void)
 129 {
 130         set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT);
 131
 132         pnv_setup_rfi_flush();
 133
 134         /* Initialize SMP */
 135         pnv_smp_init();
 136
 137         /* Setup PCI */
 138         pnv_pci_init();
 139
 140         /* Setup RTC and NVRAM callbacks */
 141         if (firmware_has_feature(FW_FEATURE_OPAL))
 142                 opal_nvram_init();
 143
 144         /* Enable NAP mode */
 145         powersave_nap = 1;
 146
 147         /* XXX PMCS */
 148 }
 149
 150 static void __init pnv_init(void)
 151 {
 152         /*
 153          * Initialize the LPC bus now so that legacy serial
 154          * ports can be found on it
 155          */
 156         opal_lpc_init();
 157
 158 #ifdef CONFIG_HVC_OPAL
 159         if (firmware_has_feature(FW_FEATURE_OPAL))
 160                 hvc_opal_init_early();
 161         else
 162 #endif
 163                 add_preferred_console("hvc", 0, NULL);
 164 }
 165
 166 static void __init pnv_init_IRQ(void)
 167 {
 168         /* Try using a XIVE if available, otherwise use a XICS */
 169         if (!xive_native_init())
 170                 xics_init();
 171
 172         WARN_ON(!ppc_md.get_irq);
 173 }
 174
 175 static void pnv_show_cpuinfo(struct seq_file *m)
 176 {
 177         struct device_node *root;
 178         const char *model = "";
 179
 180         root = of_find_node_by_path("/");
 181         if (root)
 182                 model = of_get_property(root, "model", NULL);
 183         seq_printf(m, "machine\t\t: PowerNV %s\n", model);
 184         if (firmware_has_feature(FW_FEATURE_OPAL))
 185                 seq_printf(m, "firmware\t: OPAL\n");
 186         else
 187                 seq_printf(m, "firmware\t: BML\n");
 188         of_node_put(root);
 189         if (radix_enabled())
 190                 seq_printf(m, "MMU\t\t: Radix\n");
 191         else
 192                 seq_printf(m, "MMU\t\t: Hash\n");
 193 }
 194
 195 static void pnv_prepare_going_down(void)
 196 {
 197         /*
 198          * Disable all notifiers from OPAL, we can't
 199          * service interrupts anymore anyway
 200          */
 201         opal_event_shutdown();
 202
 203         /* Soft disable interrupts */
 204         local_irq_disable();
 205
 206         /*
 207          * Return secondary CPUs to firwmare if a flash update
 208          * is pending otherwise we will get all sort of error
 209          * messages about CPU being stuck etc.. This will also
 210          * have the side effect of hard disabling interrupts so
 211          * past this point, the kernel is effectively dead.
 212          */
 213         opal_flash_term_callback();
 214 }
 215
 216 static void  __noreturn pnv_restart(char *cmd)
 217 {
 218         long rc = OPAL_BUSY;
 219
 220         pnv_prepare_going_down();
 221
 222         while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
 223                 rc = opal_cec_reboot();
 224                 if (rc == OPAL_BUSY_EVENT)
 225                         opal_poll_events(NULL);
 226                 else
 227                         mdelay(10);
 228         }
 229         for (;;)
 230                 opal_poll_events(NULL);
 231 }
 232
 233 static void __noreturn pnv_power_off(void)
 234 {
 235         long rc = OPAL_BUSY;
 236
 237         pnv_prepare_going_down();
 238
 239         while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
 240                 rc = opal_cec_power_down(0);
 241                 if (rc == OPAL_BUSY_EVENT)
 242                         opal_poll_events(NULL);
 243                 else
 244                         mdelay(10);
 245         }
 246         for (;;)
 247                 opal_poll_events(NULL);
 248 }
 249
 250 static void __noreturn pnv_halt(void)
 251 {
 252         pnv_power_off();
 253 }
 254
 255 static void pnv_progress(char *s, unsigned short hex)
 256 {
 257 }
 258
 259 static void pnv_shutdown(void)
 260 {
 261         /* Let the PCI code clear up IODA tables */
 262         pnv_pci_shutdown();
 263
 264         /*
 265          * Stop OPAL activity: Unregister all OPAL interrupts so they
 266          * don't fire up while we kexec and make sure all potentially
 267          * DMA'ing ops are complete (such as dump retrieval).
 268          */
 269         opal_shutdown();
 270 }
 271
 272 #ifdef CONFIG_KEXEC_CORE
 273 static void pnv_kexec_wait_secondaries_down(void)
 274 {
 275         int my_cpu, i, notified = -1;
 276
 277         my_cpu = get_cpu();
 278
 279         for_each_online_cpu(i) {
 280                 uint8_t status;
 281                 int64_t rc, timeout = 1000;
 282
 283                 if (i == my_cpu)
 284                         continue;
 285
 286                 for (;;) {
 287                         rc = opal_query_cpu_status(get_hard_smp_processor_id(i),
 288                                                    &status);
 289                         if (rc != OPAL_SUCCESS || status != OPAL_THREAD_STARTED)
 290                                 break;
 291                         barrier();
 292                         if (i != notified) {
 293                                 printk(KERN_INFO "kexec: waiting for cpu %d "
 294                                        "(physical %d) to enter OPAL\n",
 295                                        i, paca[i].hw_cpu_id);
 296                                 notified = i;
 297                         }
 298
 299                         /*
 300                          * On crash secondaries might be unreachable or hung,
 301                          * so timeout if we've waited too long
 302                          * */
 303                         mdelay(1);
 304                         if (timeout-- == 0) {
 305                                 printk(KERN_ERR "kexec: timed out waiting for "
 306                                        "cpu %d (physical %d) to enter OPAL\n",
 307                                        i, paca[i].hw_cpu_id);
 308                                 break;
 309                         }
 310                 }
 311         }
 312 }
 313
 314 static void pnv_kexec_cpu_down(int crash_shutdown, int secondary)
 315 {
 316         u64 reinit_flags;
 317
 318         if (xive_enabled())
 319                 xive_kexec_teardown_cpu(secondary);
 320         else
 321                 xics_kexec_teardown_cpu(secondary);
 322
 323         /* On OPAL, we return all CPUs to firmware */
 324         if (!firmware_has_feature(FW_FEATURE_OPAL))
 325                 return;
 326
 327         if (secondary) {
 328                 /* Return secondary CPUs to firmware on OPAL v3 */
 329                 mb();
 330                 get_paca()->kexec_state = KEXEC_STATE_REAL_MODE;
 331                 mb();
 332
 333                 /* Return the CPU to OPAL */
 334                 opal_return_cpu();
 335         } else {
 336                 /* Primary waits for the secondaries to have reached OPAL */
 337                 pnv_kexec_wait_secondaries_down();
 338
 339                 /* Switch XIVE back to emulation mode */
 340                 if (xive_enabled())
 341                         xive_shutdown();
 342
 343                 /*
 344                  * We might be running as little-endian - now that interrupts
 345                  * are disabled, reset the HILE bit to big-endian so we don't
 346                  * take interrupts in the wrong endian later
 347                  *
 348                  * We reinit to enable both radix and hash on P9 to ensure
 349                  * the mode used by the next kernel is always supported.
 350                  */
 351                 reinit_flags = OPAL_REINIT_CPUS_HILE_BE;
 352                 if (cpu_has_feature(CPU_FTR_ARCH_300))
 353                         reinit_flags |= OPAL_REINIT_CPUS_MMU_RADIX |
 354                                 OPAL_REINIT_CPUS_MMU_HASH;
 355                 opal_reinit_cpus(reinit_flags);
 356         }
 357 }
 358 #endif /* CONFIG_KEXEC_CORE */
 359
 360 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
 361 static unsigned long pnv_memory_block_size(void)
 362 {
 363         /*
 364          * We map the kernel linear region with 1GB large pages on radix. For
 365          * memory hot unplug to work our memory block size must be at least
 366          * this size.
 367          */
 368         if (radix_enabled())
 369                 return 1UL * 1024 * 1024 * 1024;
 370         else
 371                 return 256UL * 1024 * 1024;
 372 }
 373 #endif
 374
 375 static void __init pnv_setup_machdep_opal(void)
 376 {
 377         ppc_md.get_boot_time = opal_get_boot_time;
 378         ppc_md.restart = pnv_restart;
 379         pm_power_off = pnv_power_off;
 380         ppc_md.halt = pnv_halt;
 381         ppc_md.machine_check_exception = opal_machine_check;
 382         ppc_md.mce_check_early_recovery = opal_mce_check_early_recovery;
 383         ppc_md.hmi_exception_early = opal_hmi_exception_early;
 384         ppc_md.handle_hmi_exception = opal_handle_hmi_exception;
 385 }
 386
 387 static int __init pnv_probe(void)
 388 {
 389         if (!of_machine_is_compatible("ibm,powernv"))
 390                 return 0;
 391
 392         if (firmware_has_feature(FW_FEATURE_OPAL))
 393                 pnv_setup_machdep_opal();
 394
 395         pr_debug("PowerNV detected !\n");
 396
 397         pnv_init();
 398
 399         return 1;
 400 }
 401
 402 /*
 403  * Returns the cpu frequency for 'cpu' in Hz. This is used by
 404  * /proc/cpuinfo
 405  */
 406 static unsigned long pnv_get_proc_freq(unsigned int cpu)
 407 {
 408         unsigned long ret_freq;
 409
 410         ret_freq = cpufreq_quick_get(cpu) * 1000ul;
 411
 412         /*
 413          * If the backend cpufreq driver does not exist,
 414          * then fallback to old way of reporting the clockrate.
 415          */
 416         if (!ret_freq)
 417                 ret_freq = ppc_proc_freq;
 418         return ret_freq;
 419 }
 420
 421 define_machine(powernv) {
 422         .name                   = "PowerNV",
 423         .probe                  = pnv_probe,
 424         .setup_arch             = pnv_setup_arch,
 425         .init_IRQ               = pnv_init_IRQ,
 426         .show_cpuinfo           = pnv_show_cpuinfo,
 427         .get_proc_freq          = pnv_get_proc_freq,
 428         .progress               = pnv_progress,
 429         .machine_shutdown       = pnv_shutdown,
 430         .power_save             = NULL,
 431         .calibrate_decr         = generic_calibrate_decr,
 432 #ifdef CONFIG_KEXEC_CORE
 433         .kexec_cpu_down         = pnv_kexec_cpu_down,
 434 #endif
 435 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
 436         .memory_block_size      = pnv_memory_block_size,
 437 #endif
 438 };