arch/powerpc/platforms/powernv/setup.c

   1 /*
   2  * PowerNV setup code.
   3  *
   4  * Copyright 2011 IBM Corp.
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version
   9  * 2 of the License, or (at your option) any later version.
  10  */
  11
  12 #undef DEBUG
  13
  14 #include <linux/cpu.h>
  15 #include <linux/errno.h>
  16 #include <linux/sched.h>
  17 #include <linux/kernel.h>
  18 #include <linux/tty.h>
  19 #include <linux/reboot.h>
  20 #include <linux/init.h>
  21 #include <linux/console.h>
  22 #include <linux/delay.h>
  23 #include <linux/irq.h>
  24 #include <linux/seq_file.h>
  25 #include <linux/of.h>
  26 #include <linux/of_fdt.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/bug.h>
  29 #include <linux/pci.h>
  30 #include <linux/cpufreq.h>
  31
  32 #include <asm/machdep.h>
  33 #include <asm/firmware.h>
  34 #include <asm/xics.h>
  35 #include <asm/xive.h>
  36 #include <asm/opal.h>
  37 #include <asm/kexec.h>
  38 #include <asm/smp.h>
  39 #include <asm/tm.h>
  40 #include <asm/setup.h>
  41 #include <asm/security_features.h>
  42
  43 #include "powernv.h"
  44
  45
  46 static bool fw_feature_is(const char *state, const char *name,
  47                           struct device_node *fw_features)
  48 {
  49         struct device_node *np;
  50         bool rc = false;
  51
  52         np = of_get_child_by_name(fw_features, name);
  53         if (np) {
  54                 rc = of_property_read_bool(np, state);
  55                 of_node_put(np);
  56         }
  57
  58         return rc;
  59 }
  60
  61 static void init_fw_feat_flags(struct device_node *np)
  62 {
  63         if (fw_feature_is("enabled", "inst-spec-barrier-ori31,31,0", np))
  64                 security_ftr_set(SEC_FTR_SPEC_BAR_ORI31);
  65
  66         if (fw_feature_is("enabled", "fw-bcctrl-serialized", np))
  67                 security_ftr_set(SEC_FTR_BCCTRL_SERIALISED);
  68
  69         if (fw_feature_is("enabled", "inst-l1d-flush-ori30,30,0", np))
  70                 security_ftr_set(SEC_FTR_L1D_FLUSH_ORI30);
  71
  72         if (fw_feature_is("enabled", "inst-l1d-flush-trig2", np))
  73                 security_ftr_set(SEC_FTR_L1D_FLUSH_TRIG2);
  74
  75         if (fw_feature_is("enabled", "fw-l1d-thread-split", np))
  76                 security_ftr_set(SEC_FTR_L1D_THREAD_PRIV);
  77
  78         if (fw_feature_is("enabled", "fw-count-cache-disabled", np))
  79                 security_ftr_set(SEC_FTR_COUNT_CACHE_DISABLED);
  80
  81         /*
  82          * The features below are enabled by default, so we instead look to see
  83          * if firmware has *disabled* them, and clear them if so.
  84          */
  85         if (fw_feature_is("disabled", "speculation-policy-favor-security", np))
  86                 security_ftr_clear(SEC_FTR_FAVOUR_SECURITY);
  87
  88         if (fw_feature_is("disabled", "needs-l1d-flush-msr-pr-0-to-1", np))
  89                 security_ftr_clear(SEC_FTR_L1D_FLUSH_PR);
  90
  91         if (fw_feature_is("disabled", "needs-l1d-flush-msr-hv-1-to-0", np))
  92                 security_ftr_clear(SEC_FTR_L1D_FLUSH_HV);
  93
  94         if (fw_feature_is("disabled", "needs-spec-barrier-for-bound-checks", np))
  95                 security_ftr_clear(SEC_FTR_BNDS_CHK_SPEC_BAR);
  96 }
  97
  98 static void pnv_setup_rfi_flush(void)
  99 {
 100         struct device_node *np, *fw_features;
 101         enum l1d_flush_type type;
 102         bool enable;
 103
 104         /* Default to fallback in case fw-features are not available */
 105         type = L1D_FLUSH_FALLBACK;
 106
 107         np = of_find_node_by_name(NULL, "ibm,opal");
 108         fw_features = of_get_child_by_name(np, "fw-features");
 109         of_node_put(np);
 110
 111         if (fw_features) {
 112                 init_fw_feat_flags(fw_features);
 113                 of_node_put(fw_features);
 114
 115                 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_TRIG2))
 116                         type = L1D_FLUSH_MTTRIG;
 117
 118                 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_ORI30))
 119                         type = L1D_FLUSH_ORI;
 120         }
 121
 122         enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && \
 123                  (security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR)   || \
 124                   security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV));
 125
 126         setup_rfi_flush(type, enable);
 127         setup_barrier_nospec();
 128 }
 129
 130 static void __init pnv_setup_arch(void)
 131 {
 132         set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT);
 133
 134         pnv_setup_rfi_flush();
 135         setup_stf_barrier();
 136
 137         /* Initialize SMP */
 138         pnv_smp_init();
 139
 140         /* Setup PCI */
 141         pnv_pci_init();
 142
 143         /* Setup RTC and NVRAM callbacks */
 144         if (firmware_has_feature(FW_FEATURE_OPAL))
 145                 opal_nvram_init();
 146
 147         /* Enable NAP mode */
 148         powersave_nap = 1;
 149
 150         /* XXX PMCS */
 151 }
 152
 153 static void __init pnv_init(void)
 154 {
 155         /*
 156          * Initialize the LPC bus now so that legacy serial
 157          * ports can be found on it
 158          */
 159         opal_lpc_init();
 160
 161 #ifdef CONFIG_HVC_OPAL
 162         if (firmware_has_feature(FW_FEATURE_OPAL))
 163                 hvc_opal_init_early();
 164         else
 165 #endif
 166                 add_preferred_console("hvc", 0, NULL);
 167 }
 168
 169 static void __init pnv_init_IRQ(void)
 170 {
 171         /* Try using a XIVE if available, otherwise use a XICS */
 172         if (!xive_native_init())
 173                 xics_init();
 174
 175         WARN_ON(!ppc_md.get_irq);
 176 }
 177
 178 static void pnv_show_cpuinfo(struct seq_file *m)
 179 {
 180         struct device_node *root;
 181         const char *model = "";
 182
 183         root = of_find_node_by_path("/");
 184         if (root)
 185                 model = of_get_property(root, "model", NULL);
 186         seq_printf(m, "machine\t\t: PowerNV %s\n", model);
 187         if (firmware_has_feature(FW_FEATURE_OPAL))
 188                 seq_printf(m, "firmware\t: OPAL\n");
 189         else
 190                 seq_printf(m, "firmware\t: BML\n");
 191         of_node_put(root);
 192         if (radix_enabled())
 193                 seq_printf(m, "MMU\t\t: Radix\n");
 194         else
 195                 seq_printf(m, "MMU\t\t: Hash\n");
 196 }
 197
 198 static void pnv_prepare_going_down(void)
 199 {
 200         /*
 201          * Disable all notifiers from OPAL, we can't
 202          * service interrupts anymore anyway
 203          */
 204         opal_event_shutdown();
 205
 206         /* Soft disable interrupts */
 207         local_irq_disable();
 208
 209         /*
 210          * Return secondary CPUs to firwmare if a flash update
 211          * is pending otherwise we will get all sort of error
 212          * messages about CPU being stuck etc.. This will also
 213          * have the side effect of hard disabling interrupts so
 214          * past this point, the kernel is effectively dead.
 215          */
 216         opal_flash_term_callback();
 217 }
 218
 219 static void  __noreturn pnv_restart(char *cmd)
 220 {
 221         long rc;
 222
 223         pnv_prepare_going_down();
 224
 225         do {
 226                 if (!cmd)
 227                         rc = opal_cec_reboot();
 228                 else if (strcmp(cmd, "full") == 0)
 229                         rc = opal_cec_reboot2(OPAL_REBOOT_FULL_IPL, NULL);
 230                 else
 231                         rc = OPAL_UNSUPPORTED;
 232
 233                 if (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
 234                         /* Opal is busy wait for some time and retry */
 235                         opal_poll_events(NULL);
 236                         mdelay(10);
 237
 238                 } else  if (cmd && rc) {
 239                         /* Unknown error while issuing reboot */
 240                         if (rc == OPAL_UNSUPPORTED)
 241                                 pr_err("Unsupported '%s' reboot.\n", cmd);
 242                         else
 243                                 pr_err("Unable to issue '%s' reboot. Err=%ld\n",
 244                                        cmd, rc);
 245                         pr_info("Forcing a cec-reboot\n");
 246                         cmd = NULL;
 247                         rc = OPAL_BUSY;
 248
 249                 } else if (rc != OPAL_SUCCESS) {
 250                         /* Unknown error while issuing cec-reboot */
 251                         pr_err("Unable to reboot. Err=%ld\n", rc);
 252                 }
 253
 254         } while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT);
 255
 256         for (;;)
 257                 opal_poll_events(NULL);
 258 }
 259
 260 static void __noreturn pnv_power_off(void)
 261 {
 262         long rc = OPAL_BUSY;
 263
 264         pnv_prepare_going_down();
 265
 266         while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
 267                 rc = opal_cec_power_down(0);
 268                 if (rc == OPAL_BUSY_EVENT)
 269                         opal_poll_events(NULL);
 270                 else
 271                         mdelay(10);
 272         }
 273         for (;;)
 274                 opal_poll_events(NULL);
 275 }
 276
 277 static void __noreturn pnv_halt(void)
 278 {
 279         pnv_power_off();
 280 }
 281
 282 static void pnv_progress(char *s, unsigned short hex)
 283 {
 284 }
 285
 286 static void pnv_shutdown(void)
 287 {
 288         /* Let the PCI code clear up IODA tables */
 289         pnv_pci_shutdown();
 290
 291         /*
 292          * Stop OPAL activity: Unregister all OPAL interrupts so they
 293          * don't fire up while we kexec and make sure all potentially
 294          * DMA'ing ops are complete (such as dump retrieval).
 295          */
 296         opal_shutdown();
 297 }
 298
 299 #ifdef CONFIG_KEXEC_CORE
 300 static void pnv_kexec_wait_secondaries_down(void)
 301 {
 302         int my_cpu, i, notified = -1;
 303
 304         my_cpu = get_cpu();
 305
 306         for_each_online_cpu(i) {
 307                 uint8_t status;
 308                 int64_t rc, timeout = 1000;
 309
 310                 if (i == my_cpu)
 311                         continue;
 312
 313                 for (;;) {
 314                         rc = opal_query_cpu_status(get_hard_smp_processor_id(i),
 315                                                    &status);
 316                         if (rc != OPAL_SUCCESS || status != OPAL_THREAD_STARTED)
 317                                 break;
 318                         barrier();
 319                         if (i != notified) {
 320                                 printk(KERN_INFO "kexec: waiting for cpu %d "
 321                                        "(physical %d) to enter OPAL\n",
 322                                        i, paca[i].hw_cpu_id);
 323                                 notified = i;
 324                         }
 325
 326                         /*
 327                          * On crash secondaries might be unreachable or hung,
 328                          * so timeout if we've waited too long
 329                          * */
 330                         mdelay(1);
 331                         if (timeout-- == 0) {
 332                                 printk(KERN_ERR "kexec: timed out waiting for "
 333                                        "cpu %d (physical %d) to enter OPAL\n",
 334                                        i, paca[i].hw_cpu_id);
 335                                 break;
 336                         }
 337                 }
 338         }
 339 }
 340
 341 static void pnv_kexec_cpu_down(int crash_shutdown, int secondary)
 342 {
 343         u64 reinit_flags;
 344
 345         if (xive_enabled())
 346                 xive_kexec_teardown_cpu(secondary);
 347         else
 348                 xics_kexec_teardown_cpu(secondary);
 349
 350         /* On OPAL, we return all CPUs to firmware */
 351         if (!firmware_has_feature(FW_FEATURE_OPAL))
 352                 return;
 353
 354         if (secondary) {
 355                 /* Return secondary CPUs to firmware on OPAL v3 */
 356                 mb();
 357                 get_paca()->kexec_state = KEXEC_STATE_REAL_MODE;
 358                 mb();
 359
 360                 /* Return the CPU to OPAL */
 361                 opal_return_cpu();
 362         } else {
 363                 /* Primary waits for the secondaries to have reached OPAL */
 364                 pnv_kexec_wait_secondaries_down();
 365
 366                 /* Switch XIVE back to emulation mode */
 367                 if (xive_enabled())
 368                         xive_shutdown();
 369
 370                 /*
 371                  * We might be running as little-endian - now that interrupts
 372                  * are disabled, reset the HILE bit to big-endian so we don't
 373                  * take interrupts in the wrong endian later
 374                  *
 375                  * We reinit to enable both radix and hash on P9 to ensure
 376                  * the mode used by the next kernel is always supported.
 377                  */
 378                 reinit_flags = OPAL_REINIT_CPUS_HILE_BE;
 379                 if (cpu_has_feature(CPU_FTR_ARCH_300))
 380                         reinit_flags |= OPAL_REINIT_CPUS_MMU_RADIX |
 381                                 OPAL_REINIT_CPUS_MMU_HASH;
 382                 opal_reinit_cpus(reinit_flags);
 383         }
 384 }
 385 #endif /* CONFIG_KEXEC_CORE */
 386
 387 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
 388 static unsigned long pnv_memory_block_size(void)
 389 {
 390         return 256UL * 1024 * 1024;
 391 }
 392 #endif
 393
 394 static void __init pnv_setup_machdep_opal(void)
 395 {
 396         ppc_md.get_boot_time = opal_get_boot_time;
 397         ppc_md.restart = pnv_restart;
 398         pm_power_off = pnv_power_off;
 399         ppc_md.halt = pnv_halt;
 400         /* ppc_md.system_reset_exception gets filled in by pnv_smp_init() */
 401         ppc_md.machine_check_exception = opal_machine_check;
 402         ppc_md.mce_check_early_recovery = opal_mce_check_early_recovery;
 403         ppc_md.hmi_exception_early = opal_hmi_exception_early;
 404         ppc_md.handle_hmi_exception = opal_handle_hmi_exception;
 405 }
 406
 407 static int __init pnv_probe(void)
 408 {
 409         if (!of_machine_is_compatible("ibm,powernv"))
 410                 return 0;
 411
 412         if (firmware_has_feature(FW_FEATURE_OPAL))
 413                 pnv_setup_machdep_opal();
 414
 415         pr_debug("PowerNV detected !\n");
 416
 417         pnv_init();
 418
 419         return 1;
 420 }
 421
 422 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
 423 void __init pnv_tm_init(void)
 424 {
 425         if (!firmware_has_feature(FW_FEATURE_OPAL) ||
 426             !pvr_version_is(PVR_POWER9) ||
 427             early_cpu_has_feature(CPU_FTR_TM))
 428                 return;
 429
 430         if (opal_reinit_cpus(OPAL_REINIT_CPUS_TM_SUSPEND_DISABLED) != OPAL_SUCCESS)
 431                 return;
 432
 433         pr_info("Enabling TM (Transactional Memory) with Suspend Disabled\n");
 434         cur_cpu_spec->cpu_features |= CPU_FTR_TM;
 435         /* Make sure "normal" HTM is off (it should be) */
 436         cur_cpu_spec->cpu_user_features2 &= ~PPC_FEATURE2_HTM;
 437         /* Turn on no suspend mode, and HTM no SC */
 438         cur_cpu_spec->cpu_user_features2 |= PPC_FEATURE2_HTM_NO_SUSPEND | \
 439                                             PPC_FEATURE2_HTM_NOSC;
 440         tm_suspend_disabled = true;
 441 }
 442 #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
 443
 444 /*
 445  * Returns the cpu frequency for 'cpu' in Hz. This is used by
 446  * /proc/cpuinfo
 447  */
 448 static unsigned long pnv_get_proc_freq(unsigned int cpu)
 449 {
 450         unsigned long ret_freq;
 451
 452         ret_freq = cpufreq_get(cpu) * 1000ul;
 453
 454         /*
 455          * If the backend cpufreq driver does not exist,
 456          * then fallback to old way of reporting the clockrate.
 457          */
 458         if (!ret_freq)
 459                 ret_freq = ppc_proc_freq;
 460         return ret_freq;
 461 }
 462
 463 define_machine(powernv) {
 464         .name                   = "PowerNV",
 465         .probe                  = pnv_probe,
 466         .setup_arch             = pnv_setup_arch,
 467         .init_IRQ               = pnv_init_IRQ,
 468         .show_cpuinfo           = pnv_show_cpuinfo,
 469         .get_proc_freq          = pnv_get_proc_freq,
 470         .progress               = pnv_progress,
 471         .machine_shutdown       = pnv_shutdown,
 472         .power_save             = NULL,
 473         .calibrate_decr         = generic_calibrate_decr,
 474 #ifdef CONFIG_KEXEC_CORE
 475         .kexec_cpu_down         = pnv_kexec_cpu_down,
 476 #endif
 477 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
 478         .memory_block_size      = pnv_memory_block_size,
 479 #endif
 480 };