arch/powerpc/platforms/powernv/setup.c

   1 /*
   2  * PowerNV setup code.
   3  *
   4  * Copyright 2011 IBM Corp.
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version
   9  * 2 of the License, or (at your option) any later version.
  10  */
  11
  12 #undef DEBUG
  13
  14 #include <linux/cpu.h>
  15 #include <linux/errno.h>
  16 #include <linux/sched.h>
  17 #include <linux/kernel.h>
  18 #include <linux/tty.h>
  19 #include <linux/reboot.h>
  20 #include <linux/init.h>
  21 #include <linux/console.h>
  22 #include <linux/delay.h>
  23 #include <linux/irq.h>
  24 #include <linux/seq_file.h>
  25 #include <linux/of.h>
  26 #include <linux/of_fdt.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/bug.h>
  29 #include <linux/pci.h>
  30 #include <linux/cpufreq.h>
  31
  32 #include <asm/machdep.h>
  33 #include <asm/firmware.h>
  34 #include <asm/xics.h>
  35 #include <asm/xive.h>
  36 #include <asm/opal.h>
  37 #include <asm/kexec.h>
  38 #include <asm/smp.h>
  39 #include <asm/tm.h>
  40 #include <asm/setup.h>
  41 #include <asm/security_features.h>
  42
  43 #include "powernv.h"
  44
  45
  46 static bool fw_feature_is(const char *state, const char *name,
  47                           struct device_node *fw_features)
  48 {
  49         struct device_node *np;
  50         bool rc = false;
  51
  52         np = of_get_child_by_name(fw_features, name);
  53         if (np) {
  54                 rc = of_property_read_bool(np, state);
  55                 of_node_put(np);
  56         }
  57
  58         return rc;
  59 }
  60
  61 static void init_fw_feat_flags(struct device_node *np)
  62 {
  63         if (fw_feature_is("enabled", "inst-spec-barrier-ori31,31,0", np))
  64                 security_ftr_set(SEC_FTR_SPEC_BAR_ORI31);
  65
  66         if (fw_feature_is("enabled", "fw-bcctrl-serialized", np))
  67                 security_ftr_set(SEC_FTR_BCCTRL_SERIALISED);
  68
  69         if (fw_feature_is("enabled", "inst-l1d-flush-ori30,30,0", np))
  70                 security_ftr_set(SEC_FTR_L1D_FLUSH_ORI30);
  71
  72         if (fw_feature_is("enabled", "inst-l1d-flush-trig2", np))
  73                 security_ftr_set(SEC_FTR_L1D_FLUSH_TRIG2);
  74
  75         if (fw_feature_is("enabled", "fw-l1d-thread-split", np))
  76                 security_ftr_set(SEC_FTR_L1D_THREAD_PRIV);
  77
  78         if (fw_feature_is("enabled", "fw-count-cache-disabled", np))
  79                 security_ftr_set(SEC_FTR_COUNT_CACHE_DISABLED);
  80
  81         /*
  82          * The features below are enabled by default, so we instead look to see
  83          * if firmware has *disabled* them, and clear them if so.
  84          */
  85         if (fw_feature_is("disabled", "speculation-policy-favor-security", np))
  86                 security_ftr_clear(SEC_FTR_FAVOUR_SECURITY);
  87
  88         if (fw_feature_is("disabled", "needs-l1d-flush-msr-pr-0-to-1", np))
  89                 security_ftr_clear(SEC_FTR_L1D_FLUSH_PR);
  90
  91         if (fw_feature_is("disabled", "needs-l1d-flush-msr-hv-1-to-0", np))
  92                 security_ftr_clear(SEC_FTR_L1D_FLUSH_HV);
  93
  94         if (fw_feature_is("disabled", "needs-spec-barrier-for-bound-checks", np))
  95                 security_ftr_clear(SEC_FTR_BNDS_CHK_SPEC_BAR);
  96 }
  97
  98 static void pnv_setup_rfi_flush(void)
  99 {
 100         struct device_node *np, *fw_features;
 101         enum l1d_flush_type type;
 102         bool enable;
 103
 104         /* Default to fallback in case fw-features are not available */
 105         type = L1D_FLUSH_FALLBACK;
 106
 107         np = of_find_node_by_name(NULL, "ibm,opal");
 108         fw_features = of_get_child_by_name(np, "fw-features");
 109         of_node_put(np);
 110
 111         if (fw_features) {
 112                 init_fw_feat_flags(fw_features);
 113                 of_node_put(fw_features);
 114
 115                 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_TRIG2))
 116                         type = L1D_FLUSH_MTTRIG;
 117
 118                 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_ORI30))
 119                         type = L1D_FLUSH_ORI;
 120         }
 121
 122         enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && \
 123                  (security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR)   || \
 124                   security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV));
 125
 126         setup_rfi_flush(type, enable);
 127 }
 128
 129 static void __init pnv_setup_arch(void)
 130 {
 131         set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT);
 132
 133         pnv_setup_rfi_flush();
 134
 135         /* Initialize SMP */
 136         pnv_smp_init();
 137
 138         /* Setup PCI */
 139         pnv_pci_init();
 140
 141         /* Setup RTC and NVRAM callbacks */
 142         if (firmware_has_feature(FW_FEATURE_OPAL))
 143                 opal_nvram_init();
 144
 145         /* Enable NAP mode */
 146         powersave_nap = 1;
 147
 148         /* XXX PMCS */
 149 }
 150
 151 static void __init pnv_init(void)
 152 {
 153         /*
 154          * Initialize the LPC bus now so that legacy serial
 155          * ports can be found on it
 156          */
 157         opal_lpc_init();
 158
 159 #ifdef CONFIG_HVC_OPAL
 160         if (firmware_has_feature(FW_FEATURE_OPAL))
 161                 hvc_opal_init_early();
 162         else
 163 #endif
 164                 add_preferred_console("hvc", 0, NULL);
 165 }
 166
 167 static void __init pnv_init_IRQ(void)
 168 {
 169         /* Try using a XIVE if available, otherwise use a XICS */
 170         if (!xive_native_init())
 171                 xics_init();
 172
 173         WARN_ON(!ppc_md.get_irq);
 174 }
 175
 176 static void pnv_show_cpuinfo(struct seq_file *m)
 177 {
 178         struct device_node *root;
 179         const char *model = "";
 180
 181         root = of_find_node_by_path("/");
 182         if (root)
 183                 model = of_get_property(root, "model", NULL);
 184         seq_printf(m, "machine\t\t: PowerNV %s\n", model);
 185         if (firmware_has_feature(FW_FEATURE_OPAL))
 186                 seq_printf(m, "firmware\t: OPAL\n");
 187         else
 188                 seq_printf(m, "firmware\t: BML\n");
 189         of_node_put(root);
 190         if (radix_enabled())
 191                 seq_printf(m, "MMU\t\t: Radix\n");
 192         else
 193                 seq_printf(m, "MMU\t\t: Hash\n");
 194 }
 195
 196 static void pnv_prepare_going_down(void)
 197 {
 198         /*
 199          * Disable all notifiers from OPAL, we can't
 200          * service interrupts anymore anyway
 201          */
 202         opal_event_shutdown();
 203
 204         /* Soft disable interrupts */
 205         local_irq_disable();
 206
 207         /*
 208          * Return secondary CPUs to firwmare if a flash update
 209          * is pending otherwise we will get all sort of error
 210          * messages about CPU being stuck etc.. This will also
 211          * have the side effect of hard disabling interrupts so
 212          * past this point, the kernel is effectively dead.
 213          */
 214         opal_flash_term_callback();
 215 }
 216
 217 static void  __noreturn pnv_restart(char *cmd)
 218 {
 219         long rc = OPAL_BUSY;
 220
 221         pnv_prepare_going_down();
 222
 223         while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
 224                 rc = opal_cec_reboot();
 225                 if (rc == OPAL_BUSY_EVENT)
 226                         opal_poll_events(NULL);
 227                 else
 228                         mdelay(10);
 229         }
 230         for (;;)
 231                 opal_poll_events(NULL);
 232 }
 233
 234 static void __noreturn pnv_power_off(void)
 235 {
 236         long rc = OPAL_BUSY;
 237
 238         pnv_prepare_going_down();
 239
 240         while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
 241                 rc = opal_cec_power_down(0);
 242                 if (rc == OPAL_BUSY_EVENT)
 243                         opal_poll_events(NULL);
 244                 else
 245                         mdelay(10);
 246         }
 247         for (;;)
 248                 opal_poll_events(NULL);
 249 }
 250
 251 static void __noreturn pnv_halt(void)
 252 {
 253         pnv_power_off();
 254 }
 255
 256 static void pnv_progress(char *s, unsigned short hex)
 257 {
 258 }
 259
 260 static void pnv_shutdown(void)
 261 {
 262         /* Let the PCI code clear up IODA tables */
 263         pnv_pci_shutdown();
 264
 265         /*
 266          * Stop OPAL activity: Unregister all OPAL interrupts so they
 267          * don't fire up while we kexec and make sure all potentially
 268          * DMA'ing ops are complete (such as dump retrieval).
 269          */
 270         opal_shutdown();
 271 }
 272
 273 #ifdef CONFIG_KEXEC_CORE
 274 static void pnv_kexec_wait_secondaries_down(void)
 275 {
 276         int my_cpu, i, notified = -1;
 277
 278         my_cpu = get_cpu();
 279
 280         for_each_online_cpu(i) {
 281                 uint8_t status;
 282                 int64_t rc, timeout = 1000;
 283
 284                 if (i == my_cpu)
 285                         continue;
 286
 287                 for (;;) {
 288                         rc = opal_query_cpu_status(get_hard_smp_processor_id(i),
 289                                                    &status);
 290                         if (rc != OPAL_SUCCESS || status != OPAL_THREAD_STARTED)
 291                                 break;
 292                         barrier();
 293                         if (i != notified) {
 294                                 printk(KERN_INFO "kexec: waiting for cpu %d "
 295                                        "(physical %d) to enter OPAL\n",
 296                                        i, paca[i].hw_cpu_id);
 297                                 notified = i;
 298                         }
 299
 300                         /*
 301                          * On crash secondaries might be unreachable or hung,
 302                          * so timeout if we've waited too long
 303                          * */
 304                         mdelay(1);
 305                         if (timeout-- == 0) {
 306                                 printk(KERN_ERR "kexec: timed out waiting for "
 307                                        "cpu %d (physical %d) to enter OPAL\n",
 308                                        i, paca[i].hw_cpu_id);
 309                                 break;
 310                         }
 311                 }
 312         }
 313 }
 314
 315 static void pnv_kexec_cpu_down(int crash_shutdown, int secondary)
 316 {
 317         u64 reinit_flags;
 318
 319         if (xive_enabled())
 320                 xive_kexec_teardown_cpu(secondary);
 321         else
 322                 xics_kexec_teardown_cpu(secondary);
 323
 324         /* On OPAL, we return all CPUs to firmware */
 325         if (!firmware_has_feature(FW_FEATURE_OPAL))
 326                 return;
 327
 328         if (secondary) {
 329                 /* Return secondary CPUs to firmware on OPAL v3 */
 330                 mb();
 331                 get_paca()->kexec_state = KEXEC_STATE_REAL_MODE;
 332                 mb();
 333
 334                 /* Return the CPU to OPAL */
 335                 opal_return_cpu();
 336         } else {
 337                 /* Primary waits for the secondaries to have reached OPAL */
 338                 pnv_kexec_wait_secondaries_down();
 339
 340                 /* Switch XIVE back to emulation mode */
 341                 if (xive_enabled())
 342                         xive_shutdown();
 343
 344                 /*
 345                  * We might be running as little-endian - now that interrupts
 346                  * are disabled, reset the HILE bit to big-endian so we don't
 347                  * take interrupts in the wrong endian later
 348                  *
 349                  * We reinit to enable both radix and hash on P9 to ensure
 350                  * the mode used by the next kernel is always supported.
 351                  */
 352                 reinit_flags = OPAL_REINIT_CPUS_HILE_BE;
 353                 if (cpu_has_feature(CPU_FTR_ARCH_300))
 354                         reinit_flags |= OPAL_REINIT_CPUS_MMU_RADIX |
 355                                 OPAL_REINIT_CPUS_MMU_HASH;
 356                 opal_reinit_cpus(reinit_flags);
 357         }
 358 }
 359 #endif /* CONFIG_KEXEC_CORE */
 360
 361 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
 362 static unsigned long pnv_memory_block_size(void)
 363 {
 364         /*
 365          * We map the kernel linear region with 1GB large pages on radix. For
 366          * memory hot unplug to work our memory block size must be at least
 367          * this size.
 368          */
 369         if (radix_enabled())
 370                 return 1UL * 1024 * 1024 * 1024;
 371         else
 372                 return 256UL * 1024 * 1024;
 373 }
 374 #endif
 375
 376 static void __init pnv_setup_machdep_opal(void)
 377 {
 378         ppc_md.get_boot_time = opal_get_boot_time;
 379         ppc_md.restart = pnv_restart;
 380         pm_power_off = pnv_power_off;
 381         ppc_md.halt = pnv_halt;
 382         /* ppc_md.system_reset_exception gets filled in by pnv_smp_init() */
 383         ppc_md.machine_check_exception = opal_machine_check;
 384         ppc_md.mce_check_early_recovery = opal_mce_check_early_recovery;
 385         ppc_md.hmi_exception_early = opal_hmi_exception_early;
 386         ppc_md.handle_hmi_exception = opal_handle_hmi_exception;
 387 }
 388
 389 static int __init pnv_probe(void)
 390 {
 391         if (!of_machine_is_compatible("ibm,powernv"))
 392                 return 0;
 393
 394         if (firmware_has_feature(FW_FEATURE_OPAL))
 395                 pnv_setup_machdep_opal();
 396
 397         pr_debug("PowerNV detected !\n");
 398
 399         pnv_init();
 400
 401         return 1;
 402 }
 403
 404 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
 405 void __init pnv_tm_init(void)
 406 {
 407         if (!firmware_has_feature(FW_FEATURE_OPAL) ||
 408             !pvr_version_is(PVR_POWER9) ||
 409             early_cpu_has_feature(CPU_FTR_TM))
 410                 return;
 411
 412         if (opal_reinit_cpus(OPAL_REINIT_CPUS_TM_SUSPEND_DISABLED) != OPAL_SUCCESS)
 413                 return;
 414
 415         pr_info("Enabling TM (Transactional Memory) with Suspend Disabled\n");
 416         cur_cpu_spec->cpu_features |= CPU_FTR_TM;
 417         /* Make sure "normal" HTM is off (it should be) */
 418         cur_cpu_spec->cpu_user_features2 &= ~PPC_FEATURE2_HTM;
 419         /* Turn on no suspend mode, and HTM no SC */
 420         cur_cpu_spec->cpu_user_features2 |= PPC_FEATURE2_HTM_NO_SUSPEND | \
 421                                             PPC_FEATURE2_HTM_NOSC;
 422         tm_suspend_disabled = true;
 423 }
 424 #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
 425
 426 /*
 427  * Returns the cpu frequency for 'cpu' in Hz. This is used by
 428  * /proc/cpuinfo
 429  */
 430 static unsigned long pnv_get_proc_freq(unsigned int cpu)
 431 {
 432         unsigned long ret_freq;
 433
 434         ret_freq = cpufreq_get(cpu) * 1000ul;
 435
 436         /*
 437          * If the backend cpufreq driver does not exist,
 438          * then fallback to old way of reporting the clockrate.
 439          */
 440         if (!ret_freq)
 441                 ret_freq = ppc_proc_freq;
 442         return ret_freq;
 443 }
 444
 445 define_machine(powernv) {
 446         .name                   = "PowerNV",
 447         .probe                  = pnv_probe,
 448         .setup_arch             = pnv_setup_arch,
 449         .init_IRQ               = pnv_init_IRQ,
 450         .show_cpuinfo           = pnv_show_cpuinfo,
 451         .get_proc_freq          = pnv_get_proc_freq,
 452         .progress               = pnv_progress,
 453         .machine_shutdown       = pnv_shutdown,
 454         .power_save             = NULL,
 455         .calibrate_decr         = generic_calibrate_decr,
 456 #ifdef CONFIG_KEXEC_CORE
 457         .kexec_cpu_down         = pnv_kexec_cpu_down,
 458 #endif
 459 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
 460         .memory_block_size      = pnv_memory_block_size,
 461 #endif
 462 };