arch/powerpc/platforms/powernv/setup.c

   1 /*
   2  * PowerNV setup code.
   3  *
   4  * Copyright 2011 IBM Corp.
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version
   9  * 2 of the License, or (at your option) any later version.
  10  */
  11
  12 #undef DEBUG
  13
  14 #include <linux/cpu.h>
  15 #include <linux/errno.h>
  16 #include <linux/sched.h>
  17 #include <linux/kernel.h>
  18 #include <linux/tty.h>
  19 #include <linux/reboot.h>
  20 #include <linux/init.h>
  21 #include <linux/console.h>
  22 #include <linux/delay.h>
  23 #include <linux/irq.h>
  24 #include <linux/seq_file.h>
  25 #include <linux/of.h>
  26 #include <linux/of_fdt.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/bug.h>
  29 #include <linux/pci.h>
  30 #include <linux/cpufreq.h>
  31
  32 #include <asm/machdep.h>
  33 #include <asm/firmware.h>
  34 #include <asm/xics.h>
  35 #include <asm/xive.h>
  36 #include <asm/opal.h>
  37 #include <asm/kexec.h>
  38 #include <asm/smp.h>
  39 #include <asm/tm.h>
  40 #include <asm/setup.h>
  41 #include <asm/security_features.h>
  42
  43 #include "powernv.h"
  44
  45
  46 static bool fw_feature_is(const char *state, const char *name,
  47                           struct device_node *fw_features)
  48 {
  49         struct device_node *np;
  50         bool rc = false;
  51
  52         np = of_get_child_by_name(fw_features, name);
  53         if (np) {
  54                 rc = of_property_read_bool(np, state);
  55                 of_node_put(np);
  56         }
  57
  58         return rc;
  59 }
  60
  61 static void init_fw_feat_flags(struct device_node *np)
  62 {
  63         if (fw_feature_is("enabled", "inst-spec-barrier-ori31,31,0", np))
  64                 security_ftr_set(SEC_FTR_SPEC_BAR_ORI31);
  65
  66         if (fw_feature_is("enabled", "fw-bcctrl-serialized", np))
  67                 security_ftr_set(SEC_FTR_BCCTRL_SERIALISED);
  68
  69         if (fw_feature_is("enabled", "inst-spec-barrier-ori31,31,0", np))
  70                 security_ftr_set(SEC_FTR_L1D_FLUSH_ORI30);
  71
  72         if (fw_feature_is("enabled", "inst-l1d-flush-trig2", np))
  73                 security_ftr_set(SEC_FTR_L1D_FLUSH_TRIG2);
  74
  75         if (fw_feature_is("enabled", "fw-l1d-thread-split", np))
  76                 security_ftr_set(SEC_FTR_L1D_THREAD_PRIV);
  77
  78         if (fw_feature_is("enabled", "fw-count-cache-disabled", np))
  79                 security_ftr_set(SEC_FTR_COUNT_CACHE_DISABLED);
  80
  81         /*
  82          * The features below are enabled by default, so we instead look to see
  83          * if firmware has *disabled* them, and clear them if so.
  84          */
  85         if (fw_feature_is("disabled", "speculation-policy-favor-security", np))
  86                 security_ftr_clear(SEC_FTR_FAVOUR_SECURITY);
  87
  88         if (fw_feature_is("disabled", "needs-l1d-flush-msr-pr-0-to-1", np))
  89                 security_ftr_clear(SEC_FTR_L1D_FLUSH_PR);
  90
  91         if (fw_feature_is("disabled", "needs-l1d-flush-msr-hv-1-to-0", np))
  92                 security_ftr_clear(SEC_FTR_L1D_FLUSH_HV);
  93
  94         if (fw_feature_is("disabled", "needs-spec-barrier-for-bound-checks", np))
  95                 security_ftr_clear(SEC_FTR_BNDS_CHK_SPEC_BAR);
  96 }
  97
  98 static void pnv_setup_rfi_flush(void)
  99 {
 100         struct device_node *np, *fw_features;
 101         enum l1d_flush_type type;
 102         int enable;
 103
 104         /* Default to fallback in case fw-features are not available */
 105         type = L1D_FLUSH_FALLBACK;
 106         enable = 1;
 107
 108         np = of_find_node_by_name(NULL, "ibm,opal");
 109         fw_features = of_get_child_by_name(np, "fw-features");
 110         of_node_put(np);
 111
 112         if (fw_features) {
 113                 init_fw_feat_flags(fw_features);
 114
 115                 np = of_get_child_by_name(fw_features, "inst-l1d-flush-trig2");
 116                 if (np && of_property_read_bool(np, "enabled"))
 117                         type = L1D_FLUSH_MTTRIG;
 118
 119                 of_node_put(np);
 120
 121                 np = of_get_child_by_name(fw_features, "inst-l1d-flush-ori30,30,0");
 122                 if (np && of_property_read_bool(np, "enabled"))
 123                         type = L1D_FLUSH_ORI;
 124
 125                 of_node_put(np);
 126
 127                 /* Enable unless firmware says NOT to */
 128                 enable = 2;
 129                 np = of_get_child_by_name(fw_features, "needs-l1d-flush-msr-hv-1-to-0");
 130                 if (np && of_property_read_bool(np, "disabled"))
 131                         enable--;
 132
 133                 of_node_put(np);
 134
 135                 np = of_get_child_by_name(fw_features, "needs-l1d-flush-msr-pr-0-to-1");
 136                 if (np && of_property_read_bool(np, "disabled"))
 137                         enable--;
 138
 139                 np = of_get_child_by_name(fw_features, "speculation-policy-favor-security");
 140                 if (np && of_property_read_bool(np, "disabled"))
 141                         enable = 0;
 142
 143                 of_node_put(np);
 144                 of_node_put(fw_features);
 145         }
 146
 147         setup_rfi_flush(type, enable > 0);
 148 }
 149
 150 static void __init pnv_setup_arch(void)
 151 {
 152         set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT);
 153
 154         pnv_setup_rfi_flush();
 155
 156         /* Initialize SMP */
 157         pnv_smp_init();
 158
 159         /* Setup PCI */
 160         pnv_pci_init();
 161
 162         /* Setup RTC and NVRAM callbacks */
 163         if (firmware_has_feature(FW_FEATURE_OPAL))
 164                 opal_nvram_init();
 165
 166         /* Enable NAP mode */
 167         powersave_nap = 1;
 168
 169         /* XXX PMCS */
 170 }
 171
 172 static void __init pnv_init(void)
 173 {
 174         /*
 175          * Initialize the LPC bus now so that legacy serial
 176          * ports can be found on it
 177          */
 178         opal_lpc_init();
 179
 180 #ifdef CONFIG_HVC_OPAL
 181         if (firmware_has_feature(FW_FEATURE_OPAL))
 182                 hvc_opal_init_early();
 183         else
 184 #endif
 185                 add_preferred_console("hvc", 0, NULL);
 186 }
 187
 188 static void __init pnv_init_IRQ(void)
 189 {
 190         /* Try using a XIVE if available, otherwise use a XICS */
 191         if (!xive_native_init())
 192                 xics_init();
 193
 194         WARN_ON(!ppc_md.get_irq);
 195 }
 196
 197 static void pnv_show_cpuinfo(struct seq_file *m)
 198 {
 199         struct device_node *root;
 200         const char *model = "";
 201
 202         root = of_find_node_by_path("/");
 203         if (root)
 204                 model = of_get_property(root, "model", NULL);
 205         seq_printf(m, "machine\t\t: PowerNV %s\n", model);
 206         if (firmware_has_feature(FW_FEATURE_OPAL))
 207                 seq_printf(m, "firmware\t: OPAL\n");
 208         else
 209                 seq_printf(m, "firmware\t: BML\n");
 210         of_node_put(root);
 211         if (radix_enabled())
 212                 seq_printf(m, "MMU\t\t: Radix\n");
 213         else
 214                 seq_printf(m, "MMU\t\t: Hash\n");
 215 }
 216
 217 static void pnv_prepare_going_down(void)
 218 {
 219         /*
 220          * Disable all notifiers from OPAL, we can't
 221          * service interrupts anymore anyway
 222          */
 223         opal_event_shutdown();
 224
 225         /* Soft disable interrupts */
 226         local_irq_disable();
 227
 228         /*
 229          * Return secondary CPUs to firwmare if a flash update
 230          * is pending otherwise we will get all sort of error
 231          * messages about CPU being stuck etc.. This will also
 232          * have the side effect of hard disabling interrupts so
 233          * past this point, the kernel is effectively dead.
 234          */
 235         opal_flash_term_callback();
 236 }
 237
 238 static void  __noreturn pnv_restart(char *cmd)
 239 {
 240         long rc = OPAL_BUSY;
 241
 242         pnv_prepare_going_down();
 243
 244         while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
 245                 rc = opal_cec_reboot();
 246                 if (rc == OPAL_BUSY_EVENT)
 247                         opal_poll_events(NULL);
 248                 else
 249                         mdelay(10);
 250         }
 251         for (;;)
 252                 opal_poll_events(NULL);
 253 }
 254
 255 static void __noreturn pnv_power_off(void)
 256 {
 257         long rc = OPAL_BUSY;
 258
 259         pnv_prepare_going_down();
 260
 261         while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
 262                 rc = opal_cec_power_down(0);
 263                 if (rc == OPAL_BUSY_EVENT)
 264                         opal_poll_events(NULL);
 265                 else
 266                         mdelay(10);
 267         }
 268         for (;;)
 269                 opal_poll_events(NULL);
 270 }
 271
 272 static void __noreturn pnv_halt(void)
 273 {
 274         pnv_power_off();
 275 }
 276
 277 static void pnv_progress(char *s, unsigned short hex)
 278 {
 279 }
 280
 281 static void pnv_shutdown(void)
 282 {
 283         /* Let the PCI code clear up IODA tables */
 284         pnv_pci_shutdown();
 285
 286         /*
 287          * Stop OPAL activity: Unregister all OPAL interrupts so they
 288          * don't fire up while we kexec and make sure all potentially
 289          * DMA'ing ops are complete (such as dump retrieval).
 290          */
 291         opal_shutdown();
 292 }
 293
 294 #ifdef CONFIG_KEXEC_CORE
 295 static void pnv_kexec_wait_secondaries_down(void)
 296 {
 297         int my_cpu, i, notified = -1;
 298
 299         my_cpu = get_cpu();
 300
 301         for_each_online_cpu(i) {
 302                 uint8_t status;
 303                 int64_t rc, timeout = 1000;
 304
 305                 if (i == my_cpu)
 306                         continue;
 307
 308                 for (;;) {
 309                         rc = opal_query_cpu_status(get_hard_smp_processor_id(i),
 310                                                    &status);
 311                         if (rc != OPAL_SUCCESS || status != OPAL_THREAD_STARTED)
 312                                 break;
 313                         barrier();
 314                         if (i != notified) {
 315                                 printk(KERN_INFO "kexec: waiting for cpu %d "
 316                                        "(physical %d) to enter OPAL\n",
 317                                        i, paca[i].hw_cpu_id);
 318                                 notified = i;
 319                         }
 320
 321                         /*
 322                          * On crash secondaries might be unreachable or hung,
 323                          * so timeout if we've waited too long
 324                          * */
 325                         mdelay(1);
 326                         if (timeout-- == 0) {
 327                                 printk(KERN_ERR "kexec: timed out waiting for "
 328                                        "cpu %d (physical %d) to enter OPAL\n",
 329                                        i, paca[i].hw_cpu_id);
 330                                 break;
 331                         }
 332                 }
 333         }
 334 }
 335
 336 static void pnv_kexec_cpu_down(int crash_shutdown, int secondary)
 337 {
 338         u64 reinit_flags;
 339
 340         if (xive_enabled())
 341                 xive_kexec_teardown_cpu(secondary);
 342         else
 343                 xics_kexec_teardown_cpu(secondary);
 344
 345         /* On OPAL, we return all CPUs to firmware */
 346         if (!firmware_has_feature(FW_FEATURE_OPAL))
 347                 return;
 348
 349         if (secondary) {
 350                 /* Return secondary CPUs to firmware on OPAL v3 */
 351                 mb();
 352                 get_paca()->kexec_state = KEXEC_STATE_REAL_MODE;
 353                 mb();
 354
 355                 /* Return the CPU to OPAL */
 356                 opal_return_cpu();
 357         } else {
 358                 /* Primary waits for the secondaries to have reached OPAL */
 359                 pnv_kexec_wait_secondaries_down();
 360
 361                 /* Switch XIVE back to emulation mode */
 362                 if (xive_enabled())
 363                         xive_shutdown();
 364
 365                 /*
 366                  * We might be running as little-endian - now that interrupts
 367                  * are disabled, reset the HILE bit to big-endian so we don't
 368                  * take interrupts in the wrong endian later
 369                  *
 370                  * We reinit to enable both radix and hash on P9 to ensure
 371                  * the mode used by the next kernel is always supported.
 372                  */
 373                 reinit_flags = OPAL_REINIT_CPUS_HILE_BE;
 374                 if (cpu_has_feature(CPU_FTR_ARCH_300))
 375                         reinit_flags |= OPAL_REINIT_CPUS_MMU_RADIX |
 376                                 OPAL_REINIT_CPUS_MMU_HASH;
 377                 opal_reinit_cpus(reinit_flags);
 378         }
 379 }
 380 #endif /* CONFIG_KEXEC_CORE */
 381
 382 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
 383 static unsigned long pnv_memory_block_size(void)
 384 {
 385         /*
 386          * We map the kernel linear region with 1GB large pages on radix. For
 387          * memory hot unplug to work our memory block size must be at least
 388          * this size.
 389          */
 390         if (radix_enabled())
 391                 return 1UL * 1024 * 1024 * 1024;
 392         else
 393                 return 256UL * 1024 * 1024;
 394 }
 395 #endif
 396
 397 static void __init pnv_setup_machdep_opal(void)
 398 {
 399         ppc_md.get_boot_time = opal_get_boot_time;
 400         ppc_md.restart = pnv_restart;
 401         pm_power_off = pnv_power_off;
 402         ppc_md.halt = pnv_halt;
 403         /* ppc_md.system_reset_exception gets filled in by pnv_smp_init() */
 404         ppc_md.machine_check_exception = opal_machine_check;
 405         ppc_md.mce_check_early_recovery = opal_mce_check_early_recovery;
 406         ppc_md.hmi_exception_early = opal_hmi_exception_early;
 407         ppc_md.handle_hmi_exception = opal_handle_hmi_exception;
 408 }
 409
 410 static int __init pnv_probe(void)
 411 {
 412         if (!of_machine_is_compatible("ibm,powernv"))
 413                 return 0;
 414
 415         if (firmware_has_feature(FW_FEATURE_OPAL))
 416                 pnv_setup_machdep_opal();
 417
 418         pr_debug("PowerNV detected !\n");
 419
 420         pnv_init();
 421
 422         return 1;
 423 }
 424
 425 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
 426 void __init pnv_tm_init(void)
 427 {
 428         if (!firmware_has_feature(FW_FEATURE_OPAL) ||
 429             !pvr_version_is(PVR_POWER9) ||
 430             early_cpu_has_feature(CPU_FTR_TM))
 431                 return;
 432
 433         if (opal_reinit_cpus(OPAL_REINIT_CPUS_TM_SUSPEND_DISABLED) != OPAL_SUCCESS)
 434                 return;
 435
 436         pr_info("Enabling TM (Transactional Memory) with Suspend Disabled\n");
 437         cur_cpu_spec->cpu_features |= CPU_FTR_TM;
 438         /* Make sure "normal" HTM is off (it should be) */
 439         cur_cpu_spec->cpu_user_features2 &= ~PPC_FEATURE2_HTM;
 440         /* Turn on no suspend mode, and HTM no SC */
 441         cur_cpu_spec->cpu_user_features2 |= PPC_FEATURE2_HTM_NO_SUSPEND | \
 442                                             PPC_FEATURE2_HTM_NOSC;
 443         tm_suspend_disabled = true;
 444 }
 445 #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
 446
 447 /*
 448  * Returns the cpu frequency for 'cpu' in Hz. This is used by
 449  * /proc/cpuinfo
 450  */
 451 static unsigned long pnv_get_proc_freq(unsigned int cpu)
 452 {
 453         unsigned long ret_freq;
 454
 455         ret_freq = cpufreq_get(cpu) * 1000ul;
 456
 457         /*
 458          * If the backend cpufreq driver does not exist,
 459          * then fallback to old way of reporting the clockrate.
 460          */
 461         if (!ret_freq)
 462                 ret_freq = ppc_proc_freq;
 463         return ret_freq;
 464 }
 465
 466 define_machine(powernv) {
 467         .name                   = "PowerNV",
 468         .probe                  = pnv_probe,
 469         .setup_arch             = pnv_setup_arch,
 470         .init_IRQ               = pnv_init_IRQ,
 471         .show_cpuinfo           = pnv_show_cpuinfo,
 472         .get_proc_freq          = pnv_get_proc_freq,
 473         .progress               = pnv_progress,
 474         .machine_shutdown       = pnv_shutdown,
 475         .power_save             = NULL,
 476         .calibrate_decr         = generic_calibrate_decr,
 477 #ifdef CONFIG_KEXEC_CORE
 478         .kexec_cpu_down         = pnv_kexec_cpu_down,
 479 #endif
 480 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
 481         .memory_block_size      = pnv_memory_block_size,
 482 #endif
 483 };