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1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * SMP support for PowerNV machines.
4 *
5 * Copyright 2011 IBM Corp.
6 */
7
8 #include <linux/kernel.h>
9 #include <linux/module.h>
10 #include <linux/sched.h>
11 #include <linux/sched/hotplug.h>
12 #include <linux/smp.h>
13 #include <linux/interrupt.h>
14 #include <linux/delay.h>
15 #include <linux/init.h>
16 #include <linux/spinlock.h>
17 #include <linux/cpu.h>
18
19 #include <asm/irq.h>
20 #include <asm/smp.h>
21 #include <asm/paca.h>
22 #include <asm/machdep.h>
23 #include <asm/cputable.h>
24 #include <asm/firmware.h>
25 #include <asm/vdso_datapage.h>
26 #include <asm/cputhreads.h>
27 #include <asm/xics.h>
28 #include <asm/xive.h>
29 #include <asm/opal.h>
30 #include <asm/runlatch.h>
31 #include <asm/code-patching.h>
32 #include <asm/dbell.h>
33 #include <asm/kvm_ppc.h>
34 #include <asm/ppc-opcode.h>
35 #include <asm/cpuidle.h>
36 #include <asm/kexec.h>
37 #include <asm/reg.h>
38 #include <asm/powernv.h>
39
40 #include "powernv.h"
41
42 #ifdef DEBUG
43 #include <asm/udbg.h>
44 #define DBG(fmt...) udbg_printf(fmt)
45 #else
46 #define DBG(fmt...)
47 #endif
48
49 static void pnv_smp_setup_cpu(int cpu)
50 {
51 /*
52 * P9 workaround for CI vector load (see traps.c),
53 * enable the corresponding HMI interrupt
54 */
55 if (pvr_version_is(PVR_POWER9))
56 mtspr(SPRN_HMEER, mfspr(SPRN_HMEER) | PPC_BIT(17));
57
58 if (xive_enabled())
59 xive_smp_setup_cpu();
60 else if (cpu != boot_cpuid)
61 xics_setup_cpu();
62 }
63
64 static int pnv_smp_kick_cpu(int nr)
65 {
66 unsigned int pcpu;
67 unsigned long start_here =
68 __pa(ppc_function_entry(generic_secondary_smp_init));
69 long rc;
70 uint8_t status;
71
72 if (nr < 0 || nr >= nr_cpu_ids)
73 return -EINVAL;
74
75 pcpu = get_hard_smp_processor_id(nr);
76 /*
77 * If we already started or OPAL is not supported, we just
78 * kick the CPU via the PACA
79 */
80 if (paca_ptrs[nr]->cpu_start || !firmware_has_feature(FW_FEATURE_OPAL))
81 goto kick;
82
83 /*
84 * At this point, the CPU can either be spinning on the way in
85 * from kexec or be inside OPAL waiting to be started for the
86 * first time. OPAL v3 allows us to query OPAL to know if it
87 * has the CPUs, so we do that
88 */
89 rc = opal_query_cpu_status(pcpu, &status);
90 if (rc != OPAL_SUCCESS) {
91 pr_warn("OPAL Error %ld querying CPU %d state\n", rc, nr);
92 return -ENODEV;
93 }
94
95 /*
96 * Already started, just kick it, probably coming from
97 * kexec and spinning
98 */
99 if (status == OPAL_THREAD_STARTED)
100 goto kick;
101
102 /*
103 * Available/inactive, let's kick it
104 */
105 if (status == OPAL_THREAD_INACTIVE) {
106 pr_devel("OPAL: Starting CPU %d (HW 0x%x)...\n", nr, pcpu);
107 rc = opal_start_cpu(pcpu, start_here);
108 if (rc != OPAL_SUCCESS) {
109 pr_warn("OPAL Error %ld starting CPU %d\n", rc, nr);
110 return -ENODEV;
111 }
112 } else {
113 /*
114 * An unavailable CPU (or any other unknown status)
115 * shouldn't be started. It should also
116 * not be in the possible map but currently it can
117 * happen
118 */
119 pr_devel("OPAL: CPU %d (HW 0x%x) is unavailable"
120 " (status %d)...\n", nr, pcpu, status);
121 return -ENODEV;
122 }
123
124 kick:
125 return smp_generic_kick_cpu(nr);
126 }
127
128 #ifdef CONFIG_HOTPLUG_CPU
129
130 static int pnv_smp_cpu_disable(void)
131 {
132 int cpu = smp_processor_id();
133
134 /* This is identical to pSeries... might consolidate by
135 * moving migrate_irqs_away to a ppc_md with default to
136 * the generic fixup_irqs. --BenH.
137 */
138 set_cpu_online(cpu, false);
139 vdso_data->processorCount--;
140 if (cpu == boot_cpuid)
141 boot_cpuid = cpumask_any(cpu_online_mask);
142 if (xive_enabled())
143 xive_smp_disable_cpu();
144 else
145 xics_migrate_irqs_away();
146 return 0;
147 }
148
149 static void pnv_smp_cpu_kill_self(void)
150 {
151 unsigned int cpu;
152 unsigned long srr1, wmask;
153 u64 lpcr_val;
154
155 /* Standard hot unplug procedure */
156 /*
157 * This hard disables local interurpts, ensuring we have no lazy
158 * irqs pending.
159 */
160 WARN_ON(irqs_disabled());
161 hard_irq_disable();
162 WARN_ON(lazy_irq_pending());
163
164 idle_task_exit();
165 current->active_mm = NULL; /* for sanity */
166 cpu = smp_processor_id();
167 DBG("CPU%d offline\n", cpu);
168 generic_set_cpu_dead(cpu);
169 smp_wmb();
170
171 wmask = SRR1_WAKEMASK;
172 if (cpu_has_feature(CPU_FTR_ARCH_207S))
173 wmask = SRR1_WAKEMASK_P8;
174
175 /*
176 * We don't want to take decrementer interrupts while we are
177 * offline, so clear LPCR:PECE1. We keep PECE2 (and
178 * LPCR_PECE_HVEE on P9) enabled so as to let IPIs in.
179 *
180 * If the CPU gets woken up by a special wakeup, ensure that
181 * the SLW engine sets LPCR with decrementer bit cleared, else
182 * the CPU will come back to the kernel due to a spurious
183 * wakeup.
184 */
185 lpcr_val = mfspr(SPRN_LPCR) & ~(u64)LPCR_PECE1;
186 pnv_program_cpu_hotplug_lpcr(cpu, lpcr_val);
187
188 while (!generic_check_cpu_restart(cpu)) {
189 /*
190 * Clear IPI flag, since we don't handle IPIs while
191 * offline, except for those when changing micro-threading
192 * mode, which are handled explicitly below, and those
193 * for coming online, which are handled via
194 * generic_check_cpu_restart() calls.
195 */
196 kvmppc_set_host_ipi(cpu, 0);
197
198 srr1 = pnv_cpu_offline(cpu);
199
200 WARN_ON(lazy_irq_pending());
201
202 /*
203 * If the SRR1 value indicates that we woke up due to
204 * an external interrupt, then clear the interrupt.
205 * We clear the interrupt before checking for the
206 * reason, so as to avoid a race where we wake up for
207 * some other reason, find nothing and clear the interrupt
208 * just as some other cpu is sending us an interrupt.
209 * If we returned from power7_nap as a result of
210 * having finished executing in a KVM guest, then srr1
211 * contains 0.
212 */
213 if (((srr1 & wmask) == SRR1_WAKEEE) ||
214 ((srr1 & wmask) == SRR1_WAKEHVI)) {
215 if (cpu_has_feature(CPU_FTR_ARCH_300)) {
216 if (xive_enabled())
217 xive_flush_interrupt();
218 else
219 icp_opal_flush_interrupt();
220 } else
221 icp_native_flush_interrupt();
222 } else if ((srr1 & wmask) == SRR1_WAKEHDBELL) {
223 unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER);
224 asm volatile(PPC_MSGCLR(%0) : : "r" (msg));
225 } else if ((srr1 & wmask) == SRR1_WAKERESET) {
226 irq_set_pending_from_srr1(srr1);
227 /* Does not return */
228 }
229
230 smp_mb();
231
232 /*
233 * For kdump kernels, we process the ipi and jump to
234 * crash_ipi_callback
235 */
236 if (kdump_in_progress()) {
237 /*
238 * If we got to this point, we've not used
239 * NMI's, otherwise we would have gone
240 * via the SRR1_WAKERESET path. We are
241 * using regular IPI's for waking up offline
242 * threads.
243 */
244 struct pt_regs regs;
245
246 ppc_save_regs(&regs);
247 crash_ipi_callback(&regs);
248 /* Does not return */
249 }
250
251 if (cpu_core_split_required())
252 continue;
253
254 if (srr1 && !generic_check_cpu_restart(cpu))
255 DBG("CPU%d Unexpected exit while offline srr1=%lx!\n",
256 cpu, srr1);
257
258 }
259
260 /*
261 * Re-enable decrementer interrupts in LPCR.
262 *
263 * Further, we want stop states to be woken up by decrementer
264 * for non-hotplug cases. So program the LPCR via stop api as
265 * well.
266 */
267 lpcr_val = mfspr(SPRN_LPCR) | (u64)LPCR_PECE1;
268 pnv_program_cpu_hotplug_lpcr(cpu, lpcr_val);
269
270 DBG("CPU%d coming online...\n", cpu);
271 }
272
273 #endif /* CONFIG_HOTPLUG_CPU */
274
275 static int pnv_cpu_bootable(unsigned int nr)
276 {
277 /*
278 * Starting with POWER8, the subcore logic relies on all threads of a
279 * core being booted so that they can participate in split mode
280 * switches. So on those machines we ignore the smt_enabled_at_boot
281 * setting (smt-enabled on the kernel command line).
282 */
283 if (cpu_has_feature(CPU_FTR_ARCH_207S))
284 return 1;
285
286 return smp_generic_cpu_bootable(nr);
287 }
288
289 static int pnv_smp_prepare_cpu(int cpu)
290 {
291 if (xive_enabled())
292 return xive_smp_prepare_cpu(cpu);
293 return 0;
294 }
295
296 /* Cause IPI as setup by the interrupt controller (xics or xive) */
297 static void (*ic_cause_ipi)(int cpu);
298
299 static void pnv_cause_ipi(int cpu)
300 {
301 if (doorbell_try_core_ipi(cpu))
302 return;
303
304 ic_cause_ipi(cpu);
305 }
306
307 static void __init pnv_smp_probe(void)
308 {
309 if (xive_enabled())
310 xive_smp_probe();
311 else
312 xics_smp_probe();
313
314 if (cpu_has_feature(CPU_FTR_DBELL)) {
315 ic_cause_ipi = smp_ops->cause_ipi;
316 WARN_ON(!ic_cause_ipi);
317
318 if (cpu_has_feature(CPU_FTR_ARCH_300))
319 smp_ops->cause_ipi = doorbell_global_ipi;
320 else
321 smp_ops->cause_ipi = pnv_cause_ipi;
322 }
323 }
324
325 static int pnv_system_reset_exception(struct pt_regs *regs)
326 {
327 if (smp_handle_nmi_ipi(regs))
328 return 1;
329 return 0;
330 }
331
332 static int pnv_cause_nmi_ipi(int cpu)
333 {
334 int64_t rc;
335
336 if (cpu >= 0) {
337 int h = get_hard_smp_processor_id(cpu);
338
339 if (opal_check_token(OPAL_QUIESCE))
340 opal_quiesce(QUIESCE_HOLD, h);
341
342 rc = opal_signal_system_reset(h);
343
344 if (opal_check_token(OPAL_QUIESCE))
345 opal_quiesce(QUIESCE_RESUME, h);
346
347 if (rc != OPAL_SUCCESS)
348 return 0;
349 return 1;
350
351 } else if (cpu == NMI_IPI_ALL_OTHERS) {
352 bool success = true;
353 int c;
354
355 if (opal_check_token(OPAL_QUIESCE))
356 opal_quiesce(QUIESCE_HOLD, -1);
357
358 /*
359 * We do not use broadcasts (yet), because it's not clear
360 * exactly what semantics Linux wants or the firmware should
361 * provide.
362 */
363 for_each_online_cpu(c) {
364 if (c == smp_processor_id())
365 continue;
366
367 rc = opal_signal_system_reset(
368 get_hard_smp_processor_id(c));
369 if (rc != OPAL_SUCCESS)
370 success = false;
371 }
372
373 if (opal_check_token(OPAL_QUIESCE))
374 opal_quiesce(QUIESCE_RESUME, -1);
375
376 if (success)
377 return 1;
378
379 /*
380 * Caller will fall back to doorbells, which may pick
381 * up the remainders.
382 */
383 }
384
385 return 0;
386 }
387
388 static struct smp_ops_t pnv_smp_ops = {
389 .message_pass = NULL, /* Use smp_muxed_ipi_message_pass */
390 .cause_ipi = NULL, /* Filled at runtime by pnv_smp_probe() */
391 .cause_nmi_ipi = NULL,
392 .probe = pnv_smp_probe,
393 .prepare_cpu = pnv_smp_prepare_cpu,
394 .kick_cpu = pnv_smp_kick_cpu,
395 .setup_cpu = pnv_smp_setup_cpu,
396 .cpu_bootable = pnv_cpu_bootable,
397 #ifdef CONFIG_HOTPLUG_CPU
398 .cpu_disable = pnv_smp_cpu_disable,
399 .cpu_die = generic_cpu_die,
400 #endif /* CONFIG_HOTPLUG_CPU */
401 };
402
403 /* This is called very early during platform setup_arch */
404 void __init pnv_smp_init(void)
405 {
406 if (opal_check_token(OPAL_SIGNAL_SYSTEM_RESET)) {
407 ppc_md.system_reset_exception = pnv_system_reset_exception;
408 pnv_smp_ops.cause_nmi_ipi = pnv_cause_nmi_ipi;
409 }
410 smp_ops = &pnv_smp_ops;
411
412 #ifdef CONFIG_HOTPLUG_CPU
413 ppc_md.cpu_die = pnv_smp_cpu_kill_self;
414 #ifdef CONFIG_KEXEC_CORE
415 crash_wake_offline = 1;
416 #endif
417 #endif
418 }