2 * Freescale MPC85xx/MPC86xx RapidIO support
4 * Copyright (C) 2007, 2008 Freescale Semiconductor, Inc.
5 * Zhang Wei <wei.zhang@freescale.com>
7 * Copyright 2005 MontaVista Software, Inc.
8 * Matt Porter <mporter@kernel.crashing.org>
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
16 #include <linux/init.h>
17 #include <linux/module.h>
18 #include <linux/types.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/interrupt.h>
21 #include <linux/device.h>
22 #include <linux/rio.h>
23 #include <linux/rio_drv.h>
24 #include <linux/of_platform.h>
25 #include <linux/delay.h>
26 #include <linux/slab.h>
30 /* RapidIO definition irq, which read from OF-tree */
31 #define IRQ_RIO_BELL(m) (((struct rio_priv *)(m->priv))->bellirq)
32 #define IRQ_RIO_TX(m) (((struct rio_priv *)(m->priv))->txirq)
33 #define IRQ_RIO_RX(m) (((struct rio_priv *)(m->priv))->rxirq)
35 #define RIO_ATMU_REGS_OFFSET 0x10c00
36 #define RIO_P_MSG_REGS_OFFSET 0x11000
37 #define RIO_S_MSG_REGS_OFFSET 0x13000
38 #define RIO_ESCSR 0x158
39 #define RIO_CCSR 0x15c
40 #define RIO_ISR_AACR 0x10120
41 #define RIO_ISR_AACR_AA 0x1 /* Accept All ID */
42 #define RIO_MAINT_WIN_SIZE 0x400000
43 #define RIO_DBELL_WIN_SIZE 0x1000
45 #define RIO_MSG_OMR_MUI 0x00000002
46 #define RIO_MSG_OSR_TE 0x00000080
47 #define RIO_MSG_OSR_QOI 0x00000020
48 #define RIO_MSG_OSR_QFI 0x00000010
49 #define RIO_MSG_OSR_MUB 0x00000004
50 #define RIO_MSG_OSR_EOMI 0x00000002
51 #define RIO_MSG_OSR_QEI 0x00000001
53 #define RIO_MSG_IMR_MI 0x00000002
54 #define RIO_MSG_ISR_TE 0x00000080
55 #define RIO_MSG_ISR_QFI 0x00000010
56 #define RIO_MSG_ISR_DIQI 0x00000001
58 #define RIO_MSG_DESC_SIZE 32
59 #define RIO_MSG_BUFFER_SIZE 4096
60 #define RIO_MIN_TX_RING_SIZE 2
61 #define RIO_MAX_TX_RING_SIZE 2048
62 #define RIO_MIN_RX_RING_SIZE 2
63 #define RIO_MAX_RX_RING_SIZE 2048
65 #define DOORBELL_DMR_DI 0x00000002
66 #define DOORBELL_DSR_TE 0x00000080
67 #define DOORBELL_DSR_QFI 0x00000010
68 #define DOORBELL_DSR_DIQI 0x00000001
69 #define DOORBELL_TID_OFFSET 0x02
70 #define DOORBELL_SID_OFFSET 0x04
71 #define DOORBELL_INFO_OFFSET 0x06
73 #define DOORBELL_MESSAGE_SIZE 0x08
74 #define DBELL_SID(x) (*(u16 *)(x + DOORBELL_SID_OFFSET))
75 #define DBELL_TID(x) (*(u16 *)(x + DOORBELL_TID_OFFSET))
76 #define DBELL_INF(x) (*(u16 *)(x + DOORBELL_INFO_OFFSET))
78 struct rio_atmu_regs
{
139 struct rio_dbell_ring
{
144 struct rio_msg_tx_ring
{
147 void *virt_buffer
[RIO_MAX_TX_RING_SIZE
];
148 dma_addr_t phys_buffer
[RIO_MAX_TX_RING_SIZE
];
154 struct rio_msg_rx_ring
{
157 void *virt_buffer
[RIO_MAX_RX_RING_SIZE
];
165 void __iomem
*regs_win
;
166 struct rio_atmu_regs __iomem
*atmu_regs
;
167 struct rio_atmu_regs __iomem
*maint_atmu_regs
;
168 struct rio_atmu_regs __iomem
*dbell_atmu_regs
;
169 void __iomem
*dbell_win
;
170 void __iomem
*maint_win
;
171 struct rio_msg_regs __iomem
*msg_regs
;
172 struct rio_dbell_ring dbell_ring
;
173 struct rio_msg_tx_ring msg_tx_ring
;
174 struct rio_msg_rx_ring msg_rx_ring
;
181 * fsl_rio_doorbell_send - Send a MPC85xx doorbell message
182 * @mport: RapidIO master port info
183 * @index: ID of RapidIO interface
184 * @destid: Destination ID of target device
185 * @data: 16-bit info field of RapidIO doorbell message
187 * Sends a MPC85xx doorbell message. Returns %0 on success or
188 * %-EINVAL on failure.
190 static int fsl_rio_doorbell_send(struct rio_mport
*mport
,
191 int index
, u16 destid
, u16 data
)
193 struct rio_priv
*priv
= mport
->priv
;
194 pr_debug("fsl_doorbell_send: index %d destid %4.4x data %4.4x\n",
195 index
, destid
, data
);
196 switch (mport
->phy_type
) {
197 case RIO_PHY_PARALLEL
:
198 out_be32(&priv
->dbell_atmu_regs
->rowtar
, destid
<< 22);
199 out_be16(priv
->dbell_win
, data
);
202 /* In the serial version silicons, such as MPC8548, MPC8641,
203 * below operations is must be.
205 out_be32(&priv
->msg_regs
->odmr
, 0x00000000);
206 out_be32(&priv
->msg_regs
->odretcr
, 0x00000004);
207 out_be32(&priv
->msg_regs
->oddpr
, destid
<< 16);
208 out_be32(&priv
->msg_regs
->oddatr
, data
);
209 out_be32(&priv
->msg_regs
->odmr
, 0x00000001);
217 * fsl_local_config_read - Generate a MPC85xx local config space read
218 * @mport: RapidIO master port info
219 * @index: ID of RapdiIO interface
220 * @offset: Offset into configuration space
221 * @len: Length (in bytes) of the maintenance transaction
222 * @data: Value to be read into
224 * Generates a MPC85xx local configuration space read. Returns %0 on
225 * success or %-EINVAL on failure.
227 static int fsl_local_config_read(struct rio_mport
*mport
,
228 int index
, u32 offset
, int len
, u32
*data
)
230 struct rio_priv
*priv
= mport
->priv
;
231 pr_debug("fsl_local_config_read: index %d offset %8.8x\n", index
,
233 *data
= in_be32(priv
->regs_win
+ offset
);
239 * fsl_local_config_write - Generate a MPC85xx local config space write
240 * @mport: RapidIO master port info
241 * @index: ID of RapdiIO interface
242 * @offset: Offset into configuration space
243 * @len: Length (in bytes) of the maintenance transaction
244 * @data: Value to be written
246 * Generates a MPC85xx local configuration space write. Returns %0 on
247 * success or %-EINVAL on failure.
249 static int fsl_local_config_write(struct rio_mport
*mport
,
250 int index
, u32 offset
, int len
, u32 data
)
252 struct rio_priv
*priv
= mport
->priv
;
254 ("fsl_local_config_write: index %d offset %8.8x data %8.8x\n",
255 index
, offset
, data
);
256 out_be32(priv
->regs_win
+ offset
, data
);
262 * fsl_rio_config_read - Generate a MPC85xx read maintenance transaction
263 * @mport: RapidIO master port info
264 * @index: ID of RapdiIO interface
265 * @destid: Destination ID of transaction
266 * @hopcount: Number of hops to target device
267 * @offset: Offset into configuration space
268 * @len: Length (in bytes) of the maintenance transaction
269 * @val: Location to be read into
271 * Generates a MPC85xx read maintenance transaction. Returns %0 on
272 * success or %-EINVAL on failure.
275 fsl_rio_config_read(struct rio_mport
*mport
, int index
, u16 destid
,
276 u8 hopcount
, u32 offset
, int len
, u32
*val
)
278 struct rio_priv
*priv
= mport
->priv
;
282 ("fsl_rio_config_read: index %d destid %d hopcount %d offset %8.8x len %d\n",
283 index
, destid
, hopcount
, offset
, len
);
284 out_be32(&priv
->maint_atmu_regs
->rowtar
,
285 (destid
<< 22) | (hopcount
<< 12) | ((offset
& ~0x3) >> 9));
287 data
= (u8
*) priv
->maint_win
+ offset
;
290 *val
= in_8((u8
*) data
);
293 *val
= in_be16((u16
*) data
);
296 *val
= in_be32((u32
*) data
);
304 * fsl_rio_config_write - Generate a MPC85xx write maintenance transaction
305 * @mport: RapidIO master port info
306 * @index: ID of RapdiIO interface
307 * @destid: Destination ID of transaction
308 * @hopcount: Number of hops to target device
309 * @offset: Offset into configuration space
310 * @len: Length (in bytes) of the maintenance transaction
311 * @val: Value to be written
313 * Generates an MPC85xx write maintenance transaction. Returns %0 on
314 * success or %-EINVAL on failure.
317 fsl_rio_config_write(struct rio_mport
*mport
, int index
, u16 destid
,
318 u8 hopcount
, u32 offset
, int len
, u32 val
)
320 struct rio_priv
*priv
= mport
->priv
;
323 ("fsl_rio_config_write: index %d destid %d hopcount %d offset %8.8x len %d val %8.8x\n",
324 index
, destid
, hopcount
, offset
, len
, val
);
325 out_be32(&priv
->maint_atmu_regs
->rowtar
,
326 (destid
<< 22) | (hopcount
<< 12) | ((offset
& ~0x3) >> 9));
328 data
= (u8
*) priv
->maint_win
+ offset
;
331 out_8((u8
*) data
, val
);
334 out_be16((u16
*) data
, val
);
337 out_be32((u32
*) data
, val
);
345 * rio_hw_add_outb_message - Add message to the MPC85xx outbound message queue
346 * @mport: Master port with outbound message queue
347 * @rdev: Target of outbound message
348 * @mbox: Outbound mailbox
349 * @buffer: Message to add to outbound queue
350 * @len: Length of message
352 * Adds the @buffer message to the MPC85xx outbound message queue. Returns
353 * %0 on success or %-EINVAL on failure.
356 rio_hw_add_outb_message(struct rio_mport
*mport
, struct rio_dev
*rdev
, int mbox
,
357 void *buffer
, size_t len
)
359 struct rio_priv
*priv
= mport
->priv
;
361 struct rio_tx_desc
*desc
= (struct rio_tx_desc
*)priv
->msg_tx_ring
.virt
362 + priv
->msg_tx_ring
.tx_slot
;
366 ("RIO: rio_hw_add_outb_message(): destid %4.4x mbox %d buffer %8.8x len %8.8x\n",
367 rdev
->destid
, mbox
, (int)buffer
, len
);
369 if ((len
< 8) || (len
> RIO_MAX_MSG_SIZE
)) {
374 /* Copy and clear rest of buffer */
375 memcpy(priv
->msg_tx_ring
.virt_buffer
[priv
->msg_tx_ring
.tx_slot
], buffer
,
377 if (len
< (RIO_MAX_MSG_SIZE
- 4))
378 memset(priv
->msg_tx_ring
.virt_buffer
[priv
->msg_tx_ring
.tx_slot
]
379 + len
, 0, RIO_MAX_MSG_SIZE
- len
);
381 switch (mport
->phy_type
) {
382 case RIO_PHY_PARALLEL
:
383 /* Set mbox field for message */
384 desc
->dport
= mbox
& 0x3;
386 /* Enable EOMI interrupt, set priority, and set destid */
387 desc
->dattr
= 0x28000000 | (rdev
->destid
<< 2);
390 /* Set mbox field for message, and set destid */
391 desc
->dport
= (rdev
->destid
<< 16) | (mbox
& 0x3);
393 /* Enable EOMI interrupt and priority */
394 desc
->dattr
= 0x28000000;
398 /* Set transfer size aligned to next power of 2 (in double words) */
399 desc
->dwcnt
= is_power_of_2(len
) ? len
: 1 << get_bitmask_order(len
);
401 /* Set snooping and source buffer address */
402 desc
->saddr
= 0x00000004
403 | priv
->msg_tx_ring
.phys_buffer
[priv
->msg_tx_ring
.tx_slot
];
405 /* Increment enqueue pointer */
406 omr
= in_be32(&priv
->msg_regs
->omr
);
407 out_be32(&priv
->msg_regs
->omr
, omr
| RIO_MSG_OMR_MUI
);
409 /* Go to next descriptor */
410 if (++priv
->msg_tx_ring
.tx_slot
== priv
->msg_tx_ring
.size
)
411 priv
->msg_tx_ring
.tx_slot
= 0;
417 EXPORT_SYMBOL_GPL(rio_hw_add_outb_message
);
420 * fsl_rio_tx_handler - MPC85xx outbound message interrupt handler
421 * @irq: Linux interrupt number
422 * @dev_instance: Pointer to interrupt-specific data
424 * Handles outbound message interrupts. Executes a register outbound
425 * mailbox event handler and acks the interrupt occurrence.
428 fsl_rio_tx_handler(int irq
, void *dev_instance
)
431 struct rio_mport
*port
= (struct rio_mport
*)dev_instance
;
432 struct rio_priv
*priv
= port
->priv
;
434 osr
= in_be32(&priv
->msg_regs
->osr
);
436 if (osr
& RIO_MSG_OSR_TE
) {
437 pr_info("RIO: outbound message transmission error\n");
438 out_be32(&priv
->msg_regs
->osr
, RIO_MSG_OSR_TE
);
442 if (osr
& RIO_MSG_OSR_QOI
) {
443 pr_info("RIO: outbound message queue overflow\n");
444 out_be32(&priv
->msg_regs
->osr
, RIO_MSG_OSR_QOI
);
448 if (osr
& RIO_MSG_OSR_EOMI
) {
449 u32 dqp
= in_be32(&priv
->msg_regs
->odqdpar
);
450 int slot
= (dqp
- priv
->msg_tx_ring
.phys
) >> 5;
451 port
->outb_msg
[0].mcback(port
, priv
->msg_tx_ring
.dev_id
, -1,
454 /* Ack the end-of-message interrupt */
455 out_be32(&priv
->msg_regs
->osr
, RIO_MSG_OSR_EOMI
);
463 * rio_open_outb_mbox - Initialize MPC85xx outbound mailbox
464 * @mport: Master port implementing the outbound message unit
465 * @dev_id: Device specific pointer to pass on event
466 * @mbox: Mailbox to open
467 * @entries: Number of entries in the outbound mailbox ring
469 * Initializes buffer ring, request the outbound message interrupt,
470 * and enables the outbound message unit. Returns %0 on success and
471 * %-EINVAL or %-ENOMEM on failure.
473 int rio_open_outb_mbox(struct rio_mport
*mport
, void *dev_id
, int mbox
, int entries
)
476 struct rio_priv
*priv
= mport
->priv
;
478 if ((entries
< RIO_MIN_TX_RING_SIZE
) ||
479 (entries
> RIO_MAX_TX_RING_SIZE
) || (!is_power_of_2(entries
))) {
484 /* Initialize shadow copy ring */
485 priv
->msg_tx_ring
.dev_id
= dev_id
;
486 priv
->msg_tx_ring
.size
= entries
;
488 for (i
= 0; i
< priv
->msg_tx_ring
.size
; i
++) {
489 priv
->msg_tx_ring
.virt_buffer
[i
] =
490 dma_alloc_coherent(priv
->dev
, RIO_MSG_BUFFER_SIZE
,
491 &priv
->msg_tx_ring
.phys_buffer
[i
], GFP_KERNEL
);
492 if (!priv
->msg_tx_ring
.virt_buffer
[i
]) {
494 for (j
= 0; j
< priv
->msg_tx_ring
.size
; j
++)
495 if (priv
->msg_tx_ring
.virt_buffer
[j
])
496 dma_free_coherent(priv
->dev
,
506 /* Initialize outbound message descriptor ring */
507 priv
->msg_tx_ring
.virt
= dma_alloc_coherent(priv
->dev
,
508 priv
->msg_tx_ring
.size
* RIO_MSG_DESC_SIZE
,
509 &priv
->msg_tx_ring
.phys
, GFP_KERNEL
);
510 if (!priv
->msg_tx_ring
.virt
) {
514 memset(priv
->msg_tx_ring
.virt
, 0,
515 priv
->msg_tx_ring
.size
* RIO_MSG_DESC_SIZE
);
516 priv
->msg_tx_ring
.tx_slot
= 0;
518 /* Point dequeue/enqueue pointers at first entry in ring */
519 out_be32(&priv
->msg_regs
->odqdpar
, priv
->msg_tx_ring
.phys
);
520 out_be32(&priv
->msg_regs
->odqepar
, priv
->msg_tx_ring
.phys
);
522 /* Configure for snooping */
523 out_be32(&priv
->msg_regs
->osar
, 0x00000004);
525 /* Clear interrupt status */
526 out_be32(&priv
->msg_regs
->osr
, 0x000000b3);
528 /* Hook up outbound message handler */
529 rc
= request_irq(IRQ_RIO_TX(mport
), fsl_rio_tx_handler
, 0,
530 "msg_tx", (void *)mport
);
535 * Configure outbound message unit
537 * Interrupts (all enabled, except QEIE)
541 out_be32(&priv
->msg_regs
->omr
, 0x00100220);
543 /* Set number of entries */
544 out_be32(&priv
->msg_regs
->omr
,
545 in_be32(&priv
->msg_regs
->omr
) |
546 ((get_bitmask_order(entries
) - 2) << 12));
548 /* Now enable the unit */
549 out_be32(&priv
->msg_regs
->omr
, in_be32(&priv
->msg_regs
->omr
) | 0x1);
555 dma_free_coherent(priv
->dev
,
556 priv
->msg_tx_ring
.size
* RIO_MSG_DESC_SIZE
,
557 priv
->msg_tx_ring
.virt
, priv
->msg_tx_ring
.phys
);
560 for (i
= 0; i
< priv
->msg_tx_ring
.size
; i
++)
561 dma_free_coherent(priv
->dev
, RIO_MSG_BUFFER_SIZE
,
562 priv
->msg_tx_ring
.virt_buffer
[i
],
563 priv
->msg_tx_ring
.phys_buffer
[i
]);
569 * rio_close_outb_mbox - Shut down MPC85xx outbound mailbox
570 * @mport: Master port implementing the outbound message unit
571 * @mbox: Mailbox to close
573 * Disables the outbound message unit, free all buffers, and
574 * frees the outbound message interrupt.
576 void rio_close_outb_mbox(struct rio_mport
*mport
, int mbox
)
578 struct rio_priv
*priv
= mport
->priv
;
579 /* Disable inbound message unit */
580 out_be32(&priv
->msg_regs
->omr
, 0);
583 dma_free_coherent(priv
->dev
,
584 priv
->msg_tx_ring
.size
* RIO_MSG_DESC_SIZE
,
585 priv
->msg_tx_ring
.virt
, priv
->msg_tx_ring
.phys
);
588 free_irq(IRQ_RIO_TX(mport
), (void *)mport
);
592 * fsl_rio_rx_handler - MPC85xx inbound message interrupt handler
593 * @irq: Linux interrupt number
594 * @dev_instance: Pointer to interrupt-specific data
596 * Handles inbound message interrupts. Executes a registered inbound
597 * mailbox event handler and acks the interrupt occurrence.
600 fsl_rio_rx_handler(int irq
, void *dev_instance
)
603 struct rio_mport
*port
= (struct rio_mport
*)dev_instance
;
604 struct rio_priv
*priv
= port
->priv
;
606 isr
= in_be32(&priv
->msg_regs
->isr
);
608 if (isr
& RIO_MSG_ISR_TE
) {
609 pr_info("RIO: inbound message reception error\n");
610 out_be32((void *)&priv
->msg_regs
->isr
, RIO_MSG_ISR_TE
);
614 /* XXX Need to check/dispatch until queue empty */
615 if (isr
& RIO_MSG_ISR_DIQI
) {
617 * We implement *only* mailbox 0, but can receive messages
618 * for any mailbox/letter to that mailbox destination. So,
619 * make the callback with an unknown/invalid mailbox number
622 port
->inb_msg
[0].mcback(port
, priv
->msg_rx_ring
.dev_id
, -1, -1);
624 /* Ack the queueing interrupt */
625 out_be32(&priv
->msg_regs
->isr
, RIO_MSG_ISR_DIQI
);
633 * rio_open_inb_mbox - Initialize MPC85xx inbound mailbox
634 * @mport: Master port implementing the inbound message unit
635 * @dev_id: Device specific pointer to pass on event
636 * @mbox: Mailbox to open
637 * @entries: Number of entries in the inbound mailbox ring
639 * Initializes buffer ring, request the inbound message interrupt,
640 * and enables the inbound message unit. Returns %0 on success
641 * and %-EINVAL or %-ENOMEM on failure.
643 int rio_open_inb_mbox(struct rio_mport
*mport
, void *dev_id
, int mbox
, int entries
)
646 struct rio_priv
*priv
= mport
->priv
;
648 if ((entries
< RIO_MIN_RX_RING_SIZE
) ||
649 (entries
> RIO_MAX_RX_RING_SIZE
) || (!is_power_of_2(entries
))) {
654 /* Initialize client buffer ring */
655 priv
->msg_rx_ring
.dev_id
= dev_id
;
656 priv
->msg_rx_ring
.size
= entries
;
657 priv
->msg_rx_ring
.rx_slot
= 0;
658 for (i
= 0; i
< priv
->msg_rx_ring
.size
; i
++)
659 priv
->msg_rx_ring
.virt_buffer
[i
] = NULL
;
661 /* Initialize inbound message ring */
662 priv
->msg_rx_ring
.virt
= dma_alloc_coherent(priv
->dev
,
663 priv
->msg_rx_ring
.size
* RIO_MAX_MSG_SIZE
,
664 &priv
->msg_rx_ring
.phys
, GFP_KERNEL
);
665 if (!priv
->msg_rx_ring
.virt
) {
670 /* Point dequeue/enqueue pointers at first entry in ring */
671 out_be32(&priv
->msg_regs
->ifqdpar
, (u32
) priv
->msg_rx_ring
.phys
);
672 out_be32(&priv
->msg_regs
->ifqepar
, (u32
) priv
->msg_rx_ring
.phys
);
674 /* Clear interrupt status */
675 out_be32(&priv
->msg_regs
->isr
, 0x00000091);
677 /* Hook up inbound message handler */
678 rc
= request_irq(IRQ_RIO_RX(mport
), fsl_rio_rx_handler
, 0,
679 "msg_rx", (void *)mport
);
681 dma_free_coherent(priv
->dev
, RIO_MSG_BUFFER_SIZE
,
682 priv
->msg_tx_ring
.virt_buffer
[i
],
683 priv
->msg_tx_ring
.phys_buffer
[i
]);
688 * Configure inbound message unit:
690 * 4KB max message size
691 * Unmask all interrupt sources
694 out_be32(&priv
->msg_regs
->imr
, 0x001b0060);
696 /* Set number of queue entries */
697 setbits32(&priv
->msg_regs
->imr
, (get_bitmask_order(entries
) - 2) << 12);
699 /* Now enable the unit */
700 setbits32(&priv
->msg_regs
->imr
, 0x1);
707 * rio_close_inb_mbox - Shut down MPC85xx inbound mailbox
708 * @mport: Master port implementing the inbound message unit
709 * @mbox: Mailbox to close
711 * Disables the inbound message unit, free all buffers, and
712 * frees the inbound message interrupt.
714 void rio_close_inb_mbox(struct rio_mport
*mport
, int mbox
)
716 struct rio_priv
*priv
= mport
->priv
;
717 /* Disable inbound message unit */
718 out_be32(&priv
->msg_regs
->imr
, 0);
721 dma_free_coherent(priv
->dev
, priv
->msg_rx_ring
.size
* RIO_MAX_MSG_SIZE
,
722 priv
->msg_rx_ring
.virt
, priv
->msg_rx_ring
.phys
);
725 free_irq(IRQ_RIO_RX(mport
), (void *)mport
);
729 * rio_hw_add_inb_buffer - Add buffer to the MPC85xx inbound message queue
730 * @mport: Master port implementing the inbound message unit
731 * @mbox: Inbound mailbox number
732 * @buf: Buffer to add to inbound queue
734 * Adds the @buf buffer to the MPC85xx inbound message queue. Returns
735 * %0 on success or %-EINVAL on failure.
737 int rio_hw_add_inb_buffer(struct rio_mport
*mport
, int mbox
, void *buf
)
740 struct rio_priv
*priv
= mport
->priv
;
742 pr_debug("RIO: rio_hw_add_inb_buffer(), msg_rx_ring.rx_slot %d\n",
743 priv
->msg_rx_ring
.rx_slot
);
745 if (priv
->msg_rx_ring
.virt_buffer
[priv
->msg_rx_ring
.rx_slot
]) {
747 "RIO: error adding inbound buffer %d, buffer exists\n",
748 priv
->msg_rx_ring
.rx_slot
);
753 priv
->msg_rx_ring
.virt_buffer
[priv
->msg_rx_ring
.rx_slot
] = buf
;
754 if (++priv
->msg_rx_ring
.rx_slot
== priv
->msg_rx_ring
.size
)
755 priv
->msg_rx_ring
.rx_slot
= 0;
761 EXPORT_SYMBOL_GPL(rio_hw_add_inb_buffer
);
764 * rio_hw_get_inb_message - Fetch inbound message from the MPC85xx message unit
765 * @mport: Master port implementing the inbound message unit
766 * @mbox: Inbound mailbox number
768 * Gets the next available inbound message from the inbound message queue.
769 * A pointer to the message is returned on success or NULL on failure.
771 void *rio_hw_get_inb_message(struct rio_mport
*mport
, int mbox
)
773 struct rio_priv
*priv
= mport
->priv
;
774 u32 phys_buf
, virt_buf
;
778 phys_buf
= in_be32(&priv
->msg_regs
->ifqdpar
);
780 /* If no more messages, then bail out */
781 if (phys_buf
== in_be32(&priv
->msg_regs
->ifqepar
))
784 virt_buf
= (u32
) priv
->msg_rx_ring
.virt
+ (phys_buf
785 - priv
->msg_rx_ring
.phys
);
786 buf_idx
= (phys_buf
- priv
->msg_rx_ring
.phys
) / RIO_MAX_MSG_SIZE
;
787 buf
= priv
->msg_rx_ring
.virt_buffer
[buf_idx
];
791 "RIO: inbound message copy failed, no buffers\n");
795 /* Copy max message size, caller is expected to allocate that big */
796 memcpy(buf
, (void *)virt_buf
, RIO_MAX_MSG_SIZE
);
798 /* Clear the available buffer */
799 priv
->msg_rx_ring
.virt_buffer
[buf_idx
] = NULL
;
802 setbits32(&priv
->msg_regs
->imr
, RIO_MSG_IMR_MI
);
808 EXPORT_SYMBOL_GPL(rio_hw_get_inb_message
);
811 * fsl_rio_dbell_handler - MPC85xx doorbell interrupt handler
812 * @irq: Linux interrupt number
813 * @dev_instance: Pointer to interrupt-specific data
815 * Handles doorbell interrupts. Parses a list of registered
816 * doorbell event handlers and executes a matching event handler.
819 fsl_rio_dbell_handler(int irq
, void *dev_instance
)
822 struct rio_mport
*port
= (struct rio_mport
*)dev_instance
;
823 struct rio_priv
*priv
= port
->priv
;
825 dsr
= in_be32(&priv
->msg_regs
->dsr
);
827 if (dsr
& DOORBELL_DSR_TE
) {
828 pr_info("RIO: doorbell reception error\n");
829 out_be32(&priv
->msg_regs
->dsr
, DOORBELL_DSR_TE
);
833 if (dsr
& DOORBELL_DSR_QFI
) {
834 pr_info("RIO: doorbell queue full\n");
835 out_be32(&priv
->msg_regs
->dsr
, DOORBELL_DSR_QFI
);
839 /* XXX Need to check/dispatch until queue empty */
840 if (dsr
& DOORBELL_DSR_DIQI
) {
842 (u32
) priv
->dbell_ring
.virt
+
843 (in_be32(&priv
->msg_regs
->dqdpar
) & 0xfff);
844 struct rio_dbell
*dbell
;
848 ("RIO: processing doorbell, sid %2.2x tid %2.2x info %4.4x\n",
849 DBELL_SID(dmsg
), DBELL_TID(dmsg
), DBELL_INF(dmsg
));
851 list_for_each_entry(dbell
, &port
->dbells
, node
) {
852 if ((dbell
->res
->start
<= DBELL_INF(dmsg
)) &&
853 (dbell
->res
->end
>= DBELL_INF(dmsg
))) {
859 dbell
->dinb(port
, dbell
->dev_id
, DBELL_SID(dmsg
), DBELL_TID(dmsg
),
863 ("RIO: spurious doorbell, sid %2.2x tid %2.2x info %4.4x\n",
864 DBELL_SID(dmsg
), DBELL_TID(dmsg
), DBELL_INF(dmsg
));
866 setbits32(&priv
->msg_regs
->dmr
, DOORBELL_DMR_DI
);
867 out_be32(&priv
->msg_regs
->dsr
, DOORBELL_DSR_DIQI
);
875 * fsl_rio_doorbell_init - MPC85xx doorbell interface init
876 * @mport: Master port implementing the inbound doorbell unit
878 * Initializes doorbell unit hardware and inbound DMA buffer
879 * ring. Called from fsl_rio_setup(). Returns %0 on success
880 * or %-ENOMEM on failure.
882 static int fsl_rio_doorbell_init(struct rio_mport
*mport
)
884 struct rio_priv
*priv
= mport
->priv
;
887 /* Map outbound doorbell window immediately after maintenance window */
888 priv
->dbell_win
= ioremap(mport
->iores
.start
+ RIO_MAINT_WIN_SIZE
,
890 if (!priv
->dbell_win
) {
892 "RIO: unable to map outbound doorbell window\n");
897 /* Initialize inbound doorbells */
898 priv
->dbell_ring
.virt
= dma_alloc_coherent(priv
->dev
, 512 *
899 DOORBELL_MESSAGE_SIZE
, &priv
->dbell_ring
.phys
, GFP_KERNEL
);
900 if (!priv
->dbell_ring
.virt
) {
901 printk(KERN_ERR
"RIO: unable allocate inbound doorbell ring\n");
903 iounmap(priv
->dbell_win
);
907 /* Point dequeue/enqueue pointers at first entry in ring */
908 out_be32(&priv
->msg_regs
->dqdpar
, (u32
) priv
->dbell_ring
.phys
);
909 out_be32(&priv
->msg_regs
->dqepar
, (u32
) priv
->dbell_ring
.phys
);
911 /* Clear interrupt status */
912 out_be32(&priv
->msg_regs
->dsr
, 0x00000091);
914 /* Hook up doorbell handler */
915 rc
= request_irq(IRQ_RIO_BELL(mport
), fsl_rio_dbell_handler
, 0,
916 "dbell_rx", (void *)mport
);
918 iounmap(priv
->dbell_win
);
919 dma_free_coherent(priv
->dev
, 512 * DOORBELL_MESSAGE_SIZE
,
920 priv
->dbell_ring
.virt
, priv
->dbell_ring
.phys
);
922 "MPC85xx RIO: unable to request inbound doorbell irq");
926 /* Configure doorbells for snooping, 512 entries, and enable */
927 out_be32(&priv
->msg_regs
->dmr
, 0x00108161);
933 static char *cmdline
= NULL
;
935 static int fsl_rio_get_hdid(int index
)
937 /* XXX Need to parse multiple entries in some format */
941 return simple_strtol(cmdline
, NULL
, 0);
944 static int fsl_rio_get_cmdline(char *s
)
953 __setup("riohdid=", fsl_rio_get_cmdline
);
955 static inline void fsl_rio_info(struct device
*dev
, u32 ccsr
)
960 switch (ccsr
>> 30) {
971 dev_info(dev
, "Hardware port width: %s\n", str
);
973 switch ((ccsr
>> 27) & 7) {
975 str
= "Single-lane 0";
978 str
= "Single-lane 2";
987 dev_info(dev
, "Training connection status: %s\n", str
);
990 if (!(ccsr
& 0x80000000))
991 dev_info(dev
, "Output port operating in 8-bit mode\n");
992 if (!(ccsr
& 0x08000000))
993 dev_info(dev
, "Input port operating in 8-bit mode\n");
998 * fsl_rio_setup - Setup Freescale PowerPC RapidIO interface
999 * @dev: of_device pointer
1001 * Initializes MPC85xx RapidIO hardware interface, configures
1002 * master port with system-specific info, and registers the
1003 * master port with the RapidIO subsystem.
1005 int fsl_rio_setup(struct of_device
*dev
)
1007 struct rio_ops
*ops
;
1008 struct rio_mport
*port
;
1009 struct rio_priv
*priv
;
1011 const u32
*dt_range
, *cell
;
1012 struct resource regs
;
1015 u64 law_start
, law_size
;
1019 dev_err(&dev
->dev
, "Device OF-Node is NULL");
1023 rc
= of_address_to_resource(dev
->node
, 0, ®s
);
1025 dev_err(&dev
->dev
, "Can't get %s property 'reg'\n",
1026 dev
->node
->full_name
);
1029 dev_info(&dev
->dev
, "Of-device full name %s\n", dev
->node
->full_name
);
1030 dev_info(&dev
->dev
, "Regs: %pR\n", ®s
);
1032 dt_range
= of_get_property(dev
->node
, "ranges", &rlen
);
1034 dev_err(&dev
->dev
, "Can't get %s property 'ranges'\n",
1035 dev
->node
->full_name
);
1039 /* Get node address wide */
1040 cell
= of_get_property(dev
->node
, "#address-cells", NULL
);
1044 aw
= of_n_addr_cells(dev
->node
);
1045 /* Get node size wide */
1046 cell
= of_get_property(dev
->node
, "#size-cells", NULL
);
1050 sw
= of_n_size_cells(dev
->node
);
1051 /* Get parent address wide wide */
1052 paw
= of_n_addr_cells(dev
->node
);
1054 law_start
= of_read_number(dt_range
+ aw
, paw
);
1055 law_size
= of_read_number(dt_range
+ aw
+ paw
, sw
);
1057 dev_info(&dev
->dev
, "LAW start 0x%016llx, size 0x%016llx.\n",
1058 law_start
, law_size
);
1060 ops
= kmalloc(sizeof(struct rio_ops
), GFP_KERNEL
);
1065 ops
->lcread
= fsl_local_config_read
;
1066 ops
->lcwrite
= fsl_local_config_write
;
1067 ops
->cread
= fsl_rio_config_read
;
1068 ops
->cwrite
= fsl_rio_config_write
;
1069 ops
->dsend
= fsl_rio_doorbell_send
;
1071 port
= kzalloc(sizeof(struct rio_mport
), GFP_KERNEL
);
1079 priv
= kzalloc(sizeof(struct rio_priv
), GFP_KERNEL
);
1081 printk(KERN_ERR
"Can't alloc memory for 'priv'\n");
1086 INIT_LIST_HEAD(&port
->dbells
);
1087 port
->iores
.start
= law_start
;
1088 port
->iores
.end
= law_start
+ law_size
- 1;
1089 port
->iores
.flags
= IORESOURCE_MEM
;
1090 port
->iores
.name
= "rio_io_win";
1092 priv
->bellirq
= irq_of_parse_and_map(dev
->node
, 2);
1093 priv
->txirq
= irq_of_parse_and_map(dev
->node
, 3);
1094 priv
->rxirq
= irq_of_parse_and_map(dev
->node
, 4);
1095 dev_info(&dev
->dev
, "bellirq: %d, txirq: %d, rxirq %d\n", priv
->bellirq
,
1096 priv
->txirq
, priv
->rxirq
);
1098 rio_init_dbell_res(&port
->riores
[RIO_DOORBELL_RESOURCE
], 0, 0xffff);
1099 rio_init_mbox_res(&port
->riores
[RIO_INB_MBOX_RESOURCE
], 0, 0);
1100 rio_init_mbox_res(&port
->riores
[RIO_OUTB_MBOX_RESOURCE
], 0, 0);
1101 strcpy(port
->name
, "RIO0 mport");
1103 priv
->dev
= &dev
->dev
;
1106 port
->host_deviceid
= fsl_rio_get_hdid(port
->id
);
1109 rio_register_mport(port
);
1111 priv
->regs_win
= ioremap(regs
.start
, regs
.end
- regs
.start
+ 1);
1113 /* Probe the master port phy type */
1114 ccsr
= in_be32(priv
->regs_win
+ RIO_CCSR
);
1115 port
->phy_type
= (ccsr
& 1) ? RIO_PHY_SERIAL
: RIO_PHY_PARALLEL
;
1116 dev_info(&dev
->dev
, "RapidIO PHY type: %s\n",
1117 (port
->phy_type
== RIO_PHY_PARALLEL
) ? "parallel" :
1118 ((port
->phy_type
== RIO_PHY_SERIAL
) ? "serial" :
1120 /* Checking the port training status */
1121 if (in_be32((priv
->regs_win
+ RIO_ESCSR
)) & 1) {
1122 dev_err(&dev
->dev
, "Port is not ready. "
1123 "Try to restart connection...\n");
1124 switch (port
->phy_type
) {
1125 case RIO_PHY_SERIAL
:
1127 out_be32(priv
->regs_win
+ RIO_CCSR
, 0);
1129 setbits32(priv
->regs_win
+ RIO_CCSR
, 0x02000000);
1131 setbits32(priv
->regs_win
+ RIO_CCSR
, 0x00600000);
1133 case RIO_PHY_PARALLEL
:
1135 out_be32(priv
->regs_win
+ RIO_CCSR
, 0x22000000);
1137 out_be32(priv
->regs_win
+ RIO_CCSR
, 0x44000000);
1141 if (in_be32((priv
->regs_win
+ RIO_ESCSR
)) & 1) {
1142 dev_err(&dev
->dev
, "Port restart failed.\n");
1146 dev_info(&dev
->dev
, "Port restart success!\n");
1148 fsl_rio_info(&dev
->dev
, ccsr
);
1150 port
->sys_size
= (in_be32((priv
->regs_win
+ RIO_PEF_CAR
))
1151 & RIO_PEF_CTLS
) >> 4;
1152 dev_info(&dev
->dev
, "RapidIO Common Transport System size: %d\n",
1153 port
->sys_size
? 65536 : 256);
1155 priv
->atmu_regs
= (struct rio_atmu_regs
*)(priv
->regs_win
1156 + RIO_ATMU_REGS_OFFSET
);
1157 priv
->maint_atmu_regs
= priv
->atmu_regs
+ 1;
1158 priv
->dbell_atmu_regs
= priv
->atmu_regs
+ 2;
1159 priv
->msg_regs
= (struct rio_msg_regs
*)(priv
->regs_win
+
1160 ((port
->phy_type
== RIO_PHY_SERIAL
) ?
1161 RIO_S_MSG_REGS_OFFSET
: RIO_P_MSG_REGS_OFFSET
));
1163 /* Set to receive any dist ID for serial RapidIO controller. */
1164 if (port
->phy_type
== RIO_PHY_SERIAL
)
1165 out_be32((priv
->regs_win
+ RIO_ISR_AACR
), RIO_ISR_AACR_AA
);
1167 /* Configure maintenance transaction window */
1168 out_be32(&priv
->maint_atmu_regs
->rowbar
, law_start
>> 12);
1169 out_be32(&priv
->maint_atmu_regs
->rowar
, 0x80077015); /* 4M */
1171 priv
->maint_win
= ioremap(law_start
, RIO_MAINT_WIN_SIZE
);
1173 /* Configure outbound doorbell window */
1174 out_be32(&priv
->dbell_atmu_regs
->rowbar
,
1175 (law_start
+ RIO_MAINT_WIN_SIZE
) >> 12);
1176 out_be32(&priv
->dbell_atmu_regs
->rowar
, 0x8004200b); /* 4k */
1177 fsl_rio_doorbell_init(port
);
1181 iounmap(priv
->regs_win
);
1191 /* The probe function for RapidIO peer-to-peer network.
1193 static int __devinit
fsl_of_rio_rpn_probe(struct of_device
*dev
,
1194 const struct of_device_id
*match
)
1197 printk(KERN_INFO
"Setting up RapidIO peer-to-peer network %s\n",
1198 dev
->node
->full_name
);
1200 rc
= fsl_rio_setup(dev
);
1204 /* Enumerate all registered ports */
1205 rc
= rio_init_mports();
1210 static const struct of_device_id fsl_of_rio_rpn_ids
[] = {
1212 .compatible
= "fsl,rapidio-delta",
1217 static struct of_platform_driver fsl_of_rio_rpn_driver
= {
1218 .name
= "fsl-of-rio",
1219 .match_table
= fsl_of_rio_rpn_ids
,
1220 .probe
= fsl_of_rio_rpn_probe
,
1223 static __init
int fsl_of_rio_rpn_init(void)
1225 return of_register_platform_driver(&fsl_of_rio_rpn_driver
);
1228 subsys_initcall(fsl_of_rio_rpn_init
);