2 * Copyright 2011 IBM Corporation.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
11 #include <linux/types.h>
12 #include <linux/kernel.h>
13 #include <linux/irq.h>
14 #include <linux/smp.h>
15 #include <linux/interrupt.h>
16 #include <linux/init.h>
17 #include <linux/cpu.h>
19 #include <linux/spinlock.h>
25 #include <asm/errno.h>
47 static struct icp_ipl __iomem
*icp_native_regs
[NR_CPUS
];
49 static inline unsigned int icp_native_get_xirr(void)
51 int cpu
= smp_processor_id();
53 return in_be32(&icp_native_regs
[cpu
]->xirr
.word
);
56 static inline void icp_native_set_xirr(unsigned int value
)
58 int cpu
= smp_processor_id();
60 out_be32(&icp_native_regs
[cpu
]->xirr
.word
, value
);
63 static inline void icp_native_set_cppr(u8 value
)
65 int cpu
= smp_processor_id();
67 out_8(&icp_native_regs
[cpu
]->xirr
.bytes
[0], value
);
70 static inline void icp_native_set_qirr(int n_cpu
, u8 value
)
72 out_8(&icp_native_regs
[n_cpu
]->qirr
.bytes
[0], value
);
75 static void icp_native_set_cpu_priority(unsigned char cppr
)
77 xics_set_base_cppr(cppr
);
78 icp_native_set_cppr(cppr
);
82 static void icp_native_eoi(struct irq_data
*d
)
84 unsigned int hw_irq
= (unsigned int)irqd_to_hwirq(d
);
87 icp_native_set_xirr((xics_pop_cppr() << 24) | hw_irq
);
90 static void icp_native_teardown_cpu(void)
92 int cpu
= smp_processor_id();
94 /* Clear any pending IPI */
95 icp_native_set_qirr(cpu
, 0xff);
98 static void icp_native_flush_ipi(void)
100 /* We take the ipi irq but and never return so we
101 * need to EOI the IPI, but want to leave our priority 0
103 * should we check all the other interrupts too?
104 * should we be flagging idle loop instead?
105 * or creating some task to be scheduled?
108 icp_native_set_xirr((0x00 << 24) | XICS_IPI
);
111 static unsigned int icp_native_get_irq(void)
113 unsigned int xirr
= icp_native_get_xirr();
114 unsigned int vec
= xirr
& 0x00ffffff;
117 if (vec
== XICS_IRQ_SPURIOUS
)
120 irq
= irq_radix_revmap_lookup(xics_host
, vec
);
121 if (likely(irq
!= NO_IRQ
)) {
126 /* We don't have a linux mapping, so have rtas mask it. */
127 xics_mask_unknown_vec(vec
);
129 /* We might learn about it later, so EOI it */
130 icp_native_set_xirr(xirr
);
137 static void icp_native_cause_ipi(int cpu
, unsigned long data
)
139 icp_native_set_qirr(cpu
, IPI_PRIORITY
);
142 static irqreturn_t
icp_native_ipi_action(int irq
, void *dev_id
)
144 int cpu
= smp_processor_id();
146 icp_native_set_qirr(cpu
, 0xff);
148 return smp_ipi_demux();
151 #endif /* CONFIG_SMP */
153 static int __init
icp_native_map_one_cpu(int hw_id
, unsigned long addr
,
159 /* This may look gross but it's good enough for now, we don't quite
160 * have a hard -> linux processor id matching.
162 for_each_possible_cpu(i
) {
165 if (hw_id
== get_hard_smp_processor_id(i
)) {
171 /* Fail, skip that CPU. Don't print, it's normal, some XICS come up
172 * with way more entries in there than you have CPUs
177 rname
= kasprintf(GFP_KERNEL
, "CPU %d [0x%x] Interrupt Presentation",
180 if (!request_mem_region(addr
, size
, rname
)) {
181 pr_warning("icp_native: Could not reserve ICP MMIO"
182 " for CPU %d, interrupt server #0x%x\n",
187 icp_native_regs
[cpu
] = ioremap(addr
, size
);
188 if (!icp_native_regs
[cpu
]) {
189 pr_warning("icp_native: Failed ioremap for CPU %d, "
190 "interrupt server #0x%x, addr %#lx\n",
192 release_mem_region(addr
, size
);
198 static int __init
icp_native_init_one_node(struct device_node
*np
,
207 /* This code does the theorically broken assumption that the interrupt
208 * server numbers are the same as the hard CPU numbers.
209 * This happens to be the case so far but we are playing with fire...
210 * should be fixed one of these days. -BenH.
212 ireg
= of_get_property(np
, "ibm,interrupt-server-ranges", &ilen
);
214 /* Do that ever happen ? we'll know soon enough... but even good'old
215 * f80 does have that property ..
217 WARN_ON((ireg
== NULL
) || (ilen
!= 2*sizeof(u32
)));
220 *indx
= of_read_number(ireg
, 1);
221 if (ilen
>= 2*sizeof(u32
))
222 num_servers
= of_read_number(ireg
+ 1, 1);
225 ireg
= of_get_property(np
, "reg", &ilen
);
227 pr_err("icp_native: Can't find interrupt reg property");
231 reg_tuple_size
= (of_n_addr_cells(np
) + of_n_size_cells(np
)) * 4;
232 if (((ilen
% reg_tuple_size
) != 0)
233 || (num_servers
&& (num_servers
!= (ilen
/ reg_tuple_size
)))) {
234 pr_err("icp_native: ICP reg len (%d) != num servers (%d)",
235 ilen
/ reg_tuple_size
, num_servers
);
239 for (i
= 0; i
< (ilen
/ reg_tuple_size
); i
++) {
243 err
= of_address_to_resource(np
, i
, &r
);
245 pr_err("icp_native: Could not translate ICP MMIO"
246 " for interrupt server 0x%x (%d)\n", *indx
, err
);
250 if (icp_native_map_one_cpu(*indx
, r
.start
, resource_size(&r
)))
258 static const struct icp_ops icp_native_ops
= {
259 .get_irq
= icp_native_get_irq
,
260 .eoi
= icp_native_eoi
,
261 .set_priority
= icp_native_set_cpu_priority
,
262 .teardown_cpu
= icp_native_teardown_cpu
,
263 .flush_ipi
= icp_native_flush_ipi
,
265 .ipi_action
= icp_native_ipi_action
,
266 .cause_ipi
= icp_native_cause_ipi
,
270 int icp_native_init(void)
272 struct device_node
*np
;
276 for_each_compatible_node(np
, NULL
, "ibm,ppc-xicp")
277 if (icp_native_init_one_node(np
, &indx
) == 0)
280 for_each_node_by_type(np
,
281 "PowerPC-External-Interrupt-Presentation") {
282 if (icp_native_init_one_node(np
, &indx
) == 0)
290 icp_ops
= &icp_native_ops
;