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Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[mirror_ubuntu-bionic-kernel.git] / arch / powerpc / xmon / xmon.c
1 /*
2 * Routines providing a simple monitor for use on the PowerMac.
3 *
4 * Copyright (C) 1996-2005 Paul Mackerras.
5 * Copyright (C) 2001 PPC64 Team, IBM Corp
6 * Copyrignt (C) 2006 Michael Ellerman, IBM Corp
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version
11 * 2 of the License, or (at your option) any later version.
12 */
13
14 #include <linux/kernel.h>
15 #include <linux/errno.h>
16 #include <linux/sched/signal.h>
17 #include <linux/smp.h>
18 #include <linux/mm.h>
19 #include <linux/reboot.h>
20 #include <linux/delay.h>
21 #include <linux/kallsyms.h>
22 #include <linux/kmsg_dump.h>
23 #include <linux/cpumask.h>
24 #include <linux/export.h>
25 #include <linux/sysrq.h>
26 #include <linux/interrupt.h>
27 #include <linux/irq.h>
28 #include <linux/bug.h>
29 #include <linux/nmi.h>
30 #include <linux/ctype.h>
31 #include <linux/highmem.h>
32
33 #include <asm/debugfs.h>
34 #include <asm/ptrace.h>
35 #include <asm/smp.h>
36 #include <asm/string.h>
37 #include <asm/prom.h>
38 #include <asm/machdep.h>
39 #include <asm/xmon.h>
40 #include <asm/processor.h>
41 #include <asm/pgtable.h>
42 #include <asm/mmu.h>
43 #include <asm/mmu_context.h>
44 #include <asm/cputable.h>
45 #include <asm/rtas.h>
46 #include <asm/sstep.h>
47 #include <asm/irq_regs.h>
48 #include <asm/spu.h>
49 #include <asm/spu_priv1.h>
50 #include <asm/setjmp.h>
51 #include <asm/reg.h>
52 #include <asm/debug.h>
53 #include <asm/hw_breakpoint.h>
54 #include <asm/xive.h>
55 #include <asm/opal.h>
56 #include <asm/firmware.h>
57 #include <asm/code-patching.h>
58
59 #ifdef CONFIG_PPC64
60 #include <asm/hvcall.h>
61 #include <asm/paca.h>
62 #endif
63
64 #if defined(CONFIG_PPC_SPLPAR)
65 #include <asm/plpar_wrappers.h>
66 #else
67 static inline long plapr_set_ciabr(unsigned long ciabr) {return 0; };
68 #endif
69
70 #include "nonstdio.h"
71 #include "dis-asm.h"
72
73 #ifdef CONFIG_SMP
74 static cpumask_t cpus_in_xmon = CPU_MASK_NONE;
75 static unsigned long xmon_taken = 1;
76 static int xmon_owner;
77 static int xmon_gate;
78 #else
79 #define xmon_owner 0
80 #endif /* CONFIG_SMP */
81
82 static unsigned long in_xmon __read_mostly = 0;
83 static int xmon_on = IS_ENABLED(CONFIG_XMON_DEFAULT);
84
85 static unsigned long adrs;
86 static int size = 1;
87 #define MAX_DUMP (128 * 1024)
88 static unsigned long ndump = 64;
89 static unsigned long nidump = 16;
90 static unsigned long ncsum = 4096;
91 static int termch;
92 static char tmpstr[128];
93 static int tracing_enabled;
94
95 static long bus_error_jmp[JMP_BUF_LEN];
96 static int catch_memory_errors;
97 static int catch_spr_faults;
98 static long *xmon_fault_jmp[NR_CPUS];
99
100 /* Breakpoint stuff */
101 struct bpt {
102 unsigned long address;
103 unsigned int instr[2];
104 atomic_t ref_count;
105 int enabled;
106 unsigned long pad;
107 };
108
109 /* Bits in bpt.enabled */
110 #define BP_CIABR 1
111 #define BP_TRAP 2
112 #define BP_DABR 4
113
114 #define NBPTS 256
115 static struct bpt bpts[NBPTS];
116 static struct bpt dabr;
117 static struct bpt *iabr;
118 static unsigned bpinstr = 0x7fe00008; /* trap */
119
120 #define BP_NUM(bp) ((bp) - bpts + 1)
121
122 /* Prototypes */
123 static int cmds(struct pt_regs *);
124 static int mread(unsigned long, void *, int);
125 static int mwrite(unsigned long, void *, int);
126 static int handle_fault(struct pt_regs *);
127 static void byterev(unsigned char *, int);
128 static void memex(void);
129 static int bsesc(void);
130 static void dump(void);
131 static void show_pte(unsigned long);
132 static void prdump(unsigned long, long);
133 static int ppc_inst_dump(unsigned long, long, int);
134 static void dump_log_buf(void);
135
136 #ifdef CONFIG_PPC_POWERNV
137 static void dump_opal_msglog(void);
138 #else
139 static inline void dump_opal_msglog(void)
140 {
141 printf("Machine is not running OPAL firmware.\n");
142 }
143 #endif
144
145 static void backtrace(struct pt_regs *);
146 static void excprint(struct pt_regs *);
147 static void prregs(struct pt_regs *);
148 static void memops(int);
149 static void memlocate(void);
150 static void memzcan(void);
151 static void memdiffs(unsigned char *, unsigned char *, unsigned, unsigned);
152 int skipbl(void);
153 int scanhex(unsigned long *valp);
154 static void scannl(void);
155 static int hexdigit(int);
156 void getstring(char *, int);
157 static void flush_input(void);
158 static int inchar(void);
159 static void take_input(char *);
160 static int read_spr(int, unsigned long *);
161 static void write_spr(int, unsigned long);
162 static void super_regs(void);
163 static void remove_bpts(void);
164 static void insert_bpts(void);
165 static void remove_cpu_bpts(void);
166 static void insert_cpu_bpts(void);
167 static struct bpt *at_breakpoint(unsigned long pc);
168 static struct bpt *in_breakpoint_table(unsigned long pc, unsigned long *offp);
169 static int do_step(struct pt_regs *);
170 static void bpt_cmds(void);
171 static void cacheflush(void);
172 static int cpu_cmd(void);
173 static void csum(void);
174 static void bootcmds(void);
175 static void proccall(void);
176 static void show_tasks(void);
177 void dump_segments(void);
178 static void symbol_lookup(void);
179 static void xmon_show_stack(unsigned long sp, unsigned long lr,
180 unsigned long pc);
181 static void xmon_print_symbol(unsigned long address, const char *mid,
182 const char *after);
183 static const char *getvecname(unsigned long vec);
184
185 static int do_spu_cmd(void);
186
187 #ifdef CONFIG_44x
188 static void dump_tlb_44x(void);
189 #endif
190 #ifdef CONFIG_PPC_BOOK3E
191 static void dump_tlb_book3e(void);
192 #endif
193
194 #ifdef CONFIG_PPC64
195 #define REG "%.16lx"
196 #else
197 #define REG "%.8lx"
198 #endif
199
200 #ifdef __LITTLE_ENDIAN__
201 #define GETWORD(v) (((v)[3] << 24) + ((v)[2] << 16) + ((v)[1] << 8) + (v)[0])
202 #else
203 #define GETWORD(v) (((v)[0] << 24) + ((v)[1] << 16) + ((v)[2] << 8) + (v)[3])
204 #endif
205
206 static char *help_string = "\
207 Commands:\n\
208 b show breakpoints\n\
209 bd set data breakpoint\n\
210 bi set instruction breakpoint\n\
211 bc clear breakpoint\n"
212 #ifdef CONFIG_SMP
213 "\
214 c print cpus stopped in xmon\n\
215 c# try to switch to cpu number h (in hex)\n"
216 #endif
217 "\
218 C checksum\n\
219 d dump bytes\n\
220 d1 dump 1 byte values\n\
221 d2 dump 2 byte values\n\
222 d4 dump 4 byte values\n\
223 d8 dump 8 byte values\n\
224 di dump instructions\n\
225 df dump float values\n\
226 dd dump double values\n\
227 dl dump the kernel log buffer\n"
228 #ifdef CONFIG_PPC_POWERNV
229 "\
230 do dump the OPAL message log\n"
231 #endif
232 #ifdef CONFIG_PPC64
233 "\
234 dp[#] dump paca for current cpu, or cpu #\n\
235 dpa dump paca for all possible cpus\n"
236 #endif
237 "\
238 dr dump stream of raw bytes\n\
239 dv dump virtual address translation \n\
240 dt dump the tracing buffers (uses printk)\n\
241 dtc dump the tracing buffers for current CPU (uses printk)\n\
242 "
243 #ifdef CONFIG_PPC_POWERNV
244 " dx# dump xive on CPU #\n\
245 dxi# dump xive irq state #\n\
246 dxa dump xive on all CPUs\n"
247 #endif
248 " e print exception information\n\
249 f flush cache\n\
250 la lookup symbol+offset of specified address\n\
251 ls lookup address of specified symbol\n\
252 m examine/change memory\n\
253 mm move a block of memory\n\
254 ms set a block of memory\n\
255 md compare two blocks of memory\n\
256 ml locate a block of memory\n\
257 mz zero a block of memory\n\
258 mi show information about memory allocation\n\
259 p call a procedure\n\
260 P list processes/tasks\n\
261 r print registers\n\
262 s single step\n"
263 #ifdef CONFIG_SPU_BASE
264 " ss stop execution on all spus\n\
265 sr restore execution on stopped spus\n\
266 sf # dump spu fields for spu # (in hex)\n\
267 sd # dump spu local store for spu # (in hex)\n\
268 sdi # disassemble spu local store for spu # (in hex)\n"
269 #endif
270 " S print special registers\n\
271 Sa print all SPRs\n\
272 Sr # read SPR #\n\
273 Sw #v write v to SPR #\n\
274 t print backtrace\n\
275 x exit monitor and recover\n\
276 X exit monitor and don't recover\n"
277 #if defined(CONFIG_PPC64) && !defined(CONFIG_PPC_BOOK3E)
278 " u dump segment table or SLB\n"
279 #elif defined(CONFIG_PPC_STD_MMU_32)
280 " u dump segment registers\n"
281 #elif defined(CONFIG_44x) || defined(CONFIG_PPC_BOOK3E)
282 " u dump TLB\n"
283 #endif
284 " U show uptime information\n"
285 " ? help\n"
286 " # n limit output to n lines per page (for dp, dpa, dl)\n"
287 " zr reboot\n\
288 zh halt\n"
289 ;
290
291 static struct pt_regs *xmon_regs;
292
293 static inline void sync(void)
294 {
295 asm volatile("sync; isync");
296 }
297
298 static inline void store_inst(void *p)
299 {
300 asm volatile ("dcbst 0,%0; sync; icbi 0,%0; isync" : : "r" (p));
301 }
302
303 static inline void cflush(void *p)
304 {
305 asm volatile ("dcbf 0,%0; icbi 0,%0" : : "r" (p));
306 }
307
308 static inline void cinval(void *p)
309 {
310 asm volatile ("dcbi 0,%0; icbi 0,%0" : : "r" (p));
311 }
312
313 /**
314 * write_ciabr() - write the CIABR SPR
315 * @ciabr: The value to write.
316 *
317 * This function writes a value to the CIARB register either directly
318 * through mtspr instruction if the kernel is in HV privilege mode or
319 * call a hypervisor function to achieve the same in case the kernel
320 * is in supervisor privilege mode.
321 */
322 static void write_ciabr(unsigned long ciabr)
323 {
324 if (!cpu_has_feature(CPU_FTR_ARCH_207S))
325 return;
326
327 if (cpu_has_feature(CPU_FTR_HVMODE)) {
328 mtspr(SPRN_CIABR, ciabr);
329 return;
330 }
331 plapr_set_ciabr(ciabr);
332 }
333
334 /**
335 * set_ciabr() - set the CIABR
336 * @addr: The value to set.
337 *
338 * This function sets the correct privilege value into the the HW
339 * breakpoint address before writing it up in the CIABR register.
340 */
341 static void set_ciabr(unsigned long addr)
342 {
343 addr &= ~CIABR_PRIV;
344
345 if (cpu_has_feature(CPU_FTR_HVMODE))
346 addr |= CIABR_PRIV_HYPER;
347 else
348 addr |= CIABR_PRIV_SUPER;
349 write_ciabr(addr);
350 }
351
352 /*
353 * Disable surveillance (the service processor watchdog function)
354 * while we are in xmon.
355 * XXX we should re-enable it when we leave. :)
356 */
357 #define SURVEILLANCE_TOKEN 9000
358
359 static inline void disable_surveillance(void)
360 {
361 #ifdef CONFIG_PPC_PSERIES
362 /* Since this can't be a module, args should end up below 4GB. */
363 static struct rtas_args args;
364 int token;
365
366 /*
367 * At this point we have got all the cpus we can into
368 * xmon, so there is hopefully no other cpu calling RTAS
369 * at the moment, even though we don't take rtas.lock.
370 * If we did try to take rtas.lock there would be a
371 * real possibility of deadlock.
372 */
373 token = rtas_token("set-indicator");
374 if (token == RTAS_UNKNOWN_SERVICE)
375 return;
376
377 rtas_call_unlocked(&args, token, 3, 1, NULL, SURVEILLANCE_TOKEN, 0, 0);
378
379 #endif /* CONFIG_PPC_PSERIES */
380 }
381
382 #ifdef CONFIG_SMP
383 static int xmon_speaker;
384
385 static void get_output_lock(void)
386 {
387 int me = smp_processor_id() + 0x100;
388 int last_speaker = 0, prev;
389 long timeout;
390
391 if (xmon_speaker == me)
392 return;
393
394 for (;;) {
395 last_speaker = cmpxchg(&xmon_speaker, 0, me);
396 if (last_speaker == 0)
397 return;
398
399 /*
400 * Wait a full second for the lock, we might be on a slow
401 * console, but check every 100us.
402 */
403 timeout = 10000;
404 while (xmon_speaker == last_speaker) {
405 if (--timeout > 0) {
406 udelay(100);
407 continue;
408 }
409
410 /* hostile takeover */
411 prev = cmpxchg(&xmon_speaker, last_speaker, me);
412 if (prev == last_speaker)
413 return;
414 break;
415 }
416 }
417 }
418
419 static void release_output_lock(void)
420 {
421 xmon_speaker = 0;
422 }
423
424 int cpus_are_in_xmon(void)
425 {
426 return !cpumask_empty(&cpus_in_xmon);
427 }
428
429 static bool wait_for_other_cpus(int ncpus)
430 {
431 unsigned long timeout;
432
433 /* We wait for 2s, which is a metric "little while" */
434 for (timeout = 20000; timeout != 0; --timeout) {
435 if (cpumask_weight(&cpus_in_xmon) >= ncpus)
436 return true;
437 udelay(100);
438 barrier();
439 }
440
441 return false;
442 }
443 #endif /* CONFIG_SMP */
444
445 static inline int unrecoverable_excp(struct pt_regs *regs)
446 {
447 #if defined(CONFIG_4xx) || defined(CONFIG_PPC_BOOK3E)
448 /* We have no MSR_RI bit on 4xx or Book3e, so we simply return false */
449 return 0;
450 #else
451 return ((regs->msr & MSR_RI) == 0);
452 #endif
453 }
454
455 static int xmon_core(struct pt_regs *regs, int fromipi)
456 {
457 int cmd = 0;
458 struct bpt *bp;
459 long recurse_jmp[JMP_BUF_LEN];
460 unsigned long offset;
461 unsigned long flags;
462 #ifdef CONFIG_SMP
463 int cpu;
464 int secondary;
465 #endif
466
467 local_irq_save(flags);
468 hard_irq_disable();
469
470 tracing_enabled = tracing_is_on();
471 tracing_off();
472
473 bp = in_breakpoint_table(regs->nip, &offset);
474 if (bp != NULL) {
475 regs->nip = bp->address + offset;
476 atomic_dec(&bp->ref_count);
477 }
478
479 remove_cpu_bpts();
480
481 #ifdef CONFIG_SMP
482 cpu = smp_processor_id();
483 if (cpumask_test_cpu(cpu, &cpus_in_xmon)) {
484 /*
485 * We catch SPR read/write faults here because the 0x700, 0xf60
486 * etc. handlers don't call debugger_fault_handler().
487 */
488 if (catch_spr_faults)
489 longjmp(bus_error_jmp, 1);
490 get_output_lock();
491 excprint(regs);
492 printf("cpu 0x%x: Exception %lx %s in xmon, "
493 "returning to main loop\n",
494 cpu, regs->trap, getvecname(TRAP(regs)));
495 release_output_lock();
496 longjmp(xmon_fault_jmp[cpu], 1);
497 }
498
499 if (setjmp(recurse_jmp) != 0) {
500 if (!in_xmon || !xmon_gate) {
501 get_output_lock();
502 printf("xmon: WARNING: bad recursive fault "
503 "on cpu 0x%x\n", cpu);
504 release_output_lock();
505 goto waiting;
506 }
507 secondary = !(xmon_taken && cpu == xmon_owner);
508 goto cmdloop;
509 }
510
511 xmon_fault_jmp[cpu] = recurse_jmp;
512
513 bp = NULL;
514 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT))
515 bp = at_breakpoint(regs->nip);
516 if (bp || unrecoverable_excp(regs))
517 fromipi = 0;
518
519 if (!fromipi) {
520 get_output_lock();
521 excprint(regs);
522 if (bp) {
523 printf("cpu 0x%x stopped at breakpoint 0x%lx (",
524 cpu, BP_NUM(bp));
525 xmon_print_symbol(regs->nip, " ", ")\n");
526 }
527 if (unrecoverable_excp(regs))
528 printf("WARNING: exception is not recoverable, "
529 "can't continue\n");
530 release_output_lock();
531 }
532
533 cpumask_set_cpu(cpu, &cpus_in_xmon);
534
535 waiting:
536 secondary = 1;
537 spin_begin();
538 while (secondary && !xmon_gate) {
539 if (in_xmon == 0) {
540 if (fromipi) {
541 spin_end();
542 goto leave;
543 }
544 secondary = test_and_set_bit(0, &in_xmon);
545 }
546 spin_cpu_relax();
547 touch_nmi_watchdog();
548 }
549 spin_end();
550
551 if (!secondary && !xmon_gate) {
552 /* we are the first cpu to come in */
553 /* interrupt other cpu(s) */
554 int ncpus = num_online_cpus();
555
556 xmon_owner = cpu;
557 mb();
558 if (ncpus > 1) {
559 /*
560 * A system reset (trap == 0x100) can be triggered on
561 * all CPUs, so when we come in via 0x100 try waiting
562 * for the other CPUs to come in before we send the
563 * debugger break (IPI). This is similar to
564 * crash_kexec_secondary().
565 */
566 if (TRAP(regs) != 0x100 || !wait_for_other_cpus(ncpus))
567 smp_send_debugger_break();
568
569 wait_for_other_cpus(ncpus);
570 }
571 remove_bpts();
572 disable_surveillance();
573 /* for breakpoint or single step, print the current instr. */
574 if (bp || TRAP(regs) == 0xd00)
575 ppc_inst_dump(regs->nip, 1, 0);
576 printf("enter ? for help\n");
577 mb();
578 xmon_gate = 1;
579 barrier();
580 touch_nmi_watchdog();
581 }
582
583 cmdloop:
584 while (in_xmon) {
585 if (secondary) {
586 spin_begin();
587 if (cpu == xmon_owner) {
588 if (!test_and_set_bit(0, &xmon_taken)) {
589 secondary = 0;
590 spin_end();
591 continue;
592 }
593 /* missed it */
594 while (cpu == xmon_owner)
595 spin_cpu_relax();
596 }
597 spin_cpu_relax();
598 touch_nmi_watchdog();
599 } else {
600 cmd = cmds(regs);
601 if (cmd != 0) {
602 /* exiting xmon */
603 insert_bpts();
604 xmon_gate = 0;
605 wmb();
606 in_xmon = 0;
607 break;
608 }
609 /* have switched to some other cpu */
610 secondary = 1;
611 }
612 }
613 leave:
614 cpumask_clear_cpu(cpu, &cpus_in_xmon);
615 xmon_fault_jmp[cpu] = NULL;
616 #else
617 /* UP is simple... */
618 if (in_xmon) {
619 printf("Exception %lx %s in xmon, returning to main loop\n",
620 regs->trap, getvecname(TRAP(regs)));
621 longjmp(xmon_fault_jmp[0], 1);
622 }
623 if (setjmp(recurse_jmp) == 0) {
624 xmon_fault_jmp[0] = recurse_jmp;
625 in_xmon = 1;
626
627 excprint(regs);
628 bp = at_breakpoint(regs->nip);
629 if (bp) {
630 printf("Stopped at breakpoint %lx (", BP_NUM(bp));
631 xmon_print_symbol(regs->nip, " ", ")\n");
632 }
633 if (unrecoverable_excp(regs))
634 printf("WARNING: exception is not recoverable, "
635 "can't continue\n");
636 remove_bpts();
637 disable_surveillance();
638 /* for breakpoint or single step, print the current instr. */
639 if (bp || TRAP(regs) == 0xd00)
640 ppc_inst_dump(regs->nip, 1, 0);
641 printf("enter ? for help\n");
642 }
643
644 cmd = cmds(regs);
645
646 insert_bpts();
647 in_xmon = 0;
648 #endif
649
650 #ifdef CONFIG_BOOKE
651 if (regs->msr & MSR_DE) {
652 bp = at_breakpoint(regs->nip);
653 if (bp != NULL) {
654 regs->nip = (unsigned long) &bp->instr[0];
655 atomic_inc(&bp->ref_count);
656 }
657 }
658 #else
659 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) {
660 bp = at_breakpoint(regs->nip);
661 if (bp != NULL) {
662 int stepped = emulate_step(regs, bp->instr[0]);
663 if (stepped == 0) {
664 regs->nip = (unsigned long) &bp->instr[0];
665 atomic_inc(&bp->ref_count);
666 } else if (stepped < 0) {
667 printf("Couldn't single-step %s instruction\n",
668 (IS_RFID(bp->instr[0])? "rfid": "mtmsrd"));
669 }
670 }
671 }
672 #endif
673 insert_cpu_bpts();
674
675 touch_nmi_watchdog();
676 local_irq_restore(flags);
677
678 return cmd != 'X' && cmd != EOF;
679 }
680
681 int xmon(struct pt_regs *excp)
682 {
683 struct pt_regs regs;
684
685 if (excp == NULL) {
686 ppc_save_regs(&regs);
687 excp = &regs;
688 }
689
690 return xmon_core(excp, 0);
691 }
692 EXPORT_SYMBOL(xmon);
693
694 irqreturn_t xmon_irq(int irq, void *d)
695 {
696 unsigned long flags;
697 local_irq_save(flags);
698 printf("Keyboard interrupt\n");
699 xmon(get_irq_regs());
700 local_irq_restore(flags);
701 return IRQ_HANDLED;
702 }
703
704 static int xmon_bpt(struct pt_regs *regs)
705 {
706 struct bpt *bp;
707 unsigned long offset;
708
709 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))
710 return 0;
711
712 /* Are we at the trap at bp->instr[1] for some bp? */
713 bp = in_breakpoint_table(regs->nip, &offset);
714 if (bp != NULL && offset == 4) {
715 regs->nip = bp->address + 4;
716 atomic_dec(&bp->ref_count);
717 return 1;
718 }
719
720 /* Are we at a breakpoint? */
721 bp = at_breakpoint(regs->nip);
722 if (!bp)
723 return 0;
724
725 xmon_core(regs, 0);
726
727 return 1;
728 }
729
730 static int xmon_sstep(struct pt_regs *regs)
731 {
732 if (user_mode(regs))
733 return 0;
734 xmon_core(regs, 0);
735 return 1;
736 }
737
738 static int xmon_break_match(struct pt_regs *regs)
739 {
740 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))
741 return 0;
742 if (dabr.enabled == 0)
743 return 0;
744 xmon_core(regs, 0);
745 return 1;
746 }
747
748 static int xmon_iabr_match(struct pt_regs *regs)
749 {
750 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))
751 return 0;
752 if (iabr == NULL)
753 return 0;
754 xmon_core(regs, 0);
755 return 1;
756 }
757
758 static int xmon_ipi(struct pt_regs *regs)
759 {
760 #ifdef CONFIG_SMP
761 if (in_xmon && !cpumask_test_cpu(smp_processor_id(), &cpus_in_xmon))
762 xmon_core(regs, 1);
763 #endif
764 return 0;
765 }
766
767 static int xmon_fault_handler(struct pt_regs *regs)
768 {
769 struct bpt *bp;
770 unsigned long offset;
771
772 if (in_xmon && catch_memory_errors)
773 handle_fault(regs); /* doesn't return */
774
775 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) {
776 bp = in_breakpoint_table(regs->nip, &offset);
777 if (bp != NULL) {
778 regs->nip = bp->address + offset;
779 atomic_dec(&bp->ref_count);
780 }
781 }
782
783 return 0;
784 }
785
786 static struct bpt *at_breakpoint(unsigned long pc)
787 {
788 int i;
789 struct bpt *bp;
790
791 bp = bpts;
792 for (i = 0; i < NBPTS; ++i, ++bp)
793 if (bp->enabled && pc == bp->address)
794 return bp;
795 return NULL;
796 }
797
798 static struct bpt *in_breakpoint_table(unsigned long nip, unsigned long *offp)
799 {
800 unsigned long off;
801
802 off = nip - (unsigned long) bpts;
803 if (off >= sizeof(bpts))
804 return NULL;
805 off %= sizeof(struct bpt);
806 if (off != offsetof(struct bpt, instr[0])
807 && off != offsetof(struct bpt, instr[1]))
808 return NULL;
809 *offp = off - offsetof(struct bpt, instr[0]);
810 return (struct bpt *) (nip - off);
811 }
812
813 static struct bpt *new_breakpoint(unsigned long a)
814 {
815 struct bpt *bp;
816
817 a &= ~3UL;
818 bp = at_breakpoint(a);
819 if (bp)
820 return bp;
821
822 for (bp = bpts; bp < &bpts[NBPTS]; ++bp) {
823 if (!bp->enabled && atomic_read(&bp->ref_count) == 0) {
824 bp->address = a;
825 bp->instr[1] = bpinstr;
826 store_inst(&bp->instr[1]);
827 return bp;
828 }
829 }
830
831 printf("Sorry, no free breakpoints. Please clear one first.\n");
832 return NULL;
833 }
834
835 static void insert_bpts(void)
836 {
837 int i;
838 struct bpt *bp;
839
840 bp = bpts;
841 for (i = 0; i < NBPTS; ++i, ++bp) {
842 if ((bp->enabled & (BP_TRAP|BP_CIABR)) == 0)
843 continue;
844 if (mread(bp->address, &bp->instr[0], 4) != 4) {
845 printf("Couldn't read instruction at %lx, "
846 "disabling breakpoint there\n", bp->address);
847 bp->enabled = 0;
848 continue;
849 }
850 if (IS_MTMSRD(bp->instr[0]) || IS_RFID(bp->instr[0])) {
851 printf("Breakpoint at %lx is on an mtmsrd or rfid "
852 "instruction, disabling it\n", bp->address);
853 bp->enabled = 0;
854 continue;
855 }
856 store_inst(&bp->instr[0]);
857 if (bp->enabled & BP_CIABR)
858 continue;
859 if (patch_instruction((unsigned int *)bp->address,
860 bpinstr) != 0) {
861 printf("Couldn't write instruction at %lx, "
862 "disabling breakpoint there\n", bp->address);
863 bp->enabled &= ~BP_TRAP;
864 continue;
865 }
866 store_inst((void *)bp->address);
867 }
868 }
869
870 static void insert_cpu_bpts(void)
871 {
872 struct arch_hw_breakpoint brk;
873
874 if (dabr.enabled) {
875 brk.address = dabr.address;
876 brk.type = (dabr.enabled & HW_BRK_TYPE_DABR) | HW_BRK_TYPE_PRIV_ALL;
877 brk.len = 8;
878 __set_breakpoint(&brk);
879 }
880
881 if (iabr)
882 set_ciabr(iabr->address);
883 }
884
885 static void remove_bpts(void)
886 {
887 int i;
888 struct bpt *bp;
889 unsigned instr;
890
891 bp = bpts;
892 for (i = 0; i < NBPTS; ++i, ++bp) {
893 if ((bp->enabled & (BP_TRAP|BP_CIABR)) != BP_TRAP)
894 continue;
895 if (mread(bp->address, &instr, 4) == 4
896 && instr == bpinstr
897 && patch_instruction(
898 (unsigned int *)bp->address, bp->instr[0]) != 0)
899 printf("Couldn't remove breakpoint at %lx\n",
900 bp->address);
901 else
902 store_inst((void *)bp->address);
903 }
904 }
905
906 static void remove_cpu_bpts(void)
907 {
908 hw_breakpoint_disable();
909 write_ciabr(0);
910 }
911
912 /* Based on uptime_proc_show(). */
913 static void
914 show_uptime(void)
915 {
916 struct timespec uptime;
917
918 if (setjmp(bus_error_jmp) == 0) {
919 catch_memory_errors = 1;
920 sync();
921
922 get_monotonic_boottime(&uptime);
923 printf("Uptime: %lu.%.2lu seconds\n", (unsigned long)uptime.tv_sec,
924 ((unsigned long)uptime.tv_nsec / (NSEC_PER_SEC/100)));
925
926 sync();
927 __delay(200); \
928 }
929 catch_memory_errors = 0;
930 }
931
932 static void set_lpp_cmd(void)
933 {
934 unsigned long lpp;
935
936 if (!scanhex(&lpp)) {
937 printf("Invalid number.\n");
938 lpp = 0;
939 }
940 xmon_set_pagination_lpp(lpp);
941 }
942 /* Command interpreting routine */
943 static char *last_cmd;
944
945 static int
946 cmds(struct pt_regs *excp)
947 {
948 int cmd = 0;
949
950 last_cmd = NULL;
951 xmon_regs = excp;
952
953 xmon_show_stack(excp->gpr[1], excp->link, excp->nip);
954
955 for(;;) {
956 #ifdef CONFIG_SMP
957 printf("%x:", smp_processor_id());
958 #endif /* CONFIG_SMP */
959 printf("mon> ");
960 flush_input();
961 termch = 0;
962 cmd = skipbl();
963 if( cmd == '\n' ) {
964 if (last_cmd == NULL)
965 continue;
966 take_input(last_cmd);
967 last_cmd = NULL;
968 cmd = inchar();
969 }
970 switch (cmd) {
971 case 'm':
972 cmd = inchar();
973 switch (cmd) {
974 case 'm':
975 case 's':
976 case 'd':
977 memops(cmd);
978 break;
979 case 'l':
980 memlocate();
981 break;
982 case 'z':
983 memzcan();
984 break;
985 case 'i':
986 show_mem(0, NULL);
987 break;
988 default:
989 termch = cmd;
990 memex();
991 }
992 break;
993 case 'd':
994 dump();
995 break;
996 case 'l':
997 symbol_lookup();
998 break;
999 case 'r':
1000 prregs(excp); /* print regs */
1001 break;
1002 case 'e':
1003 excprint(excp);
1004 break;
1005 case 'S':
1006 super_regs();
1007 break;
1008 case 't':
1009 backtrace(excp);
1010 break;
1011 case 'f':
1012 cacheflush();
1013 break;
1014 case 's':
1015 if (do_spu_cmd() == 0)
1016 break;
1017 if (do_step(excp))
1018 return cmd;
1019 break;
1020 case 'x':
1021 case 'X':
1022 if (tracing_enabled)
1023 tracing_on();
1024 return cmd;
1025 case EOF:
1026 printf(" <no input ...>\n");
1027 mdelay(2000);
1028 return cmd;
1029 case '?':
1030 xmon_puts(help_string);
1031 break;
1032 case '#':
1033 set_lpp_cmd();
1034 break;
1035 case 'b':
1036 bpt_cmds();
1037 break;
1038 case 'C':
1039 csum();
1040 break;
1041 case 'c':
1042 if (cpu_cmd())
1043 return 0;
1044 break;
1045 case 'z':
1046 bootcmds();
1047 break;
1048 case 'p':
1049 proccall();
1050 break;
1051 case 'P':
1052 show_tasks();
1053 break;
1054 #ifdef CONFIG_PPC_STD_MMU
1055 case 'u':
1056 dump_segments();
1057 break;
1058 #elif defined(CONFIG_44x)
1059 case 'u':
1060 dump_tlb_44x();
1061 break;
1062 #elif defined(CONFIG_PPC_BOOK3E)
1063 case 'u':
1064 dump_tlb_book3e();
1065 break;
1066 #endif
1067 case 'U':
1068 show_uptime();
1069 break;
1070 default:
1071 printf("Unrecognized command: ");
1072 do {
1073 if (' ' < cmd && cmd <= '~')
1074 putchar(cmd);
1075 else
1076 printf("\\x%x", cmd);
1077 cmd = inchar();
1078 } while (cmd != '\n');
1079 printf(" (type ? for help)\n");
1080 break;
1081 }
1082 }
1083 }
1084
1085 #ifdef CONFIG_BOOKE
1086 static int do_step(struct pt_regs *regs)
1087 {
1088 regs->msr |= MSR_DE;
1089 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) | DBCR0_IC | DBCR0_IDM);
1090 return 1;
1091 }
1092 #else
1093 /*
1094 * Step a single instruction.
1095 * Some instructions we emulate, others we execute with MSR_SE set.
1096 */
1097 static int do_step(struct pt_regs *regs)
1098 {
1099 unsigned int instr;
1100 int stepped;
1101
1102 /* check we are in 64-bit kernel mode, translation enabled */
1103 if ((regs->msr & (MSR_64BIT|MSR_PR|MSR_IR)) == (MSR_64BIT|MSR_IR)) {
1104 if (mread(regs->nip, &instr, 4) == 4) {
1105 stepped = emulate_step(regs, instr);
1106 if (stepped < 0) {
1107 printf("Couldn't single-step %s instruction\n",
1108 (IS_RFID(instr)? "rfid": "mtmsrd"));
1109 return 0;
1110 }
1111 if (stepped > 0) {
1112 regs->trap = 0xd00 | (regs->trap & 1);
1113 printf("stepped to ");
1114 xmon_print_symbol(regs->nip, " ", "\n");
1115 ppc_inst_dump(regs->nip, 1, 0);
1116 return 0;
1117 }
1118 }
1119 }
1120 regs->msr |= MSR_SE;
1121 return 1;
1122 }
1123 #endif
1124
1125 static void bootcmds(void)
1126 {
1127 int cmd;
1128
1129 cmd = inchar();
1130 if (cmd == 'r')
1131 ppc_md.restart(NULL);
1132 else if (cmd == 'h')
1133 ppc_md.halt();
1134 else if (cmd == 'p')
1135 if (pm_power_off)
1136 pm_power_off();
1137 }
1138
1139 static int cpu_cmd(void)
1140 {
1141 #ifdef CONFIG_SMP
1142 unsigned long cpu, first_cpu, last_cpu;
1143 int timeout;
1144
1145 if (!scanhex(&cpu)) {
1146 /* print cpus waiting or in xmon */
1147 printf("cpus stopped:");
1148 last_cpu = first_cpu = NR_CPUS;
1149 for_each_possible_cpu(cpu) {
1150 if (cpumask_test_cpu(cpu, &cpus_in_xmon)) {
1151 if (cpu == last_cpu + 1) {
1152 last_cpu = cpu;
1153 } else {
1154 if (last_cpu != first_cpu)
1155 printf("-0x%lx", last_cpu);
1156 last_cpu = first_cpu = cpu;
1157 printf(" 0x%lx", cpu);
1158 }
1159 }
1160 }
1161 if (last_cpu != first_cpu)
1162 printf("-0x%lx", last_cpu);
1163 printf("\n");
1164 return 0;
1165 }
1166 /* try to switch to cpu specified */
1167 if (!cpumask_test_cpu(cpu, &cpus_in_xmon)) {
1168 printf("cpu 0x%x isn't in xmon\n", cpu);
1169 return 0;
1170 }
1171 xmon_taken = 0;
1172 mb();
1173 xmon_owner = cpu;
1174 timeout = 10000000;
1175 while (!xmon_taken) {
1176 if (--timeout == 0) {
1177 if (test_and_set_bit(0, &xmon_taken))
1178 break;
1179 /* take control back */
1180 mb();
1181 xmon_owner = smp_processor_id();
1182 printf("cpu 0x%x didn't take control\n", cpu);
1183 return 0;
1184 }
1185 barrier();
1186 }
1187 return 1;
1188 #else
1189 return 0;
1190 #endif /* CONFIG_SMP */
1191 }
1192
1193 static unsigned short fcstab[256] = {
1194 0x0000, 0x1189, 0x2312, 0x329b, 0x4624, 0x57ad, 0x6536, 0x74bf,
1195 0x8c48, 0x9dc1, 0xaf5a, 0xbed3, 0xca6c, 0xdbe5, 0xe97e, 0xf8f7,
1196 0x1081, 0x0108, 0x3393, 0x221a, 0x56a5, 0x472c, 0x75b7, 0x643e,
1197 0x9cc9, 0x8d40, 0xbfdb, 0xae52, 0xdaed, 0xcb64, 0xf9ff, 0xe876,
1198 0x2102, 0x308b, 0x0210, 0x1399, 0x6726, 0x76af, 0x4434, 0x55bd,
1199 0xad4a, 0xbcc3, 0x8e58, 0x9fd1, 0xeb6e, 0xfae7, 0xc87c, 0xd9f5,
1200 0x3183, 0x200a, 0x1291, 0x0318, 0x77a7, 0x662e, 0x54b5, 0x453c,
1201 0xbdcb, 0xac42, 0x9ed9, 0x8f50, 0xfbef, 0xea66, 0xd8fd, 0xc974,
1202 0x4204, 0x538d, 0x6116, 0x709f, 0x0420, 0x15a9, 0x2732, 0x36bb,
1203 0xce4c, 0xdfc5, 0xed5e, 0xfcd7, 0x8868, 0x99e1, 0xab7a, 0xbaf3,
1204 0x5285, 0x430c, 0x7197, 0x601e, 0x14a1, 0x0528, 0x37b3, 0x263a,
1205 0xdecd, 0xcf44, 0xfddf, 0xec56, 0x98e9, 0x8960, 0xbbfb, 0xaa72,
1206 0x6306, 0x728f, 0x4014, 0x519d, 0x2522, 0x34ab, 0x0630, 0x17b9,
1207 0xef4e, 0xfec7, 0xcc5c, 0xddd5, 0xa96a, 0xb8e3, 0x8a78, 0x9bf1,
1208 0x7387, 0x620e, 0x5095, 0x411c, 0x35a3, 0x242a, 0x16b1, 0x0738,
1209 0xffcf, 0xee46, 0xdcdd, 0xcd54, 0xb9eb, 0xa862, 0x9af9, 0x8b70,
1210 0x8408, 0x9581, 0xa71a, 0xb693, 0xc22c, 0xd3a5, 0xe13e, 0xf0b7,
1211 0x0840, 0x19c9, 0x2b52, 0x3adb, 0x4e64, 0x5fed, 0x6d76, 0x7cff,
1212 0x9489, 0x8500, 0xb79b, 0xa612, 0xd2ad, 0xc324, 0xf1bf, 0xe036,
1213 0x18c1, 0x0948, 0x3bd3, 0x2a5a, 0x5ee5, 0x4f6c, 0x7df7, 0x6c7e,
1214 0xa50a, 0xb483, 0x8618, 0x9791, 0xe32e, 0xf2a7, 0xc03c, 0xd1b5,
1215 0x2942, 0x38cb, 0x0a50, 0x1bd9, 0x6f66, 0x7eef, 0x4c74, 0x5dfd,
1216 0xb58b, 0xa402, 0x9699, 0x8710, 0xf3af, 0xe226, 0xd0bd, 0xc134,
1217 0x39c3, 0x284a, 0x1ad1, 0x0b58, 0x7fe7, 0x6e6e, 0x5cf5, 0x4d7c,
1218 0xc60c, 0xd785, 0xe51e, 0xf497, 0x8028, 0x91a1, 0xa33a, 0xb2b3,
1219 0x4a44, 0x5bcd, 0x6956, 0x78df, 0x0c60, 0x1de9, 0x2f72, 0x3efb,
1220 0xd68d, 0xc704, 0xf59f, 0xe416, 0x90a9, 0x8120, 0xb3bb, 0xa232,
1221 0x5ac5, 0x4b4c, 0x79d7, 0x685e, 0x1ce1, 0x0d68, 0x3ff3, 0x2e7a,
1222 0xe70e, 0xf687, 0xc41c, 0xd595, 0xa12a, 0xb0a3, 0x8238, 0x93b1,
1223 0x6b46, 0x7acf, 0x4854, 0x59dd, 0x2d62, 0x3ceb, 0x0e70, 0x1ff9,
1224 0xf78f, 0xe606, 0xd49d, 0xc514, 0xb1ab, 0xa022, 0x92b9, 0x8330,
1225 0x7bc7, 0x6a4e, 0x58d5, 0x495c, 0x3de3, 0x2c6a, 0x1ef1, 0x0f78
1226 };
1227
1228 #define FCS(fcs, c) (((fcs) >> 8) ^ fcstab[((fcs) ^ (c)) & 0xff])
1229
1230 static void
1231 csum(void)
1232 {
1233 unsigned int i;
1234 unsigned short fcs;
1235 unsigned char v;
1236
1237 if (!scanhex(&adrs))
1238 return;
1239 if (!scanhex(&ncsum))
1240 return;
1241 fcs = 0xffff;
1242 for (i = 0; i < ncsum; ++i) {
1243 if (mread(adrs+i, &v, 1) == 0) {
1244 printf("csum stopped at "REG"\n", adrs+i);
1245 break;
1246 }
1247 fcs = FCS(fcs, v);
1248 }
1249 printf("%x\n", fcs);
1250 }
1251
1252 /*
1253 * Check if this is a suitable place to put a breakpoint.
1254 */
1255 static long check_bp_loc(unsigned long addr)
1256 {
1257 unsigned int instr;
1258
1259 addr &= ~3;
1260 if (!is_kernel_addr(addr)) {
1261 printf("Breakpoints may only be placed at kernel addresses\n");
1262 return 0;
1263 }
1264 if (!mread(addr, &instr, sizeof(instr))) {
1265 printf("Can't read instruction at address %lx\n", addr);
1266 return 0;
1267 }
1268 if (IS_MTMSRD(instr) || IS_RFID(instr)) {
1269 printf("Breakpoints may not be placed on mtmsrd or rfid "
1270 "instructions\n");
1271 return 0;
1272 }
1273 return 1;
1274 }
1275
1276 static char *breakpoint_help_string =
1277 "Breakpoint command usage:\n"
1278 "b show breakpoints\n"
1279 "b <addr> [cnt] set breakpoint at given instr addr\n"
1280 "bc clear all breakpoints\n"
1281 "bc <n/addr> clear breakpoint number n or at addr\n"
1282 "bi <addr> [cnt] set hardware instr breakpoint (POWER8 only)\n"
1283 "bd <addr> [cnt] set hardware data breakpoint\n"
1284 "";
1285
1286 static void
1287 bpt_cmds(void)
1288 {
1289 int cmd;
1290 unsigned long a;
1291 int i;
1292 struct bpt *bp;
1293
1294 cmd = inchar();
1295 switch (cmd) {
1296 #ifndef CONFIG_PPC_8xx
1297 static const char badaddr[] = "Only kernel addresses are permitted for breakpoints\n";
1298 int mode;
1299 case 'd': /* bd - hardware data breakpoint */
1300 mode = 7;
1301 cmd = inchar();
1302 if (cmd == 'r')
1303 mode = 5;
1304 else if (cmd == 'w')
1305 mode = 6;
1306 else
1307 termch = cmd;
1308 dabr.address = 0;
1309 dabr.enabled = 0;
1310 if (scanhex(&dabr.address)) {
1311 if (!is_kernel_addr(dabr.address)) {
1312 printf(badaddr);
1313 break;
1314 }
1315 dabr.address &= ~HW_BRK_TYPE_DABR;
1316 dabr.enabled = mode | BP_DABR;
1317 }
1318 break;
1319
1320 case 'i': /* bi - hardware instr breakpoint */
1321 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) {
1322 printf("Hardware instruction breakpoint "
1323 "not supported on this cpu\n");
1324 break;
1325 }
1326 if (iabr) {
1327 iabr->enabled &= ~BP_CIABR;
1328 iabr = NULL;
1329 }
1330 if (!scanhex(&a))
1331 break;
1332 if (!check_bp_loc(a))
1333 break;
1334 bp = new_breakpoint(a);
1335 if (bp != NULL) {
1336 bp->enabled |= BP_CIABR;
1337 iabr = bp;
1338 }
1339 break;
1340 #endif
1341
1342 case 'c':
1343 if (!scanhex(&a)) {
1344 /* clear all breakpoints */
1345 for (i = 0; i < NBPTS; ++i)
1346 bpts[i].enabled = 0;
1347 iabr = NULL;
1348 dabr.enabled = 0;
1349 printf("All breakpoints cleared\n");
1350 break;
1351 }
1352
1353 if (a <= NBPTS && a >= 1) {
1354 /* assume a breakpoint number */
1355 bp = &bpts[a-1]; /* bp nums are 1 based */
1356 } else {
1357 /* assume a breakpoint address */
1358 bp = at_breakpoint(a);
1359 if (bp == NULL) {
1360 printf("No breakpoint at %lx\n", a);
1361 break;
1362 }
1363 }
1364
1365 printf("Cleared breakpoint %lx (", BP_NUM(bp));
1366 xmon_print_symbol(bp->address, " ", ")\n");
1367 bp->enabled = 0;
1368 break;
1369
1370 default:
1371 termch = cmd;
1372 cmd = skipbl();
1373 if (cmd == '?') {
1374 printf(breakpoint_help_string);
1375 break;
1376 }
1377 termch = cmd;
1378 if (!scanhex(&a)) {
1379 /* print all breakpoints */
1380 printf(" type address\n");
1381 if (dabr.enabled) {
1382 printf(" data "REG" [", dabr.address);
1383 if (dabr.enabled & 1)
1384 printf("r");
1385 if (dabr.enabled & 2)
1386 printf("w");
1387 printf("]\n");
1388 }
1389 for (bp = bpts; bp < &bpts[NBPTS]; ++bp) {
1390 if (!bp->enabled)
1391 continue;
1392 printf("%2x %s ", BP_NUM(bp),
1393 (bp->enabled & BP_CIABR) ? "inst": "trap");
1394 xmon_print_symbol(bp->address, " ", "\n");
1395 }
1396 break;
1397 }
1398
1399 if (!check_bp_loc(a))
1400 break;
1401 bp = new_breakpoint(a);
1402 if (bp != NULL)
1403 bp->enabled |= BP_TRAP;
1404 break;
1405 }
1406 }
1407
1408 /* Very cheap human name for vector lookup. */
1409 static
1410 const char *getvecname(unsigned long vec)
1411 {
1412 char *ret;
1413
1414 switch (vec) {
1415 case 0x100: ret = "(System Reset)"; break;
1416 case 0x200: ret = "(Machine Check)"; break;
1417 case 0x300: ret = "(Data Access)"; break;
1418 case 0x380:
1419 if (radix_enabled())
1420 ret = "(Data Access Out of Range)";
1421 else
1422 ret = "(Data SLB Access)";
1423 break;
1424 case 0x400: ret = "(Instruction Access)"; break;
1425 case 0x480:
1426 if (radix_enabled())
1427 ret = "(Instruction Access Out of Range)";
1428 else
1429 ret = "(Instruction SLB Access)";
1430 break;
1431 case 0x500: ret = "(Hardware Interrupt)"; break;
1432 case 0x600: ret = "(Alignment)"; break;
1433 case 0x700: ret = "(Program Check)"; break;
1434 case 0x800: ret = "(FPU Unavailable)"; break;
1435 case 0x900: ret = "(Decrementer)"; break;
1436 case 0x980: ret = "(Hypervisor Decrementer)"; break;
1437 case 0xa00: ret = "(Doorbell)"; break;
1438 case 0xc00: ret = "(System Call)"; break;
1439 case 0xd00: ret = "(Single Step)"; break;
1440 case 0xe40: ret = "(Emulation Assist)"; break;
1441 case 0xe60: ret = "(HMI)"; break;
1442 case 0xe80: ret = "(Hypervisor Doorbell)"; break;
1443 case 0xf00: ret = "(Performance Monitor)"; break;
1444 case 0xf20: ret = "(Altivec Unavailable)"; break;
1445 case 0x1300: ret = "(Instruction Breakpoint)"; break;
1446 case 0x1500: ret = "(Denormalisation)"; break;
1447 case 0x1700: ret = "(Altivec Assist)"; break;
1448 default: ret = "";
1449 }
1450 return ret;
1451 }
1452
1453 static void get_function_bounds(unsigned long pc, unsigned long *startp,
1454 unsigned long *endp)
1455 {
1456 unsigned long size, offset;
1457 const char *name;
1458
1459 *startp = *endp = 0;
1460 if (pc == 0)
1461 return;
1462 if (setjmp(bus_error_jmp) == 0) {
1463 catch_memory_errors = 1;
1464 sync();
1465 name = kallsyms_lookup(pc, &size, &offset, NULL, tmpstr);
1466 if (name != NULL) {
1467 *startp = pc - offset;
1468 *endp = pc - offset + size;
1469 }
1470 sync();
1471 }
1472 catch_memory_errors = 0;
1473 }
1474
1475 #define LRSAVE_OFFSET (STACK_FRAME_LR_SAVE * sizeof(unsigned long))
1476 #define MARKER_OFFSET (STACK_FRAME_MARKER * sizeof(unsigned long))
1477
1478 static void xmon_show_stack(unsigned long sp, unsigned long lr,
1479 unsigned long pc)
1480 {
1481 int max_to_print = 64;
1482 unsigned long ip;
1483 unsigned long newsp;
1484 unsigned long marker;
1485 struct pt_regs regs;
1486
1487 while (max_to_print--) {
1488 if (!is_kernel_addr(sp)) {
1489 if (sp != 0)
1490 printf("SP (%lx) is in userspace\n", sp);
1491 break;
1492 }
1493
1494 if (!mread(sp + LRSAVE_OFFSET, &ip, sizeof(unsigned long))
1495 || !mread(sp, &newsp, sizeof(unsigned long))) {
1496 printf("Couldn't read stack frame at %lx\n", sp);
1497 break;
1498 }
1499
1500 /*
1501 * For the first stack frame, try to work out if
1502 * LR and/or the saved LR value in the bottommost
1503 * stack frame are valid.
1504 */
1505 if ((pc | lr) != 0) {
1506 unsigned long fnstart, fnend;
1507 unsigned long nextip;
1508 int printip = 1;
1509
1510 get_function_bounds(pc, &fnstart, &fnend);
1511 nextip = 0;
1512 if (newsp > sp)
1513 mread(newsp + LRSAVE_OFFSET, &nextip,
1514 sizeof(unsigned long));
1515 if (lr == ip) {
1516 if (!is_kernel_addr(lr)
1517 || (fnstart <= lr && lr < fnend))
1518 printip = 0;
1519 } else if (lr == nextip) {
1520 printip = 0;
1521 } else if (is_kernel_addr(lr)
1522 && !(fnstart <= lr && lr < fnend)) {
1523 printf("[link register ] ");
1524 xmon_print_symbol(lr, " ", "\n");
1525 }
1526 if (printip) {
1527 printf("["REG"] ", sp);
1528 xmon_print_symbol(ip, " ", " (unreliable)\n");
1529 }
1530 pc = lr = 0;
1531
1532 } else {
1533 printf("["REG"] ", sp);
1534 xmon_print_symbol(ip, " ", "\n");
1535 }
1536
1537 /* Look for "regshere" marker to see if this is
1538 an exception frame. */
1539 if (mread(sp + MARKER_OFFSET, &marker, sizeof(unsigned long))
1540 && marker == STACK_FRAME_REGS_MARKER) {
1541 if (mread(sp + STACK_FRAME_OVERHEAD, &regs, sizeof(regs))
1542 != sizeof(regs)) {
1543 printf("Couldn't read registers at %lx\n",
1544 sp + STACK_FRAME_OVERHEAD);
1545 break;
1546 }
1547 printf("--- Exception: %lx %s at ", regs.trap,
1548 getvecname(TRAP(&regs)));
1549 pc = regs.nip;
1550 lr = regs.link;
1551 xmon_print_symbol(pc, " ", "\n");
1552 }
1553
1554 if (newsp == 0)
1555 break;
1556
1557 sp = newsp;
1558 }
1559 }
1560
1561 static void backtrace(struct pt_regs *excp)
1562 {
1563 unsigned long sp;
1564
1565 if (scanhex(&sp))
1566 xmon_show_stack(sp, 0, 0);
1567 else
1568 xmon_show_stack(excp->gpr[1], excp->link, excp->nip);
1569 scannl();
1570 }
1571
1572 static void print_bug_trap(struct pt_regs *regs)
1573 {
1574 #ifdef CONFIG_BUG
1575 const struct bug_entry *bug;
1576 unsigned long addr;
1577
1578 if (regs->msr & MSR_PR)
1579 return; /* not in kernel */
1580 addr = regs->nip; /* address of trap instruction */
1581 if (!is_kernel_addr(addr))
1582 return;
1583 bug = find_bug(regs->nip);
1584 if (bug == NULL)
1585 return;
1586 if (is_warning_bug(bug))
1587 return;
1588
1589 #ifdef CONFIG_DEBUG_BUGVERBOSE
1590 printf("kernel BUG at %s:%u!\n",
1591 bug->file, bug->line);
1592 #else
1593 printf("kernel BUG at %p!\n", (void *)bug->bug_addr);
1594 #endif
1595 #endif /* CONFIG_BUG */
1596 }
1597
1598 static void excprint(struct pt_regs *fp)
1599 {
1600 unsigned long trap;
1601
1602 #ifdef CONFIG_SMP
1603 printf("cpu 0x%x: ", smp_processor_id());
1604 #endif /* CONFIG_SMP */
1605
1606 trap = TRAP(fp);
1607 printf("Vector: %lx %s at [%lx]\n", fp->trap, getvecname(trap), fp);
1608 printf(" pc: ");
1609 xmon_print_symbol(fp->nip, ": ", "\n");
1610
1611 printf(" lr: ", fp->link);
1612 xmon_print_symbol(fp->link, ": ", "\n");
1613
1614 printf(" sp: %lx\n", fp->gpr[1]);
1615 printf(" msr: %lx\n", fp->msr);
1616
1617 if (trap == 0x300 || trap == 0x380 || trap == 0x600 || trap == 0x200) {
1618 printf(" dar: %lx\n", fp->dar);
1619 if (trap != 0x380)
1620 printf(" dsisr: %lx\n", fp->dsisr);
1621 }
1622
1623 printf(" current = 0x%lx\n", current);
1624 #ifdef CONFIG_PPC64
1625 printf(" paca = 0x%lx\t softe: %d\t irq_happened: 0x%02x\n",
1626 local_paca, local_paca->soft_enabled, local_paca->irq_happened);
1627 #endif
1628 if (current) {
1629 printf(" pid = %ld, comm = %s\n",
1630 current->pid, current->comm);
1631 }
1632
1633 if (trap == 0x700)
1634 print_bug_trap(fp);
1635
1636 printf(linux_banner);
1637 }
1638
1639 static void prregs(struct pt_regs *fp)
1640 {
1641 int n, trap;
1642 unsigned long base;
1643 struct pt_regs regs;
1644
1645 if (scanhex(&base)) {
1646 if (setjmp(bus_error_jmp) == 0) {
1647 catch_memory_errors = 1;
1648 sync();
1649 regs = *(struct pt_regs *)base;
1650 sync();
1651 __delay(200);
1652 } else {
1653 catch_memory_errors = 0;
1654 printf("*** Error reading registers from "REG"\n",
1655 base);
1656 return;
1657 }
1658 catch_memory_errors = 0;
1659 fp = &regs;
1660 }
1661
1662 #ifdef CONFIG_PPC64
1663 if (FULL_REGS(fp)) {
1664 for (n = 0; n < 16; ++n)
1665 printf("R%.2ld = "REG" R%.2ld = "REG"\n",
1666 n, fp->gpr[n], n+16, fp->gpr[n+16]);
1667 } else {
1668 for (n = 0; n < 7; ++n)
1669 printf("R%.2ld = "REG" R%.2ld = "REG"\n",
1670 n, fp->gpr[n], n+7, fp->gpr[n+7]);
1671 }
1672 #else
1673 for (n = 0; n < 32; ++n) {
1674 printf("R%.2d = %.8x%s", n, fp->gpr[n],
1675 (n & 3) == 3? "\n": " ");
1676 if (n == 12 && !FULL_REGS(fp)) {
1677 printf("\n");
1678 break;
1679 }
1680 }
1681 #endif
1682 printf("pc = ");
1683 xmon_print_symbol(fp->nip, " ", "\n");
1684 if (TRAP(fp) != 0xc00 && cpu_has_feature(CPU_FTR_CFAR)) {
1685 printf("cfar= ");
1686 xmon_print_symbol(fp->orig_gpr3, " ", "\n");
1687 }
1688 printf("lr = ");
1689 xmon_print_symbol(fp->link, " ", "\n");
1690 printf("msr = "REG" cr = %.8lx\n", fp->msr, fp->ccr);
1691 printf("ctr = "REG" xer = "REG" trap = %4lx\n",
1692 fp->ctr, fp->xer, fp->trap);
1693 trap = TRAP(fp);
1694 if (trap == 0x300 || trap == 0x380 || trap == 0x600)
1695 printf("dar = "REG" dsisr = %.8lx\n", fp->dar, fp->dsisr);
1696 }
1697
1698 static void cacheflush(void)
1699 {
1700 int cmd;
1701 unsigned long nflush;
1702
1703 cmd = inchar();
1704 if (cmd != 'i')
1705 termch = cmd;
1706 scanhex((void *)&adrs);
1707 if (termch != '\n')
1708 termch = 0;
1709 nflush = 1;
1710 scanhex(&nflush);
1711 nflush = (nflush + L1_CACHE_BYTES - 1) / L1_CACHE_BYTES;
1712 if (setjmp(bus_error_jmp) == 0) {
1713 catch_memory_errors = 1;
1714 sync();
1715
1716 if (cmd != 'i') {
1717 for (; nflush > 0; --nflush, adrs += L1_CACHE_BYTES)
1718 cflush((void *) adrs);
1719 } else {
1720 for (; nflush > 0; --nflush, adrs += L1_CACHE_BYTES)
1721 cinval((void *) adrs);
1722 }
1723 sync();
1724 /* wait a little while to see if we get a machine check */
1725 __delay(200);
1726 }
1727 catch_memory_errors = 0;
1728 }
1729
1730 extern unsigned long xmon_mfspr(int spr, unsigned long default_value);
1731 extern void xmon_mtspr(int spr, unsigned long value);
1732
1733 static int
1734 read_spr(int n, unsigned long *vp)
1735 {
1736 unsigned long ret = -1UL;
1737 int ok = 0;
1738
1739 if (setjmp(bus_error_jmp) == 0) {
1740 catch_spr_faults = 1;
1741 sync();
1742
1743 ret = xmon_mfspr(n, *vp);
1744
1745 sync();
1746 *vp = ret;
1747 ok = 1;
1748 }
1749 catch_spr_faults = 0;
1750
1751 return ok;
1752 }
1753
1754 static void
1755 write_spr(int n, unsigned long val)
1756 {
1757 if (setjmp(bus_error_jmp) == 0) {
1758 catch_spr_faults = 1;
1759 sync();
1760
1761 xmon_mtspr(n, val);
1762
1763 sync();
1764 } else {
1765 printf("SPR 0x%03x (%4d) Faulted during write\n", n, n);
1766 }
1767 catch_spr_faults = 0;
1768 }
1769
1770 static void dump_206_sprs(void)
1771 {
1772 #ifdef CONFIG_PPC64
1773 if (!cpu_has_feature(CPU_FTR_ARCH_206))
1774 return;
1775
1776 /* Actually some of these pre-date 2.06, but whatevs */
1777
1778 printf("srr0 = %.16lx srr1 = %.16lx dsisr = %.8x\n",
1779 mfspr(SPRN_SRR0), mfspr(SPRN_SRR1), mfspr(SPRN_DSISR));
1780 printf("dscr = %.16lx ppr = %.16lx pir = %.8x\n",
1781 mfspr(SPRN_DSCR), mfspr(SPRN_PPR), mfspr(SPRN_PIR));
1782 printf("amr = %.16lx uamor = %.16lx\n",
1783 mfspr(SPRN_AMR), mfspr(SPRN_UAMOR));
1784
1785 if (!(mfmsr() & MSR_HV))
1786 return;
1787
1788 printf("sdr1 = %.16lx hdar = %.16lx hdsisr = %.8x\n",
1789 mfspr(SPRN_SDR1), mfspr(SPRN_HDAR), mfspr(SPRN_HDSISR));
1790 printf("hsrr0 = %.16lx hsrr1 = %.16lx hdec = %.16lx\n",
1791 mfspr(SPRN_HSRR0), mfspr(SPRN_HSRR1), mfspr(SPRN_HDEC));
1792 printf("lpcr = %.16lx pcr = %.16lx lpidr = %.8x\n",
1793 mfspr(SPRN_LPCR), mfspr(SPRN_PCR), mfspr(SPRN_LPID));
1794 printf("hsprg0 = %.16lx hsprg1 = %.16lx amor = %.16lx\n",
1795 mfspr(SPRN_HSPRG0), mfspr(SPRN_HSPRG1), mfspr(SPRN_AMOR));
1796 printf("dabr = %.16lx dabrx = %.16lx\n",
1797 mfspr(SPRN_DABR), mfspr(SPRN_DABRX));
1798 #endif
1799 }
1800
1801 static void dump_207_sprs(void)
1802 {
1803 #ifdef CONFIG_PPC64
1804 unsigned long msr;
1805
1806 if (!cpu_has_feature(CPU_FTR_ARCH_207S))
1807 return;
1808
1809 printf("dpdes = %.16lx tir = %.16lx cir = %.8x\n",
1810 mfspr(SPRN_DPDES), mfspr(SPRN_TIR), mfspr(SPRN_CIR));
1811
1812 printf("fscr = %.16lx tar = %.16lx pspb = %.8x\n",
1813 mfspr(SPRN_FSCR), mfspr(SPRN_TAR), mfspr(SPRN_PSPB));
1814
1815 msr = mfmsr();
1816 if (msr & MSR_TM) {
1817 /* Only if TM has been enabled in the kernel */
1818 printf("tfhar = %.16lx tfiar = %.16lx texasr = %.16lx\n",
1819 mfspr(SPRN_TFHAR), mfspr(SPRN_TFIAR),
1820 mfspr(SPRN_TEXASR));
1821 }
1822
1823 printf("mmcr0 = %.16lx mmcr1 = %.16lx mmcr2 = %.16lx\n",
1824 mfspr(SPRN_MMCR0), mfspr(SPRN_MMCR1), mfspr(SPRN_MMCR2));
1825 printf("pmc1 = %.8x pmc2 = %.8x pmc3 = %.8x pmc4 = %.8x\n",
1826 mfspr(SPRN_PMC1), mfspr(SPRN_PMC2),
1827 mfspr(SPRN_PMC3), mfspr(SPRN_PMC4));
1828 printf("mmcra = %.16lx siar = %.16lx pmc5 = %.8x\n",
1829 mfspr(SPRN_MMCRA), mfspr(SPRN_SIAR), mfspr(SPRN_PMC5));
1830 printf("sdar = %.16lx sier = %.16lx pmc6 = %.8x\n",
1831 mfspr(SPRN_SDAR), mfspr(SPRN_SIER), mfspr(SPRN_PMC6));
1832 printf("ebbhr = %.16lx ebbrr = %.16lx bescr = %.16lx\n",
1833 mfspr(SPRN_EBBHR), mfspr(SPRN_EBBRR), mfspr(SPRN_BESCR));
1834 printf("iamr = %.16lx\n", mfspr(SPRN_IAMR));
1835
1836 if (!(msr & MSR_HV))
1837 return;
1838
1839 printf("hfscr = %.16lx dhdes = %.16lx rpr = %.16lx\n",
1840 mfspr(SPRN_HFSCR), mfspr(SPRN_DHDES), mfspr(SPRN_RPR));
1841 printf("dawr = %.16lx dawrx = %.16lx ciabr = %.16lx\n",
1842 mfspr(SPRN_DAWR), mfspr(SPRN_DAWRX), mfspr(SPRN_CIABR));
1843 #endif
1844 }
1845
1846 static void dump_300_sprs(void)
1847 {
1848 #ifdef CONFIG_PPC64
1849 bool hv = mfmsr() & MSR_HV;
1850
1851 if (!cpu_has_feature(CPU_FTR_ARCH_300))
1852 return;
1853
1854 printf("pidr = %.16lx tidr = %.16lx\n",
1855 mfspr(SPRN_PID), mfspr(SPRN_TIDR));
1856 printf("asdr = %.16lx psscr = %.16lx\n",
1857 mfspr(SPRN_ASDR), hv ? mfspr(SPRN_PSSCR)
1858 : mfspr(SPRN_PSSCR_PR));
1859
1860 if (!hv)
1861 return;
1862
1863 printf("ptcr = %.16lx\n",
1864 mfspr(SPRN_PTCR));
1865 #endif
1866 }
1867
1868 static void dump_one_spr(int spr, bool show_unimplemented)
1869 {
1870 unsigned long val;
1871
1872 val = 0xdeadbeef;
1873 if (!read_spr(spr, &val)) {
1874 printf("SPR 0x%03x (%4d) Faulted during read\n", spr, spr);
1875 return;
1876 }
1877
1878 if (val == 0xdeadbeef) {
1879 /* Looks like read was a nop, confirm */
1880 val = 0x0badcafe;
1881 if (!read_spr(spr, &val)) {
1882 printf("SPR 0x%03x (%4d) Faulted during read\n", spr, spr);
1883 return;
1884 }
1885
1886 if (val == 0x0badcafe) {
1887 if (show_unimplemented)
1888 printf("SPR 0x%03x (%4d) Unimplemented\n", spr, spr);
1889 return;
1890 }
1891 }
1892
1893 printf("SPR 0x%03x (%4d) = 0x%lx\n", spr, spr, val);
1894 }
1895
1896 static void super_regs(void)
1897 {
1898 static unsigned long regno;
1899 int cmd;
1900 int spr;
1901
1902 cmd = skipbl();
1903
1904 switch (cmd) {
1905 case '\n': {
1906 unsigned long sp, toc;
1907 asm("mr %0,1" : "=r" (sp) :);
1908 asm("mr %0,2" : "=r" (toc) :);
1909
1910 printf("msr = "REG" sprg0 = "REG"\n",
1911 mfmsr(), mfspr(SPRN_SPRG0));
1912 printf("pvr = "REG" sprg1 = "REG"\n",
1913 mfspr(SPRN_PVR), mfspr(SPRN_SPRG1));
1914 printf("dec = "REG" sprg2 = "REG"\n",
1915 mfspr(SPRN_DEC), mfspr(SPRN_SPRG2));
1916 printf("sp = "REG" sprg3 = "REG"\n", sp, mfspr(SPRN_SPRG3));
1917 printf("toc = "REG" dar = "REG"\n", toc, mfspr(SPRN_DAR));
1918
1919 dump_206_sprs();
1920 dump_207_sprs();
1921 dump_300_sprs();
1922
1923 return;
1924 }
1925 case 'w': {
1926 unsigned long val;
1927 scanhex(&regno);
1928 val = 0;
1929 read_spr(regno, &val);
1930 scanhex(&val);
1931 write_spr(regno, val);
1932 dump_one_spr(regno, true);
1933 break;
1934 }
1935 case 'r':
1936 scanhex(&regno);
1937 dump_one_spr(regno, true);
1938 break;
1939 case 'a':
1940 /* dump ALL SPRs */
1941 for (spr = 1; spr < 1024; ++spr)
1942 dump_one_spr(spr, false);
1943 break;
1944 }
1945
1946 scannl();
1947 }
1948
1949 /*
1950 * Stuff for reading and writing memory safely
1951 */
1952 static int
1953 mread(unsigned long adrs, void *buf, int size)
1954 {
1955 volatile int n;
1956 char *p, *q;
1957
1958 n = 0;
1959 if (setjmp(bus_error_jmp) == 0) {
1960 catch_memory_errors = 1;
1961 sync();
1962 p = (char *)adrs;
1963 q = (char *)buf;
1964 switch (size) {
1965 case 2:
1966 *(u16 *)q = *(u16 *)p;
1967 break;
1968 case 4:
1969 *(u32 *)q = *(u32 *)p;
1970 break;
1971 case 8:
1972 *(u64 *)q = *(u64 *)p;
1973 break;
1974 default:
1975 for( ; n < size; ++n) {
1976 *q++ = *p++;
1977 sync();
1978 }
1979 }
1980 sync();
1981 /* wait a little while to see if we get a machine check */
1982 __delay(200);
1983 n = size;
1984 }
1985 catch_memory_errors = 0;
1986 return n;
1987 }
1988
1989 static int
1990 mwrite(unsigned long adrs, void *buf, int size)
1991 {
1992 volatile int n;
1993 char *p, *q;
1994
1995 n = 0;
1996 if (setjmp(bus_error_jmp) == 0) {
1997 catch_memory_errors = 1;
1998 sync();
1999 p = (char *) adrs;
2000 q = (char *) buf;
2001 switch (size) {
2002 case 2:
2003 *(u16 *)p = *(u16 *)q;
2004 break;
2005 case 4:
2006 *(u32 *)p = *(u32 *)q;
2007 break;
2008 case 8:
2009 *(u64 *)p = *(u64 *)q;
2010 break;
2011 default:
2012 for ( ; n < size; ++n) {
2013 *p++ = *q++;
2014 sync();
2015 }
2016 }
2017 sync();
2018 /* wait a little while to see if we get a machine check */
2019 __delay(200);
2020 n = size;
2021 } else {
2022 printf("*** Error writing address "REG"\n", adrs + n);
2023 }
2024 catch_memory_errors = 0;
2025 return n;
2026 }
2027
2028 static int fault_type;
2029 static int fault_except;
2030 static char *fault_chars[] = { "--", "**", "##" };
2031
2032 static int handle_fault(struct pt_regs *regs)
2033 {
2034 fault_except = TRAP(regs);
2035 switch (TRAP(regs)) {
2036 case 0x200:
2037 fault_type = 0;
2038 break;
2039 case 0x300:
2040 case 0x380:
2041 fault_type = 1;
2042 break;
2043 default:
2044 fault_type = 2;
2045 }
2046
2047 longjmp(bus_error_jmp, 1);
2048
2049 return 0;
2050 }
2051
2052 #define SWAP(a, b, t) ((t) = (a), (a) = (b), (b) = (t))
2053
2054 static void
2055 byterev(unsigned char *val, int size)
2056 {
2057 int t;
2058
2059 switch (size) {
2060 case 2:
2061 SWAP(val[0], val[1], t);
2062 break;
2063 case 4:
2064 SWAP(val[0], val[3], t);
2065 SWAP(val[1], val[2], t);
2066 break;
2067 case 8: /* is there really any use for this? */
2068 SWAP(val[0], val[7], t);
2069 SWAP(val[1], val[6], t);
2070 SWAP(val[2], val[5], t);
2071 SWAP(val[3], val[4], t);
2072 break;
2073 }
2074 }
2075
2076 static int brev;
2077 static int mnoread;
2078
2079 static char *memex_help_string =
2080 "Memory examine command usage:\n"
2081 "m [addr] [flags] examine/change memory\n"
2082 " addr is optional. will start where left off.\n"
2083 " flags may include chars from this set:\n"
2084 " b modify by bytes (default)\n"
2085 " w modify by words (2 byte)\n"
2086 " l modify by longs (4 byte)\n"
2087 " d modify by doubleword (8 byte)\n"
2088 " r toggle reverse byte order mode\n"
2089 " n do not read memory (for i/o spaces)\n"
2090 " . ok to read (default)\n"
2091 "NOTE: flags are saved as defaults\n"
2092 "";
2093
2094 static char *memex_subcmd_help_string =
2095 "Memory examine subcommands:\n"
2096 " hexval write this val to current location\n"
2097 " 'string' write chars from string to this location\n"
2098 " ' increment address\n"
2099 " ^ decrement address\n"
2100 " / increment addr by 0x10. //=0x100, ///=0x1000, etc\n"
2101 " \\ decrement addr by 0x10. \\\\=0x100, \\\\\\=0x1000, etc\n"
2102 " ` clear no-read flag\n"
2103 " ; stay at this addr\n"
2104 " v change to byte mode\n"
2105 " w change to word (2 byte) mode\n"
2106 " l change to long (4 byte) mode\n"
2107 " u change to doubleword (8 byte) mode\n"
2108 " m addr change current addr\n"
2109 " n toggle no-read flag\n"
2110 " r toggle byte reverse flag\n"
2111 " < count back up count bytes\n"
2112 " > count skip forward count bytes\n"
2113 " x exit this mode\n"
2114 "";
2115
2116 static void
2117 memex(void)
2118 {
2119 int cmd, inc, i, nslash;
2120 unsigned long n;
2121 unsigned char val[16];
2122
2123 scanhex((void *)&adrs);
2124 cmd = skipbl();
2125 if (cmd == '?') {
2126 printf(memex_help_string);
2127 return;
2128 } else {
2129 termch = cmd;
2130 }
2131 last_cmd = "m\n";
2132 while ((cmd = skipbl()) != '\n') {
2133 switch( cmd ){
2134 case 'b': size = 1; break;
2135 case 'w': size = 2; break;
2136 case 'l': size = 4; break;
2137 case 'd': size = 8; break;
2138 case 'r': brev = !brev; break;
2139 case 'n': mnoread = 1; break;
2140 case '.': mnoread = 0; break;
2141 }
2142 }
2143 if( size <= 0 )
2144 size = 1;
2145 else if( size > 8 )
2146 size = 8;
2147 for(;;){
2148 if (!mnoread)
2149 n = mread(adrs, val, size);
2150 printf(REG"%c", adrs, brev? 'r': ' ');
2151 if (!mnoread) {
2152 if (brev)
2153 byterev(val, size);
2154 putchar(' ');
2155 for (i = 0; i < n; ++i)
2156 printf("%.2x", val[i]);
2157 for (; i < size; ++i)
2158 printf("%s", fault_chars[fault_type]);
2159 }
2160 putchar(' ');
2161 inc = size;
2162 nslash = 0;
2163 for(;;){
2164 if( scanhex(&n) ){
2165 for (i = 0; i < size; ++i)
2166 val[i] = n >> (i * 8);
2167 if (!brev)
2168 byterev(val, size);
2169 mwrite(adrs, val, size);
2170 inc = size;
2171 }
2172 cmd = skipbl();
2173 if (cmd == '\n')
2174 break;
2175 inc = 0;
2176 switch (cmd) {
2177 case '\'':
2178 for(;;){
2179 n = inchar();
2180 if( n == '\\' )
2181 n = bsesc();
2182 else if( n == '\'' )
2183 break;
2184 for (i = 0; i < size; ++i)
2185 val[i] = n >> (i * 8);
2186 if (!brev)
2187 byterev(val, size);
2188 mwrite(adrs, val, size);
2189 adrs += size;
2190 }
2191 adrs -= size;
2192 inc = size;
2193 break;
2194 case ',':
2195 adrs += size;
2196 break;
2197 case '.':
2198 mnoread = 0;
2199 break;
2200 case ';':
2201 break;
2202 case 'x':
2203 case EOF:
2204 scannl();
2205 return;
2206 case 'b':
2207 case 'v':
2208 size = 1;
2209 break;
2210 case 'w':
2211 size = 2;
2212 break;
2213 case 'l':
2214 size = 4;
2215 break;
2216 case 'u':
2217 size = 8;
2218 break;
2219 case '^':
2220 adrs -= size;
2221 break;
2222 case '/':
2223 if (nslash > 0)
2224 adrs -= 1 << nslash;
2225 else
2226 nslash = 0;
2227 nslash += 4;
2228 adrs += 1 << nslash;
2229 break;
2230 case '\\':
2231 if (nslash < 0)
2232 adrs += 1 << -nslash;
2233 else
2234 nslash = 0;
2235 nslash -= 4;
2236 adrs -= 1 << -nslash;
2237 break;
2238 case 'm':
2239 scanhex((void *)&adrs);
2240 break;
2241 case 'n':
2242 mnoread = 1;
2243 break;
2244 case 'r':
2245 brev = !brev;
2246 break;
2247 case '<':
2248 n = size;
2249 scanhex(&n);
2250 adrs -= n;
2251 break;
2252 case '>':
2253 n = size;
2254 scanhex(&n);
2255 adrs += n;
2256 break;
2257 case '?':
2258 printf(memex_subcmd_help_string);
2259 break;
2260 }
2261 }
2262 adrs += inc;
2263 }
2264 }
2265
2266 static int
2267 bsesc(void)
2268 {
2269 int c;
2270
2271 c = inchar();
2272 switch( c ){
2273 case 'n': c = '\n'; break;
2274 case 'r': c = '\r'; break;
2275 case 'b': c = '\b'; break;
2276 case 't': c = '\t'; break;
2277 }
2278 return c;
2279 }
2280
2281 static void xmon_rawdump (unsigned long adrs, long ndump)
2282 {
2283 long n, m, r, nr;
2284 unsigned char temp[16];
2285
2286 for (n = ndump; n > 0;) {
2287 r = n < 16? n: 16;
2288 nr = mread(adrs, temp, r);
2289 adrs += nr;
2290 for (m = 0; m < r; ++m) {
2291 if (m < nr)
2292 printf("%.2x", temp[m]);
2293 else
2294 printf("%s", fault_chars[fault_type]);
2295 }
2296 n -= r;
2297 if (nr < r)
2298 break;
2299 }
2300 printf("\n");
2301 }
2302
2303 static void dump_tracing(void)
2304 {
2305 int c;
2306
2307 c = inchar();
2308 if (c == 'c')
2309 ftrace_dump(DUMP_ORIG);
2310 else
2311 ftrace_dump(DUMP_ALL);
2312 }
2313
2314 #ifdef CONFIG_PPC64
2315 static void dump_one_paca(int cpu)
2316 {
2317 struct paca_struct *p;
2318 #ifdef CONFIG_PPC_BOOK3S_64
2319 int i = 0;
2320 #endif
2321
2322 if (setjmp(bus_error_jmp) != 0) {
2323 printf("*** Error dumping paca for cpu 0x%x!\n", cpu);
2324 return;
2325 }
2326
2327 catch_memory_errors = 1;
2328 sync();
2329
2330 p = &paca[cpu];
2331
2332 printf("paca for cpu 0x%x @ %p:\n", cpu, p);
2333
2334 printf(" %-*s = %s\n", 20, "possible", cpu_possible(cpu) ? "yes" : "no");
2335 printf(" %-*s = %s\n", 20, "present", cpu_present(cpu) ? "yes" : "no");
2336 printf(" %-*s = %s\n", 20, "online", cpu_online(cpu) ? "yes" : "no");
2337
2338 #define DUMP(paca, name, format) \
2339 printf(" %-*s = %#-*"format"\t(0x%lx)\n", 20, #name, 18, paca->name, \
2340 offsetof(struct paca_struct, name));
2341
2342 DUMP(p, lock_token, "x");
2343 DUMP(p, paca_index, "x");
2344 DUMP(p, kernel_toc, "lx");
2345 DUMP(p, kernelbase, "lx");
2346 DUMP(p, kernel_msr, "lx");
2347 DUMP(p, emergency_sp, "p");
2348 #ifdef CONFIG_PPC_BOOK3S_64
2349 DUMP(p, nmi_emergency_sp, "p");
2350 DUMP(p, mc_emergency_sp, "p");
2351 DUMP(p, in_nmi, "x");
2352 DUMP(p, in_mce, "x");
2353 DUMP(p, hmi_event_available, "x");
2354 #endif
2355 DUMP(p, data_offset, "lx");
2356 DUMP(p, hw_cpu_id, "x");
2357 DUMP(p, cpu_start, "x");
2358 DUMP(p, kexec_state, "x");
2359 #ifdef CONFIG_PPC_BOOK3S_64
2360 for (i = 0; i < SLB_NUM_BOLTED; i++) {
2361 u64 esid, vsid;
2362
2363 if (!p->slb_shadow_ptr)
2364 continue;
2365
2366 esid = be64_to_cpu(p->slb_shadow_ptr->save_area[i].esid);
2367 vsid = be64_to_cpu(p->slb_shadow_ptr->save_area[i].vsid);
2368
2369 if (esid || vsid) {
2370 printf(" slb_shadow[%d]: = 0x%016lx 0x%016lx\n",
2371 i, esid, vsid);
2372 }
2373 }
2374 DUMP(p, vmalloc_sllp, "x");
2375 DUMP(p, slb_cache_ptr, "x");
2376 for (i = 0; i < SLB_CACHE_ENTRIES; i++)
2377 printf(" slb_cache[%d]: = 0x%016lx\n", i, p->slb_cache[i]);
2378 #endif
2379 DUMP(p, dscr_default, "llx");
2380 #ifdef CONFIG_PPC_BOOK3E
2381 DUMP(p, pgd, "p");
2382 DUMP(p, kernel_pgd, "p");
2383 DUMP(p, tcd_ptr, "p");
2384 DUMP(p, mc_kstack, "p");
2385 DUMP(p, crit_kstack, "p");
2386 DUMP(p, dbg_kstack, "p");
2387 #endif
2388 DUMP(p, __current, "p");
2389 DUMP(p, kstack, "lx");
2390 printf(" kstack_base = 0x%016lx\n", p->kstack & ~(THREAD_SIZE - 1));
2391 DUMP(p, stab_rr, "lx");
2392 DUMP(p, saved_r1, "lx");
2393 DUMP(p, trap_save, "x");
2394 DUMP(p, soft_enabled, "x");
2395 DUMP(p, irq_happened, "x");
2396 DUMP(p, io_sync, "x");
2397 DUMP(p, irq_work_pending, "x");
2398 DUMP(p, nap_state_lost, "x");
2399 DUMP(p, sprg_vdso, "llx");
2400
2401 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
2402 DUMP(p, tm_scratch, "llx");
2403 #endif
2404
2405 #ifdef CONFIG_PPC_POWERNV
2406 DUMP(p, core_idle_state_ptr, "p");
2407 DUMP(p, thread_idle_state, "x");
2408 DUMP(p, thread_mask, "x");
2409 DUMP(p, subcore_sibling_mask, "x");
2410 #endif
2411
2412 DUMP(p, accounting.utime, "llx");
2413 DUMP(p, accounting.stime, "llx");
2414 DUMP(p, accounting.utime_scaled, "llx");
2415 DUMP(p, accounting.starttime, "llx");
2416 DUMP(p, accounting.starttime_user, "llx");
2417 DUMP(p, accounting.startspurr, "llx");
2418 DUMP(p, accounting.utime_sspurr, "llx");
2419 DUMP(p, accounting.steal_time, "llx");
2420 #undef DUMP
2421
2422 catch_memory_errors = 0;
2423 sync();
2424 }
2425
2426 static void dump_all_pacas(void)
2427 {
2428 int cpu;
2429
2430 if (num_possible_cpus() == 0) {
2431 printf("No possible cpus, use 'dp #' to dump individual cpus\n");
2432 return;
2433 }
2434
2435 for_each_possible_cpu(cpu)
2436 dump_one_paca(cpu);
2437 }
2438
2439 static void dump_pacas(void)
2440 {
2441 unsigned long num;
2442 int c;
2443
2444 c = inchar();
2445 if (c == 'a') {
2446 dump_all_pacas();
2447 return;
2448 }
2449
2450 termch = c; /* Put c back, it wasn't 'a' */
2451
2452 if (scanhex(&num))
2453 dump_one_paca(num);
2454 else
2455 dump_one_paca(xmon_owner);
2456 }
2457 #endif
2458
2459 #ifdef CONFIG_PPC_POWERNV
2460 static void dump_one_xive(int cpu)
2461 {
2462 unsigned int hwid = get_hard_smp_processor_id(cpu);
2463
2464 opal_xive_dump(XIVE_DUMP_TM_HYP, hwid);
2465 opal_xive_dump(XIVE_DUMP_TM_POOL, hwid);
2466 opal_xive_dump(XIVE_DUMP_TM_OS, hwid);
2467 opal_xive_dump(XIVE_DUMP_TM_USER, hwid);
2468 opal_xive_dump(XIVE_DUMP_VP, hwid);
2469 opal_xive_dump(XIVE_DUMP_EMU_STATE, hwid);
2470
2471 if (setjmp(bus_error_jmp) != 0) {
2472 catch_memory_errors = 0;
2473 printf("*** Error dumping xive on cpu %d\n", cpu);
2474 return;
2475 }
2476
2477 catch_memory_errors = 1;
2478 sync();
2479 xmon_xive_do_dump(cpu);
2480 sync();
2481 __delay(200);
2482 catch_memory_errors = 0;
2483 }
2484
2485 static void dump_all_xives(void)
2486 {
2487 int cpu;
2488
2489 if (num_possible_cpus() == 0) {
2490 printf("No possible cpus, use 'dx #' to dump individual cpus\n");
2491 return;
2492 }
2493
2494 for_each_possible_cpu(cpu)
2495 dump_one_xive(cpu);
2496 }
2497
2498 static void dump_one_xive_irq(u32 num)
2499 {
2500 s64 rc;
2501 __be64 vp;
2502 u8 prio;
2503 __be32 lirq;
2504
2505 rc = opal_xive_get_irq_config(num, &vp, &prio, &lirq);
2506 xmon_printf("IRQ 0x%x config: vp=0x%llx prio=%d lirq=0x%x (rc=%lld)\n",
2507 num, be64_to_cpu(vp), prio, be32_to_cpu(lirq), rc);
2508 }
2509
2510 static void dump_xives(void)
2511 {
2512 unsigned long num;
2513 int c;
2514
2515 if (!xive_enabled()) {
2516 printf("Xive disabled on this system\n");
2517 return;
2518 }
2519
2520 c = inchar();
2521 if (c == 'a') {
2522 dump_all_xives();
2523 return;
2524 } else if (c == 'i') {
2525 if (scanhex(&num))
2526 dump_one_xive_irq(num);
2527 return;
2528 }
2529
2530 termch = c; /* Put c back, it wasn't 'a' */
2531
2532 if (scanhex(&num))
2533 dump_one_xive(num);
2534 else
2535 dump_one_xive(xmon_owner);
2536 }
2537 #endif /* CONFIG_PPC_POWERNV */
2538
2539 static void dump_by_size(unsigned long addr, long count, int size)
2540 {
2541 unsigned char temp[16];
2542 int i, j;
2543 u64 val;
2544
2545 count = ALIGN(count, 16);
2546
2547 for (i = 0; i < count; i += 16, addr += 16) {
2548 printf(REG, addr);
2549
2550 if (mread(addr, temp, 16) != 16) {
2551 printf("\nFaulted reading %d bytes from 0x"REG"\n", 16, addr);
2552 return;
2553 }
2554
2555 for (j = 0; j < 16; j += size) {
2556 putchar(' ');
2557 switch (size) {
2558 case 1: val = temp[j]; break;
2559 case 2: val = *(u16 *)&temp[j]; break;
2560 case 4: val = *(u32 *)&temp[j]; break;
2561 case 8: val = *(u64 *)&temp[j]; break;
2562 default: val = 0;
2563 }
2564
2565 printf("%0*lx", size * 2, val);
2566 }
2567 printf("\n");
2568 }
2569 }
2570
2571 static void
2572 dump(void)
2573 {
2574 static char last[] = { "d?\n" };
2575 int c;
2576
2577 c = inchar();
2578
2579 #ifdef CONFIG_PPC64
2580 if (c == 'p') {
2581 xmon_start_pagination();
2582 dump_pacas();
2583 xmon_end_pagination();
2584 return;
2585 }
2586 #endif
2587 #ifdef CONFIG_PPC_POWERNV
2588 if (c == 'x') {
2589 xmon_start_pagination();
2590 dump_xives();
2591 xmon_end_pagination();
2592 return;
2593 }
2594 #endif
2595
2596 if (c == 't') {
2597 dump_tracing();
2598 return;
2599 }
2600
2601 if (c == '\n')
2602 termch = c;
2603
2604 scanhex((void *)&adrs);
2605 if (termch != '\n')
2606 termch = 0;
2607 if (c == 'i') {
2608 scanhex(&nidump);
2609 if (nidump == 0)
2610 nidump = 16;
2611 else if (nidump > MAX_DUMP)
2612 nidump = MAX_DUMP;
2613 adrs += ppc_inst_dump(adrs, nidump, 1);
2614 last_cmd = "di\n";
2615 } else if (c == 'l') {
2616 dump_log_buf();
2617 } else if (c == 'o') {
2618 dump_opal_msglog();
2619 } else if (c == 'v') {
2620 /* dump virtual to physical translation */
2621 show_pte(adrs);
2622 } else if (c == 'r') {
2623 scanhex(&ndump);
2624 if (ndump == 0)
2625 ndump = 64;
2626 xmon_rawdump(adrs, ndump);
2627 adrs += ndump;
2628 last_cmd = "dr\n";
2629 } else {
2630 scanhex(&ndump);
2631 if (ndump == 0)
2632 ndump = 64;
2633 else if (ndump > MAX_DUMP)
2634 ndump = MAX_DUMP;
2635
2636 switch (c) {
2637 case '8':
2638 case '4':
2639 case '2':
2640 case '1':
2641 ndump = ALIGN(ndump, 16);
2642 dump_by_size(adrs, ndump, c - '0');
2643 last[1] = c;
2644 last_cmd = last;
2645 break;
2646 default:
2647 prdump(adrs, ndump);
2648 last_cmd = "d\n";
2649 }
2650
2651 adrs += ndump;
2652 }
2653 }
2654
2655 static void
2656 prdump(unsigned long adrs, long ndump)
2657 {
2658 long n, m, c, r, nr;
2659 unsigned char temp[16];
2660
2661 for (n = ndump; n > 0;) {
2662 printf(REG, adrs);
2663 putchar(' ');
2664 r = n < 16? n: 16;
2665 nr = mread(adrs, temp, r);
2666 adrs += nr;
2667 for (m = 0; m < r; ++m) {
2668 if ((m & (sizeof(long) - 1)) == 0 && m > 0)
2669 putchar(' ');
2670 if (m < nr)
2671 printf("%.2x", temp[m]);
2672 else
2673 printf("%s", fault_chars[fault_type]);
2674 }
2675 for (; m < 16; ++m) {
2676 if ((m & (sizeof(long) - 1)) == 0)
2677 putchar(' ');
2678 printf(" ");
2679 }
2680 printf(" |");
2681 for (m = 0; m < r; ++m) {
2682 if (m < nr) {
2683 c = temp[m];
2684 putchar(' ' <= c && c <= '~'? c: '.');
2685 } else
2686 putchar(' ');
2687 }
2688 n -= r;
2689 for (; m < 16; ++m)
2690 putchar(' ');
2691 printf("|\n");
2692 if (nr < r)
2693 break;
2694 }
2695 }
2696
2697 typedef int (*instruction_dump_func)(unsigned long inst, unsigned long addr);
2698
2699 static int
2700 generic_inst_dump(unsigned long adr, long count, int praddr,
2701 instruction_dump_func dump_func)
2702 {
2703 int nr, dotted;
2704 unsigned long first_adr;
2705 unsigned long inst, last_inst = 0;
2706 unsigned char val[4];
2707
2708 dotted = 0;
2709 for (first_adr = adr; count > 0; --count, adr += 4) {
2710 nr = mread(adr, val, 4);
2711 if (nr == 0) {
2712 if (praddr) {
2713 const char *x = fault_chars[fault_type];
2714 printf(REG" %s%s%s%s\n", adr, x, x, x, x);
2715 }
2716 break;
2717 }
2718 inst = GETWORD(val);
2719 if (adr > first_adr && inst == last_inst) {
2720 if (!dotted) {
2721 printf(" ...\n");
2722 dotted = 1;
2723 }
2724 continue;
2725 }
2726 dotted = 0;
2727 last_inst = inst;
2728 if (praddr)
2729 printf(REG" %.8x", adr, inst);
2730 printf("\t");
2731 dump_func(inst, adr);
2732 printf("\n");
2733 }
2734 return adr - first_adr;
2735 }
2736
2737 static int
2738 ppc_inst_dump(unsigned long adr, long count, int praddr)
2739 {
2740 return generic_inst_dump(adr, count, praddr, print_insn_powerpc);
2741 }
2742
2743 void
2744 print_address(unsigned long addr)
2745 {
2746 xmon_print_symbol(addr, "\t# ", "");
2747 }
2748
2749 void
2750 dump_log_buf(void)
2751 {
2752 struct kmsg_dumper dumper = { .active = 1 };
2753 unsigned char buf[128];
2754 size_t len;
2755
2756 if (setjmp(bus_error_jmp) != 0) {
2757 printf("Error dumping printk buffer!\n");
2758 return;
2759 }
2760
2761 catch_memory_errors = 1;
2762 sync();
2763
2764 kmsg_dump_rewind_nolock(&dumper);
2765 xmon_start_pagination();
2766 while (kmsg_dump_get_line_nolock(&dumper, false, buf, sizeof(buf), &len)) {
2767 buf[len] = '\0';
2768 printf("%s", buf);
2769 }
2770 xmon_end_pagination();
2771
2772 sync();
2773 /* wait a little while to see if we get a machine check */
2774 __delay(200);
2775 catch_memory_errors = 0;
2776 }
2777
2778 #ifdef CONFIG_PPC_POWERNV
2779 static void dump_opal_msglog(void)
2780 {
2781 unsigned char buf[128];
2782 ssize_t res;
2783 loff_t pos = 0;
2784
2785 if (!firmware_has_feature(FW_FEATURE_OPAL)) {
2786 printf("Machine is not running OPAL firmware.\n");
2787 return;
2788 }
2789
2790 if (setjmp(bus_error_jmp) != 0) {
2791 printf("Error dumping OPAL msglog!\n");
2792 return;
2793 }
2794
2795 catch_memory_errors = 1;
2796 sync();
2797
2798 xmon_start_pagination();
2799 while ((res = opal_msglog_copy(buf, pos, sizeof(buf) - 1))) {
2800 if (res < 0) {
2801 printf("Error dumping OPAL msglog! Error: %zd\n", res);
2802 break;
2803 }
2804 buf[res] = '\0';
2805 printf("%s", buf);
2806 pos += res;
2807 }
2808 xmon_end_pagination();
2809
2810 sync();
2811 /* wait a little while to see if we get a machine check */
2812 __delay(200);
2813 catch_memory_errors = 0;
2814 }
2815 #endif
2816
2817 /*
2818 * Memory operations - move, set, print differences
2819 */
2820 static unsigned long mdest; /* destination address */
2821 static unsigned long msrc; /* source address */
2822 static unsigned long mval; /* byte value to set memory to */
2823 static unsigned long mcount; /* # bytes to affect */
2824 static unsigned long mdiffs; /* max # differences to print */
2825
2826 static void
2827 memops(int cmd)
2828 {
2829 scanhex((void *)&mdest);
2830 if( termch != '\n' )
2831 termch = 0;
2832 scanhex((void *)(cmd == 's'? &mval: &msrc));
2833 if( termch != '\n' )
2834 termch = 0;
2835 scanhex((void *)&mcount);
2836 switch( cmd ){
2837 case 'm':
2838 memmove((void *)mdest, (void *)msrc, mcount);
2839 break;
2840 case 's':
2841 memset((void *)mdest, mval, mcount);
2842 break;
2843 case 'd':
2844 if( termch != '\n' )
2845 termch = 0;
2846 scanhex((void *)&mdiffs);
2847 memdiffs((unsigned char *)mdest, (unsigned char *)msrc, mcount, mdiffs);
2848 break;
2849 }
2850 }
2851
2852 static void
2853 memdiffs(unsigned char *p1, unsigned char *p2, unsigned nb, unsigned maxpr)
2854 {
2855 unsigned n, prt;
2856
2857 prt = 0;
2858 for( n = nb; n > 0; --n )
2859 if( *p1++ != *p2++ )
2860 if( ++prt <= maxpr )
2861 printf("%.16x %.2x # %.16x %.2x\n", p1 - 1,
2862 p1[-1], p2 - 1, p2[-1]);
2863 if( prt > maxpr )
2864 printf("Total of %d differences\n", prt);
2865 }
2866
2867 static unsigned mend;
2868 static unsigned mask;
2869
2870 static void
2871 memlocate(void)
2872 {
2873 unsigned a, n;
2874 unsigned char val[4];
2875
2876 last_cmd = "ml";
2877 scanhex((void *)&mdest);
2878 if (termch != '\n') {
2879 termch = 0;
2880 scanhex((void *)&mend);
2881 if (termch != '\n') {
2882 termch = 0;
2883 scanhex((void *)&mval);
2884 mask = ~0;
2885 if (termch != '\n') termch = 0;
2886 scanhex((void *)&mask);
2887 }
2888 }
2889 n = 0;
2890 for (a = mdest; a < mend; a += 4) {
2891 if (mread(a, val, 4) == 4
2892 && ((GETWORD(val) ^ mval) & mask) == 0) {
2893 printf("%.16x: %.16x\n", a, GETWORD(val));
2894 if (++n >= 10)
2895 break;
2896 }
2897 }
2898 }
2899
2900 static unsigned long mskip = 0x1000;
2901 static unsigned long mlim = 0xffffffff;
2902
2903 static void
2904 memzcan(void)
2905 {
2906 unsigned char v;
2907 unsigned a;
2908 int ok, ook;
2909
2910 scanhex(&mdest);
2911 if (termch != '\n') termch = 0;
2912 scanhex(&mskip);
2913 if (termch != '\n') termch = 0;
2914 scanhex(&mlim);
2915 ook = 0;
2916 for (a = mdest; a < mlim; a += mskip) {
2917 ok = mread(a, &v, 1);
2918 if (ok && !ook) {
2919 printf("%.8x .. ", a);
2920 } else if (!ok && ook)
2921 printf("%.8x\n", a - mskip);
2922 ook = ok;
2923 if (a + mskip < a)
2924 break;
2925 }
2926 if (ook)
2927 printf("%.8x\n", a - mskip);
2928 }
2929
2930 static void show_task(struct task_struct *tsk)
2931 {
2932 char state;
2933
2934 /*
2935 * Cloned from kdb_task_state_char(), which is not entirely
2936 * appropriate for calling from xmon. This could be moved
2937 * to a common, generic, routine used by both.
2938 */
2939 state = (tsk->state == 0) ? 'R' :
2940 (tsk->state < 0) ? 'U' :
2941 (tsk->state & TASK_UNINTERRUPTIBLE) ? 'D' :
2942 (tsk->state & TASK_STOPPED) ? 'T' :
2943 (tsk->state & TASK_TRACED) ? 'C' :
2944 (tsk->exit_state & EXIT_ZOMBIE) ? 'Z' :
2945 (tsk->exit_state & EXIT_DEAD) ? 'E' :
2946 (tsk->state & TASK_INTERRUPTIBLE) ? 'S' : '?';
2947
2948 printf("%p %016lx %6d %6d %c %2d %s\n", tsk,
2949 tsk->thread.ksp,
2950 tsk->pid, tsk->parent->pid,
2951 state, task_thread_info(tsk)->cpu,
2952 tsk->comm);
2953 }
2954
2955 #ifdef CONFIG_PPC_BOOK3S_64
2956 void format_pte(void *ptep, unsigned long pte)
2957 {
2958 printf("ptep @ 0x%016lx = 0x%016lx\n", (unsigned long)ptep, pte);
2959 printf("Maps physical address = 0x%016lx\n", pte & PTE_RPN_MASK);
2960
2961 printf("Flags = %s%s%s%s%s\n",
2962 (pte & _PAGE_ACCESSED) ? "Accessed " : "",
2963 (pte & _PAGE_DIRTY) ? "Dirty " : "",
2964 (pte & _PAGE_READ) ? "Read " : "",
2965 (pte & _PAGE_WRITE) ? "Write " : "",
2966 (pte & _PAGE_EXEC) ? "Exec " : "");
2967 }
2968
2969 static void show_pte(unsigned long addr)
2970 {
2971 unsigned long tskv = 0;
2972 struct task_struct *tsk = NULL;
2973 struct mm_struct *mm;
2974 pgd_t *pgdp, *pgdir;
2975 pud_t *pudp;
2976 pmd_t *pmdp;
2977 pte_t *ptep;
2978
2979 if (!scanhex(&tskv))
2980 mm = &init_mm;
2981 else
2982 tsk = (struct task_struct *)tskv;
2983
2984 if (tsk == NULL)
2985 mm = &init_mm;
2986 else
2987 mm = tsk->active_mm;
2988
2989 if (setjmp(bus_error_jmp) != 0) {
2990 catch_memory_errors = 0;
2991 printf("*** Error dumping pte for task %p\n", tsk);
2992 return;
2993 }
2994
2995 catch_memory_errors = 1;
2996 sync();
2997
2998 if (mm == &init_mm) {
2999 pgdp = pgd_offset_k(addr);
3000 pgdir = pgd_offset_k(0);
3001 } else {
3002 pgdp = pgd_offset(mm, addr);
3003 pgdir = pgd_offset(mm, 0);
3004 }
3005
3006 if (pgd_none(*pgdp)) {
3007 printf("no linux page table for address\n");
3008 return;
3009 }
3010
3011 printf("pgd @ 0x%016lx\n", pgdir);
3012
3013 if (pgd_huge(*pgdp)) {
3014 format_pte(pgdp, pgd_val(*pgdp));
3015 return;
3016 }
3017 printf("pgdp @ 0x%016lx = 0x%016lx\n", pgdp, pgd_val(*pgdp));
3018
3019 pudp = pud_offset(pgdp, addr);
3020
3021 if (pud_none(*pudp)) {
3022 printf("No valid PUD\n");
3023 return;
3024 }
3025
3026 if (pud_huge(*pudp)) {
3027 format_pte(pudp, pud_val(*pudp));
3028 return;
3029 }
3030
3031 printf("pudp @ 0x%016lx = 0x%016lx\n", pudp, pud_val(*pudp));
3032
3033 pmdp = pmd_offset(pudp, addr);
3034
3035 if (pmd_none(*pmdp)) {
3036 printf("No valid PMD\n");
3037 return;
3038 }
3039
3040 if (pmd_huge(*pmdp)) {
3041 format_pte(pmdp, pmd_val(*pmdp));
3042 return;
3043 }
3044 printf("pmdp @ 0x%016lx = 0x%016lx\n", pmdp, pmd_val(*pmdp));
3045
3046 ptep = pte_offset_map(pmdp, addr);
3047 if (pte_none(*ptep)) {
3048 printf("no valid PTE\n");
3049 return;
3050 }
3051
3052 format_pte(ptep, pte_val(*ptep));
3053
3054 sync();
3055 __delay(200);
3056 catch_memory_errors = 0;
3057 }
3058 #else
3059 static void show_pte(unsigned long addr)
3060 {
3061 printf("show_pte not yet implemented\n");
3062 }
3063 #endif /* CONFIG_PPC_BOOK3S_64 */
3064
3065 static void show_tasks(void)
3066 {
3067 unsigned long tskv;
3068 struct task_struct *tsk = NULL;
3069
3070 printf(" task_struct ->thread.ksp PID PPID S P CMD\n");
3071
3072 if (scanhex(&tskv))
3073 tsk = (struct task_struct *)tskv;
3074
3075 if (setjmp(bus_error_jmp) != 0) {
3076 catch_memory_errors = 0;
3077 printf("*** Error dumping task %p\n", tsk);
3078 return;
3079 }
3080
3081 catch_memory_errors = 1;
3082 sync();
3083
3084 if (tsk)
3085 show_task(tsk);
3086 else
3087 for_each_process(tsk)
3088 show_task(tsk);
3089
3090 sync();
3091 __delay(200);
3092 catch_memory_errors = 0;
3093 }
3094
3095 static void proccall(void)
3096 {
3097 unsigned long args[8];
3098 unsigned long ret;
3099 int i;
3100 typedef unsigned long (*callfunc_t)(unsigned long, unsigned long,
3101 unsigned long, unsigned long, unsigned long,
3102 unsigned long, unsigned long, unsigned long);
3103 callfunc_t func;
3104
3105 if (!scanhex(&adrs))
3106 return;
3107 if (termch != '\n')
3108 termch = 0;
3109 for (i = 0; i < 8; ++i)
3110 args[i] = 0;
3111 for (i = 0; i < 8; ++i) {
3112 if (!scanhex(&args[i]) || termch == '\n')
3113 break;
3114 termch = 0;
3115 }
3116 func = (callfunc_t) adrs;
3117 ret = 0;
3118 if (setjmp(bus_error_jmp) == 0) {
3119 catch_memory_errors = 1;
3120 sync();
3121 ret = func(args[0], args[1], args[2], args[3],
3122 args[4], args[5], args[6], args[7]);
3123 sync();
3124 printf("return value is 0x%lx\n", ret);
3125 } else {
3126 printf("*** %x exception occurred\n", fault_except);
3127 }
3128 catch_memory_errors = 0;
3129 }
3130
3131 /* Input scanning routines */
3132 int
3133 skipbl(void)
3134 {
3135 int c;
3136
3137 if( termch != 0 ){
3138 c = termch;
3139 termch = 0;
3140 } else
3141 c = inchar();
3142 while( c == ' ' || c == '\t' )
3143 c = inchar();
3144 return c;
3145 }
3146
3147 #define N_PTREGS 44
3148 static char *regnames[N_PTREGS] = {
3149 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3150 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
3151 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
3152 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
3153 "pc", "msr", "or3", "ctr", "lr", "xer", "ccr",
3154 #ifdef CONFIG_PPC64
3155 "softe",
3156 #else
3157 "mq",
3158 #endif
3159 "trap", "dar", "dsisr", "res"
3160 };
3161
3162 int
3163 scanhex(unsigned long *vp)
3164 {
3165 int c, d;
3166 unsigned long v;
3167
3168 c = skipbl();
3169 if (c == '%') {
3170 /* parse register name */
3171 char regname[8];
3172 int i;
3173
3174 for (i = 0; i < sizeof(regname) - 1; ++i) {
3175 c = inchar();
3176 if (!isalnum(c)) {
3177 termch = c;
3178 break;
3179 }
3180 regname[i] = c;
3181 }
3182 regname[i] = 0;
3183 for (i = 0; i < N_PTREGS; ++i) {
3184 if (strcmp(regnames[i], regname) == 0) {
3185 if (xmon_regs == NULL) {
3186 printf("regs not available\n");
3187 return 0;
3188 }
3189 *vp = ((unsigned long *)xmon_regs)[i];
3190 return 1;
3191 }
3192 }
3193 printf("invalid register name '%%%s'\n", regname);
3194 return 0;
3195 }
3196
3197 /* skip leading "0x" if any */
3198
3199 if (c == '0') {
3200 c = inchar();
3201 if (c == 'x') {
3202 c = inchar();
3203 } else {
3204 d = hexdigit(c);
3205 if (d == EOF) {
3206 termch = c;
3207 *vp = 0;
3208 return 1;
3209 }
3210 }
3211 } else if (c == '$') {
3212 int i;
3213 for (i=0; i<63; i++) {
3214 c = inchar();
3215 if (isspace(c) || c == '\0') {
3216 termch = c;
3217 break;
3218 }
3219 tmpstr[i] = c;
3220 }
3221 tmpstr[i++] = 0;
3222 *vp = 0;
3223 if (setjmp(bus_error_jmp) == 0) {
3224 catch_memory_errors = 1;
3225 sync();
3226 *vp = kallsyms_lookup_name(tmpstr);
3227 sync();
3228 }
3229 catch_memory_errors = 0;
3230 if (!(*vp)) {
3231 printf("unknown symbol '%s'\n", tmpstr);
3232 return 0;
3233 }
3234 return 1;
3235 }
3236
3237 d = hexdigit(c);
3238 if (d == EOF) {
3239 termch = c;
3240 return 0;
3241 }
3242 v = 0;
3243 do {
3244 v = (v << 4) + d;
3245 c = inchar();
3246 d = hexdigit(c);
3247 } while (d != EOF);
3248 termch = c;
3249 *vp = v;
3250 return 1;
3251 }
3252
3253 static void
3254 scannl(void)
3255 {
3256 int c;
3257
3258 c = termch;
3259 termch = 0;
3260 while( c != '\n' )
3261 c = inchar();
3262 }
3263
3264 static int hexdigit(int c)
3265 {
3266 if( '0' <= c && c <= '9' )
3267 return c - '0';
3268 if( 'A' <= c && c <= 'F' )
3269 return c - ('A' - 10);
3270 if( 'a' <= c && c <= 'f' )
3271 return c - ('a' - 10);
3272 return EOF;
3273 }
3274
3275 void
3276 getstring(char *s, int size)
3277 {
3278 int c;
3279
3280 c = skipbl();
3281 do {
3282 if( size > 1 ){
3283 *s++ = c;
3284 --size;
3285 }
3286 c = inchar();
3287 } while( c != ' ' && c != '\t' && c != '\n' );
3288 termch = c;
3289 *s = 0;
3290 }
3291
3292 static char line[256];
3293 static char *lineptr;
3294
3295 static void
3296 flush_input(void)
3297 {
3298 lineptr = NULL;
3299 }
3300
3301 static int
3302 inchar(void)
3303 {
3304 if (lineptr == NULL || *lineptr == 0) {
3305 if (xmon_gets(line, sizeof(line)) == NULL) {
3306 lineptr = NULL;
3307 return EOF;
3308 }
3309 lineptr = line;
3310 }
3311 return *lineptr++;
3312 }
3313
3314 static void
3315 take_input(char *str)
3316 {
3317 lineptr = str;
3318 }
3319
3320
3321 static void
3322 symbol_lookup(void)
3323 {
3324 int type = inchar();
3325 unsigned long addr;
3326 static char tmp[64];
3327
3328 switch (type) {
3329 case 'a':
3330 if (scanhex(&addr))
3331 xmon_print_symbol(addr, ": ", "\n");
3332 termch = 0;
3333 break;
3334 case 's':
3335 getstring(tmp, 64);
3336 if (setjmp(bus_error_jmp) == 0) {
3337 catch_memory_errors = 1;
3338 sync();
3339 addr = kallsyms_lookup_name(tmp);
3340 if (addr)
3341 printf("%s: %lx\n", tmp, addr);
3342 else
3343 printf("Symbol '%s' not found.\n", tmp);
3344 sync();
3345 }
3346 catch_memory_errors = 0;
3347 termch = 0;
3348 break;
3349 }
3350 }
3351
3352
3353 /* Print an address in numeric and symbolic form (if possible) */
3354 static void xmon_print_symbol(unsigned long address, const char *mid,
3355 const char *after)
3356 {
3357 char *modname;
3358 const char *name = NULL;
3359 unsigned long offset, size;
3360
3361 printf(REG, address);
3362 if (setjmp(bus_error_jmp) == 0) {
3363 catch_memory_errors = 1;
3364 sync();
3365 name = kallsyms_lookup(address, &size, &offset, &modname,
3366 tmpstr);
3367 sync();
3368 /* wait a little while to see if we get a machine check */
3369 __delay(200);
3370 }
3371
3372 catch_memory_errors = 0;
3373
3374 if (name) {
3375 printf("%s%s+%#lx/%#lx", mid, name, offset, size);
3376 if (modname)
3377 printf(" [%s]", modname);
3378 }
3379 printf("%s", after);
3380 }
3381
3382 #ifdef CONFIG_PPC_BOOK3S_64
3383 void dump_segments(void)
3384 {
3385 int i;
3386 unsigned long esid,vsid;
3387 unsigned long llp;
3388
3389 printf("SLB contents of cpu 0x%x\n", smp_processor_id());
3390
3391 for (i = 0; i < mmu_slb_size; i++) {
3392 asm volatile("slbmfee %0,%1" : "=r" (esid) : "r" (i));
3393 asm volatile("slbmfev %0,%1" : "=r" (vsid) : "r" (i));
3394
3395 if (!esid && !vsid)
3396 continue;
3397
3398 printf("%02d %016lx %016lx", i, esid, vsid);
3399
3400 if (!(esid & SLB_ESID_V)) {
3401 printf("\n");
3402 continue;
3403 }
3404
3405 llp = vsid & SLB_VSID_LLP;
3406 if (vsid & SLB_VSID_B_1T) {
3407 printf(" 1T ESID=%9lx VSID=%13lx LLP:%3lx \n",
3408 GET_ESID_1T(esid),
3409 (vsid & ~SLB_VSID_B) >> SLB_VSID_SHIFT_1T,
3410 llp);
3411 } else {
3412 printf(" 256M ESID=%9lx VSID=%13lx LLP:%3lx \n",
3413 GET_ESID(esid),
3414 (vsid & ~SLB_VSID_B) >> SLB_VSID_SHIFT,
3415 llp);
3416 }
3417 }
3418 }
3419 #endif
3420
3421 #ifdef CONFIG_PPC_STD_MMU_32
3422 void dump_segments(void)
3423 {
3424 int i;
3425
3426 printf("sr0-15 =");
3427 for (i = 0; i < 16; ++i)
3428 printf(" %x", mfsrin(i));
3429 printf("\n");
3430 }
3431 #endif
3432
3433 #ifdef CONFIG_44x
3434 static void dump_tlb_44x(void)
3435 {
3436 int i;
3437
3438 for (i = 0; i < PPC44x_TLB_SIZE; i++) {
3439 unsigned long w0,w1,w2;
3440 asm volatile("tlbre %0,%1,0" : "=r" (w0) : "r" (i));
3441 asm volatile("tlbre %0,%1,1" : "=r" (w1) : "r" (i));
3442 asm volatile("tlbre %0,%1,2" : "=r" (w2) : "r" (i));
3443 printf("[%02x] %08x %08x %08x ", i, w0, w1, w2);
3444 if (w0 & PPC44x_TLB_VALID) {
3445 printf("V %08x -> %01x%08x %c%c%c%c%c",
3446 w0 & PPC44x_TLB_EPN_MASK,
3447 w1 & PPC44x_TLB_ERPN_MASK,
3448 w1 & PPC44x_TLB_RPN_MASK,
3449 (w2 & PPC44x_TLB_W) ? 'W' : 'w',
3450 (w2 & PPC44x_TLB_I) ? 'I' : 'i',
3451 (w2 & PPC44x_TLB_M) ? 'M' : 'm',
3452 (w2 & PPC44x_TLB_G) ? 'G' : 'g',
3453 (w2 & PPC44x_TLB_E) ? 'E' : 'e');
3454 }
3455 printf("\n");
3456 }
3457 }
3458 #endif /* CONFIG_44x */
3459
3460 #ifdef CONFIG_PPC_BOOK3E
3461 static void dump_tlb_book3e(void)
3462 {
3463 u32 mmucfg, pidmask, lpidmask;
3464 u64 ramask;
3465 int i, tlb, ntlbs, pidsz, lpidsz, rasz, lrat = 0;
3466 int mmu_version;
3467 static const char *pgsz_names[] = {
3468 " 1K",
3469 " 2K",
3470 " 4K",
3471 " 8K",
3472 " 16K",
3473 " 32K",
3474 " 64K",
3475 "128K",
3476 "256K",
3477 "512K",
3478 " 1M",
3479 " 2M",
3480 " 4M",
3481 " 8M",
3482 " 16M",
3483 " 32M",
3484 " 64M",
3485 "128M",
3486 "256M",
3487 "512M",
3488 " 1G",
3489 " 2G",
3490 " 4G",
3491 " 8G",
3492 " 16G",
3493 " 32G",
3494 " 64G",
3495 "128G",
3496 "256G",
3497 "512G",
3498 " 1T",
3499 " 2T",
3500 };
3501
3502 /* Gather some infos about the MMU */
3503 mmucfg = mfspr(SPRN_MMUCFG);
3504 mmu_version = (mmucfg & 3) + 1;
3505 ntlbs = ((mmucfg >> 2) & 3) + 1;
3506 pidsz = ((mmucfg >> 6) & 0x1f) + 1;
3507 lpidsz = (mmucfg >> 24) & 0xf;
3508 rasz = (mmucfg >> 16) & 0x7f;
3509 if ((mmu_version > 1) && (mmucfg & 0x10000))
3510 lrat = 1;
3511 printf("Book3E MMU MAV=%d.0,%d TLBs,%d-bit PID,%d-bit LPID,%d-bit RA\n",
3512 mmu_version, ntlbs, pidsz, lpidsz, rasz);
3513 pidmask = (1ul << pidsz) - 1;
3514 lpidmask = (1ul << lpidsz) - 1;
3515 ramask = (1ull << rasz) - 1;
3516
3517 for (tlb = 0; tlb < ntlbs; tlb++) {
3518 u32 tlbcfg;
3519 int nent, assoc, new_cc = 1;
3520 printf("TLB %d:\n------\n", tlb);
3521 switch(tlb) {
3522 case 0:
3523 tlbcfg = mfspr(SPRN_TLB0CFG);
3524 break;
3525 case 1:
3526 tlbcfg = mfspr(SPRN_TLB1CFG);
3527 break;
3528 case 2:
3529 tlbcfg = mfspr(SPRN_TLB2CFG);
3530 break;
3531 case 3:
3532 tlbcfg = mfspr(SPRN_TLB3CFG);
3533 break;
3534 default:
3535 printf("Unsupported TLB number !\n");
3536 continue;
3537 }
3538 nent = tlbcfg & 0xfff;
3539 assoc = (tlbcfg >> 24) & 0xff;
3540 for (i = 0; i < nent; i++) {
3541 u32 mas0 = MAS0_TLBSEL(tlb);
3542 u32 mas1 = MAS1_TSIZE(BOOK3E_PAGESZ_4K);
3543 u64 mas2 = 0;
3544 u64 mas7_mas3;
3545 int esel = i, cc = i;
3546
3547 if (assoc != 0) {
3548 cc = i / assoc;
3549 esel = i % assoc;
3550 mas2 = cc * 0x1000;
3551 }
3552
3553 mas0 |= MAS0_ESEL(esel);
3554 mtspr(SPRN_MAS0, mas0);
3555 mtspr(SPRN_MAS1, mas1);
3556 mtspr(SPRN_MAS2, mas2);
3557 asm volatile("tlbre 0,0,0" : : : "memory");
3558 mas1 = mfspr(SPRN_MAS1);
3559 mas2 = mfspr(SPRN_MAS2);
3560 mas7_mas3 = mfspr(SPRN_MAS7_MAS3);
3561 if (assoc && (i % assoc) == 0)
3562 new_cc = 1;
3563 if (!(mas1 & MAS1_VALID))
3564 continue;
3565 if (assoc == 0)
3566 printf("%04x- ", i);
3567 else if (new_cc)
3568 printf("%04x-%c", cc, 'A' + esel);
3569 else
3570 printf(" |%c", 'A' + esel);
3571 new_cc = 0;
3572 printf(" %016llx %04x %s %c%c AS%c",
3573 mas2 & ~0x3ffull,
3574 (mas1 >> 16) & 0x3fff,
3575 pgsz_names[(mas1 >> 7) & 0x1f],
3576 mas1 & MAS1_IND ? 'I' : ' ',
3577 mas1 & MAS1_IPROT ? 'P' : ' ',
3578 mas1 & MAS1_TS ? '1' : '0');
3579 printf(" %c%c%c%c%c%c%c",
3580 mas2 & MAS2_X0 ? 'a' : ' ',
3581 mas2 & MAS2_X1 ? 'v' : ' ',
3582 mas2 & MAS2_W ? 'w' : ' ',
3583 mas2 & MAS2_I ? 'i' : ' ',
3584 mas2 & MAS2_M ? 'm' : ' ',
3585 mas2 & MAS2_G ? 'g' : ' ',
3586 mas2 & MAS2_E ? 'e' : ' ');
3587 printf(" %016llx", mas7_mas3 & ramask & ~0x7ffull);
3588 if (mas1 & MAS1_IND)
3589 printf(" %s\n",
3590 pgsz_names[(mas7_mas3 >> 1) & 0x1f]);
3591 else
3592 printf(" U%c%c%c S%c%c%c\n",
3593 mas7_mas3 & MAS3_UX ? 'x' : ' ',
3594 mas7_mas3 & MAS3_UW ? 'w' : ' ',
3595 mas7_mas3 & MAS3_UR ? 'r' : ' ',
3596 mas7_mas3 & MAS3_SX ? 'x' : ' ',
3597 mas7_mas3 & MAS3_SW ? 'w' : ' ',
3598 mas7_mas3 & MAS3_SR ? 'r' : ' ');
3599 }
3600 }
3601 }
3602 #endif /* CONFIG_PPC_BOOK3E */
3603
3604 static void xmon_init(int enable)
3605 {
3606 if (enable) {
3607 __debugger = xmon;
3608 __debugger_ipi = xmon_ipi;
3609 __debugger_bpt = xmon_bpt;
3610 __debugger_sstep = xmon_sstep;
3611 __debugger_iabr_match = xmon_iabr_match;
3612 __debugger_break_match = xmon_break_match;
3613 __debugger_fault_handler = xmon_fault_handler;
3614 } else {
3615 __debugger = NULL;
3616 __debugger_ipi = NULL;
3617 __debugger_bpt = NULL;
3618 __debugger_sstep = NULL;
3619 __debugger_iabr_match = NULL;
3620 __debugger_break_match = NULL;
3621 __debugger_fault_handler = NULL;
3622 }
3623 }
3624
3625 #ifdef CONFIG_MAGIC_SYSRQ
3626 static void sysrq_handle_xmon(int key)
3627 {
3628 /* ensure xmon is enabled */
3629 xmon_init(1);
3630 debugger(get_irq_regs());
3631 if (!xmon_on)
3632 xmon_init(0);
3633 }
3634
3635 static struct sysrq_key_op sysrq_xmon_op = {
3636 .handler = sysrq_handle_xmon,
3637 .help_msg = "xmon(x)",
3638 .action_msg = "Entering xmon",
3639 };
3640
3641 static int __init setup_xmon_sysrq(void)
3642 {
3643 register_sysrq_key('x', &sysrq_xmon_op);
3644 return 0;
3645 }
3646 device_initcall(setup_xmon_sysrq);
3647 #endif /* CONFIG_MAGIC_SYSRQ */
3648
3649 #ifdef CONFIG_DEBUG_FS
3650 static int xmon_dbgfs_set(void *data, u64 val)
3651 {
3652 xmon_on = !!val;
3653 xmon_init(xmon_on);
3654
3655 return 0;
3656 }
3657
3658 static int xmon_dbgfs_get(void *data, u64 *val)
3659 {
3660 *val = xmon_on;
3661 return 0;
3662 }
3663
3664 DEFINE_SIMPLE_ATTRIBUTE(xmon_dbgfs_ops, xmon_dbgfs_get,
3665 xmon_dbgfs_set, "%llu\n");
3666
3667 static int __init setup_xmon_dbgfs(void)
3668 {
3669 debugfs_create_file("xmon", 0600, powerpc_debugfs_root, NULL,
3670 &xmon_dbgfs_ops);
3671 return 0;
3672 }
3673 device_initcall(setup_xmon_dbgfs);
3674 #endif /* CONFIG_DEBUG_FS */
3675
3676 static int xmon_early __initdata;
3677
3678 static int __init early_parse_xmon(char *p)
3679 {
3680 if (!p || strncmp(p, "early", 5) == 0) {
3681 /* just "xmon" is equivalent to "xmon=early" */
3682 xmon_init(1);
3683 xmon_early = 1;
3684 xmon_on = 1;
3685 } else if (strncmp(p, "on", 2) == 0) {
3686 xmon_init(1);
3687 xmon_on = 1;
3688 } else if (strncmp(p, "off", 3) == 0)
3689 xmon_on = 0;
3690 else
3691 return 1;
3692
3693 return 0;
3694 }
3695 early_param("xmon", early_parse_xmon);
3696
3697 void __init xmon_setup(void)
3698 {
3699 if (xmon_on)
3700 xmon_init(1);
3701 if (xmon_early)
3702 debugger(NULL);
3703 }
3704
3705 #ifdef CONFIG_SPU_BASE
3706
3707 struct spu_info {
3708 struct spu *spu;
3709 u64 saved_mfc_sr1_RW;
3710 u32 saved_spu_runcntl_RW;
3711 unsigned long dump_addr;
3712 u8 stopped_ok;
3713 };
3714
3715 #define XMON_NUM_SPUS 16 /* Enough for current hardware */
3716
3717 static struct spu_info spu_info[XMON_NUM_SPUS];
3718
3719 void xmon_register_spus(struct list_head *list)
3720 {
3721 struct spu *spu;
3722
3723 list_for_each_entry(spu, list, full_list) {
3724 if (spu->number >= XMON_NUM_SPUS) {
3725 WARN_ON(1);
3726 continue;
3727 }
3728
3729 spu_info[spu->number].spu = spu;
3730 spu_info[spu->number].stopped_ok = 0;
3731 spu_info[spu->number].dump_addr = (unsigned long)
3732 spu_info[spu->number].spu->local_store;
3733 }
3734 }
3735
3736 static void stop_spus(void)
3737 {
3738 struct spu *spu;
3739 int i;
3740 u64 tmp;
3741
3742 for (i = 0; i < XMON_NUM_SPUS; i++) {
3743 if (!spu_info[i].spu)
3744 continue;
3745
3746 if (setjmp(bus_error_jmp) == 0) {
3747 catch_memory_errors = 1;
3748 sync();
3749
3750 spu = spu_info[i].spu;
3751
3752 spu_info[i].saved_spu_runcntl_RW =
3753 in_be32(&spu->problem->spu_runcntl_RW);
3754
3755 tmp = spu_mfc_sr1_get(spu);
3756 spu_info[i].saved_mfc_sr1_RW = tmp;
3757
3758 tmp &= ~MFC_STATE1_MASTER_RUN_CONTROL_MASK;
3759 spu_mfc_sr1_set(spu, tmp);
3760
3761 sync();
3762 __delay(200);
3763
3764 spu_info[i].stopped_ok = 1;
3765
3766 printf("Stopped spu %.2d (was %s)\n", i,
3767 spu_info[i].saved_spu_runcntl_RW ?
3768 "running" : "stopped");
3769 } else {
3770 catch_memory_errors = 0;
3771 printf("*** Error stopping spu %.2d\n", i);
3772 }
3773 catch_memory_errors = 0;
3774 }
3775 }
3776
3777 static void restart_spus(void)
3778 {
3779 struct spu *spu;
3780 int i;
3781
3782 for (i = 0; i < XMON_NUM_SPUS; i++) {
3783 if (!spu_info[i].spu)
3784 continue;
3785
3786 if (!spu_info[i].stopped_ok) {
3787 printf("*** Error, spu %d was not successfully stopped"
3788 ", not restarting\n", i);
3789 continue;
3790 }
3791
3792 if (setjmp(bus_error_jmp) == 0) {
3793 catch_memory_errors = 1;
3794 sync();
3795
3796 spu = spu_info[i].spu;
3797 spu_mfc_sr1_set(spu, spu_info[i].saved_mfc_sr1_RW);
3798 out_be32(&spu->problem->spu_runcntl_RW,
3799 spu_info[i].saved_spu_runcntl_RW);
3800
3801 sync();
3802 __delay(200);
3803
3804 printf("Restarted spu %.2d\n", i);
3805 } else {
3806 catch_memory_errors = 0;
3807 printf("*** Error restarting spu %.2d\n", i);
3808 }
3809 catch_memory_errors = 0;
3810 }
3811 }
3812
3813 #define DUMP_WIDTH 23
3814 #define DUMP_VALUE(format, field, value) \
3815 do { \
3816 if (setjmp(bus_error_jmp) == 0) { \
3817 catch_memory_errors = 1; \
3818 sync(); \
3819 printf(" %-*s = "format"\n", DUMP_WIDTH, \
3820 #field, value); \
3821 sync(); \
3822 __delay(200); \
3823 } else { \
3824 catch_memory_errors = 0; \
3825 printf(" %-*s = *** Error reading field.\n", \
3826 DUMP_WIDTH, #field); \
3827 } \
3828 catch_memory_errors = 0; \
3829 } while (0)
3830
3831 #define DUMP_FIELD(obj, format, field) \
3832 DUMP_VALUE(format, field, obj->field)
3833
3834 static void dump_spu_fields(struct spu *spu)
3835 {
3836 printf("Dumping spu fields at address %p:\n", spu);
3837
3838 DUMP_FIELD(spu, "0x%x", number);
3839 DUMP_FIELD(spu, "%s", name);
3840 DUMP_FIELD(spu, "0x%lx", local_store_phys);
3841 DUMP_FIELD(spu, "0x%p", local_store);
3842 DUMP_FIELD(spu, "0x%lx", ls_size);
3843 DUMP_FIELD(spu, "0x%x", node);
3844 DUMP_FIELD(spu, "0x%lx", flags);
3845 DUMP_FIELD(spu, "%d", class_0_pending);
3846 DUMP_FIELD(spu, "0x%lx", class_0_dar);
3847 DUMP_FIELD(spu, "0x%lx", class_1_dar);
3848 DUMP_FIELD(spu, "0x%lx", class_1_dsisr);
3849 DUMP_FIELD(spu, "0x%lx", irqs[0]);
3850 DUMP_FIELD(spu, "0x%lx", irqs[1]);
3851 DUMP_FIELD(spu, "0x%lx", irqs[2]);
3852 DUMP_FIELD(spu, "0x%x", slb_replace);
3853 DUMP_FIELD(spu, "%d", pid);
3854 DUMP_FIELD(spu, "0x%p", mm);
3855 DUMP_FIELD(spu, "0x%p", ctx);
3856 DUMP_FIELD(spu, "0x%p", rq);
3857 DUMP_FIELD(spu, "0x%p", timestamp);
3858 DUMP_FIELD(spu, "0x%lx", problem_phys);
3859 DUMP_FIELD(spu, "0x%p", problem);
3860 DUMP_VALUE("0x%x", problem->spu_runcntl_RW,
3861 in_be32(&spu->problem->spu_runcntl_RW));
3862 DUMP_VALUE("0x%x", problem->spu_status_R,
3863 in_be32(&spu->problem->spu_status_R));
3864 DUMP_VALUE("0x%x", problem->spu_npc_RW,
3865 in_be32(&spu->problem->spu_npc_RW));
3866 DUMP_FIELD(spu, "0x%p", priv2);
3867 DUMP_FIELD(spu, "0x%p", pdata);
3868 }
3869
3870 int
3871 spu_inst_dump(unsigned long adr, long count, int praddr)
3872 {
3873 return generic_inst_dump(adr, count, praddr, print_insn_spu);
3874 }
3875
3876 static void dump_spu_ls(unsigned long num, int subcmd)
3877 {
3878 unsigned long offset, addr, ls_addr;
3879
3880 if (setjmp(bus_error_jmp) == 0) {
3881 catch_memory_errors = 1;
3882 sync();
3883 ls_addr = (unsigned long)spu_info[num].spu->local_store;
3884 sync();
3885 __delay(200);
3886 } else {
3887 catch_memory_errors = 0;
3888 printf("*** Error: accessing spu info for spu %d\n", num);
3889 return;
3890 }
3891 catch_memory_errors = 0;
3892
3893 if (scanhex(&offset))
3894 addr = ls_addr + offset;
3895 else
3896 addr = spu_info[num].dump_addr;
3897
3898 if (addr >= ls_addr + LS_SIZE) {
3899 printf("*** Error: address outside of local store\n");
3900 return;
3901 }
3902
3903 switch (subcmd) {
3904 case 'i':
3905 addr += spu_inst_dump(addr, 16, 1);
3906 last_cmd = "sdi\n";
3907 break;
3908 default:
3909 prdump(addr, 64);
3910 addr += 64;
3911 last_cmd = "sd\n";
3912 break;
3913 }
3914
3915 spu_info[num].dump_addr = addr;
3916 }
3917
3918 static int do_spu_cmd(void)
3919 {
3920 static unsigned long num = 0;
3921 int cmd, subcmd = 0;
3922
3923 cmd = inchar();
3924 switch (cmd) {
3925 case 's':
3926 stop_spus();
3927 break;
3928 case 'r':
3929 restart_spus();
3930 break;
3931 case 'd':
3932 subcmd = inchar();
3933 if (isxdigit(subcmd) || subcmd == '\n')
3934 termch = subcmd;
3935 case 'f':
3936 scanhex(&num);
3937 if (num >= XMON_NUM_SPUS || !spu_info[num].spu) {
3938 printf("*** Error: invalid spu number\n");
3939 return 0;
3940 }
3941
3942 switch (cmd) {
3943 case 'f':
3944 dump_spu_fields(spu_info[num].spu);
3945 break;
3946 default:
3947 dump_spu_ls(num, subcmd);
3948 break;
3949 }
3950
3951 break;
3952 default:
3953 return -1;
3954 }
3955
3956 return 0;
3957 }
3958 #else /* ! CONFIG_SPU_BASE */
3959 static int do_spu_cmd(void)
3960 {
3961 return -1;
3962 }
3963 #endif
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