arch/ppc/boot/simple/embed_config.c

   1 /* Board specific functions for those embedded 8xx boards that do
   2  * not have boot monitor support for board information.
   3  *
   4  * This program is free software; you can redistribute  it and/or modify it
   5  * under  the terms of  the GNU General  Public License as published by the
   6  * Free Software Foundation;  either version 2 of the  License, or (at your
   7  * option) any later version.
   8  */
   9
  10 #include <linux/types.h>
  11 #include <linux/config.h>
  12 #include <linux/string.h>
  13 #include <asm/reg.h>
  14 #ifdef CONFIG_8xx
  15 #include <asm/mpc8xx.h>
  16 #endif
  17 #ifdef CONFIG_8260
  18 #include <asm/mpc8260.h>
  19 #include <asm/immap_cpm2.h>
  20 #endif
  21 #ifdef CONFIG_40x
  22 #include <asm/io.h>
  23 #endif
  24 #ifdef CONFIG_XILINX_VIRTEX
  25 #include <platforms/4xx/xparameters/xparameters.h>
  26 #endif
  27 extern unsigned long timebase_period_ns;
  28
  29 /* For those boards that don't provide one.
  30 */
  31 #if !defined(CONFIG_MBX)
  32 static  bd_t    bdinfo;
  33 #endif
  34
  35 /* IIC functions.
  36  * These are just the basic master read/write operations so we can
  37  * examine serial EEPROM.
  38  */
  39 extern void     iic_read(uint devaddr, u_char *buf, uint offset, uint count);
  40
  41 /* Supply a default Ethernet address for those eval boards that don't
  42  * ship with one.  This is an address from the MBX board I have, so
  43  * it is unlikely you will find it on your network.
  44  */
  45 static  ushort  def_enet_addr[] = { 0x0800, 0x3e26, 0x1559 };
  46
  47 #if defined(CONFIG_MBX)
  48
  49 /* The MBX hands us a pretty much ready to go board descriptor.  This
  50  * is where the idea started in the first place.
  51  */
  52 void
  53 embed_config(bd_t **bdp)
  54 {
  55         u_char  *mp;
  56         u_char  eebuf[128];
  57         int i = 8;
  58         bd_t    *bd;
  59
  60         bd = *bdp;
  61
  62         /* Read the first 128 bytes of the EEPROM.  There is more,
  63          * but this is all we need.
  64          */
  65         iic_read(0xa4, eebuf, 0, 128);
  66
  67         /* All we are looking for is the Ethernet MAC address.  The
  68          * first 8 bytes are 'MOTOROLA', so check for part of that.
  69          * Next, the VPD describes a MAC 'packet' as being of type 08
  70          * and size 06.  So we look for that and the MAC must follow.
  71          * If there are more than one, we still only care about the first.
  72          * If it's there, assume we have a valid MAC address.  If not,
  73          * grab our default one.
  74          */
  75         if ((*(uint *)eebuf) == 0x4d4f544f) {
  76                 while (i < 127 && !(eebuf[i] == 0x08 && eebuf[i + 1] == 0x06))
  77                          i += eebuf[i + 1] + 2;  /* skip this packet */
  78
  79                 if (i == 127)   /* Couldn't find. */
  80                         mp = (u_char *)def_enet_addr;
  81                 else
  82                         mp = &eebuf[i + 2];
  83         }
  84         else
  85                 mp = (u_char *)def_enet_addr;
  86
  87         for (i=0; i<6; i++)
  88                 bd->bi_enetaddr[i] = *mp++;
  89
  90         /* The boot rom passes these to us in MHz.  Linux now expects
  91          * them to be in Hz.
  92          */
  93         bd->bi_intfreq *= 1000000;
  94         bd->bi_busfreq *= 1000000;
  95
  96         /* Stuff a baud rate here as well.
  97         */
  98         bd->bi_baudrate = 9600;
  99 }
 100 #endif /* CONFIG_MBX */
 101
 102 #if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC) || \
 103         defined(CONFIG_RPX8260) || defined(CONFIG_EP405)
 104 /* Helper functions for Embedded Planet boards.
 105 */
 106 /* Because I didn't find anything that would do this.......
 107 */
 108 u_char
 109 aschex_to_byte(u_char *cp)
 110 {
 111         u_char  byte, c;
 112
 113         c = *cp++;
 114
 115         if ((c >= 'A') && (c <= 'F')) {
 116                 c -= 'A';
 117                 c += 10;
 118         } else if ((c >= 'a') && (c <= 'f')) {
 119                 c -= 'a';
 120                 c += 10;
 121         } else
 122                 c -= '0';
 123
 124         byte = c * 16;
 125
 126         c = *cp;
 127
 128         if ((c >= 'A') && (c <= 'F')) {
 129                 c -= 'A';
 130                 c += 10;
 131         } else if ((c >= 'a') && (c <= 'f')) {
 132                 c -= 'a';
 133                 c += 10;
 134         } else
 135                 c -= '0';
 136
 137         byte += c;
 138
 139         return(byte);
 140 }
 141
 142 static void
 143 rpx_eth(bd_t *bd, u_char *cp)
 144 {
 145         int     i;
 146
 147         for (i=0; i<6; i++) {
 148                 bd->bi_enetaddr[i] = aschex_to_byte(cp);
 149                 cp += 2;
 150         }
 151 }
 152
 153 #ifdef CONFIG_RPX8260
 154 static uint
 155 rpx_baseten(u_char *cp)
 156 {
 157         uint    retval;
 158
 159         retval = 0;
 160
 161         while (*cp != '\n') {
 162                 retval *= 10;
 163                 retval += (*cp) - '0';
 164                 cp++;
 165         }
 166         return(retval);
 167 }
 168 #endif
 169
 170 #if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC)
 171 static void
 172 rpx_brate(bd_t *bd, u_char *cp)
 173 {
 174         uint    rate;
 175
 176         rate = 0;
 177
 178         while (*cp != '\n') {
 179                 rate *= 10;
 180                 rate += (*cp) - '0';
 181                 cp++;
 182         }
 183
 184         bd->bi_baudrate = rate * 100;
 185 }
 186
 187 static void
 188 rpx_cpuspeed(bd_t *bd, u_char *cp)
 189 {
 190         uint    num, den;
 191
 192         num = den = 0;
 193
 194         while (*cp != '\n') {
 195                 num *= 10;
 196                 num += (*cp) - '0';
 197                 cp++;
 198                 if (*cp == '/') {
 199                         cp++;
 200                         den = (*cp) - '0';
 201                         break;
 202                 }
 203         }
 204
 205         /* I don't know why the RPX just can't state the actual
 206          * CPU speed.....
 207          */
 208         if (den) {
 209                 num /= den;
 210                 num *= den;
 211         }
 212         bd->bi_intfreq = bd->bi_busfreq = num * 1000000;
 213
 214         /* The 8xx can only run a maximum 50 MHz bus speed (until
 215          * Motorola changes this :-).  Greater than 50 MHz parts
 216          * run internal/2 for bus speed.
 217          */
 218         if (num > 50)
 219                 bd->bi_busfreq /= 2;
 220 }
 221 #endif
 222
 223 #if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC) || defined(CONFIG_EP405)
 224 static void
 225 rpx_memsize(bd_t *bd, u_char *cp)
 226 {
 227         uint    size;
 228
 229         size = 0;
 230
 231         while (*cp != '\n') {
 232                 size *= 10;
 233                 size += (*cp) - '0';
 234                 cp++;
 235         }
 236
 237         bd->bi_memsize = size * 1024 * 1024;
 238 }
 239 #endif /* LITE || CLASSIC || EP405 */
 240 #if defined(CONFIG_EP405)
 241 static void
 242 rpx_nvramsize(bd_t *bd, u_char *cp)
 243 {
 244         uint    size;
 245
 246         size = 0;
 247
 248         while (*cp != '\n') {
 249                 size *= 10;
 250                 size += (*cp) - '0';
 251                 cp++;
 252         }
 253
 254         bd->bi_nvramsize = size * 1024;
 255 }
 256 #endif /* CONFIG_EP405 */
 257
 258 #endif  /* Embedded Planet boards */
 259
 260 #if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC)
 261
 262 /* Read the EEPROM on the RPX-Lite board.
 263 */
 264 void
 265 embed_config(bd_t **bdp)
 266 {
 267         u_char  eebuf[256], *cp;
 268         bd_t    *bd;
 269
 270         /* Read the first 256 bytes of the EEPROM.  I think this
 271          * is really all there is, and I hope if it gets bigger the
 272          * info we want is still up front.
 273          */
 274         bd = &bdinfo;
 275         *bdp = bd;
 276
 277 #if 1
 278         iic_read(0xa8, eebuf, 0, 128);
 279         iic_read(0xa8, &eebuf[128], 128, 128);
 280
 281         /* We look for two things, the Ethernet address and the
 282          * serial baud rate.  The records are separated by
 283          * newlines.
 284          */
 285         cp = eebuf;
 286         for (;;) {
 287                 if (*cp == 'E') {
 288                         cp++;
 289                         if (*cp == 'A') {
 290                                 cp += 2;
 291                                 rpx_eth(bd, cp);
 292                         }
 293                 }
 294                 if (*cp == 'S') {
 295                         cp++;
 296                         if (*cp == 'B') {
 297                                 cp += 2;
 298                                 rpx_brate(bd, cp);
 299                         }
 300                 }
 301                 if (*cp == 'D') {
 302                         cp++;
 303                         if (*cp == '1') {
 304                                 cp += 2;
 305                                 rpx_memsize(bd, cp);
 306                         }
 307                 }
 308                 if (*cp == 'H') {
 309                         cp++;
 310                         if (*cp == 'Z') {
 311                                 cp += 2;
 312                                 rpx_cpuspeed(bd, cp);
 313                         }
 314                 }
 315
 316                 /* Scan to the end of the record.
 317                 */
 318                 while ((*cp != '\n') && (*cp != 0xff))
 319                         cp++;
 320
 321                 /* If the next character is a 0 or ff, we are done.
 322                 */
 323                 cp++;
 324                 if ((*cp == 0) || (*cp == 0xff))
 325                         break;
 326         }
 327         bd->bi_memstart = 0;
 328 #else
 329         /* For boards without initialized EEPROM.
 330         */
 331         bd->bi_memstart = 0;
 332         bd->bi_memsize = (8 * 1024 * 1024);
 333         bd->bi_intfreq = 48000000;
 334         bd->bi_busfreq = 48000000;
 335         bd->bi_baudrate = 9600;
 336 #endif
 337 }
 338 #endif /* RPXLITE || RPXCLASSIC */
 339
 340 #ifdef CONFIG_BSEIP
 341 /* Build a board information structure for the BSE ip-Engine.
 342  * There is more to come since we will add some environment
 343  * variables and a function to read them.
 344  */
 345 void
 346 embed_config(bd_t **bdp)
 347 {
 348         u_char  *cp;
 349         int     i;
 350         bd_t    *bd;
 351
 352         bd = &bdinfo;
 353         *bdp = bd;
 354
 355         /* Baud rate and processor speed will eventually come
 356          * from the environment variables.
 357          */
 358         bd->bi_baudrate = 9600;
 359
 360         /* Get the Ethernet station address from the Flash ROM.
 361         */
 362         cp = (u_char *)0xfe003ffa;
 363         for (i=0; i<6; i++) {
 364                 bd->bi_enetaddr[i] = *cp++;
 365         }
 366
 367         /* The rest of this should come from the environment as well.
 368         */
 369         bd->bi_memstart = 0;
 370         bd->bi_memsize = (16 * 1024 * 1024);
 371         bd->bi_intfreq = 48000000;
 372         bd->bi_busfreq = 48000000;
 373 }
 374 #endif /* BSEIP */
 375
 376 #ifdef CONFIG_FADS
 377 /* Build a board information structure for the FADS.
 378  */
 379 void
 380 embed_config(bd_t **bdp)
 381 {
 382         u_char  *cp;
 383         int     i;
 384         bd_t    *bd;
 385
 386         bd = &bdinfo;
 387         *bdp = bd;
 388
 389         /* Just fill in some known values.
 390          */
 391         bd->bi_baudrate = 9600;
 392
 393         /* Use default enet.
 394         */
 395         cp = (u_char *)def_enet_addr;
 396         for (i=0; i<6; i++) {
 397                 bd->bi_enetaddr[i] = *cp++;
 398         }
 399
 400         bd->bi_memstart = 0;
 401         bd->bi_memsize = (8 * 1024 * 1024);
 402         bd->bi_intfreq = 40000000;
 403         bd->bi_busfreq = 40000000;
 404 }
 405 #endif /* FADS */
 406
 407 #ifdef CONFIG_8260
 408 /* Compute 8260 clock values if the rom doesn't provide them.
 409  */
 410 static unsigned char bus2core_8260[] = {
 411 /*      0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f */
 412         3,  2,  2,  2,  4,  4,  5,  9,  6, 11,  8, 10,  3, 12,  7,  2,
 413         6,  5, 13,  2, 14,  4, 15,  2,  3, 11,  8, 10, 16, 12,  7,  2,
 414 };
 415
 416 static void
 417 clk_8260(bd_t *bd)
 418 {
 419         uint    scmr, vco_out, clkin;
 420         uint    plldf, pllmf, corecnf;
 421         volatile cpm2_map_t     *ip;
 422
 423         ip = (cpm2_map_t *)CPM_MAP_ADDR;
 424         scmr = ip->im_clkrst.car_scmr;
 425
 426         /* The clkin is always bus frequency.
 427         */
 428         clkin = bd->bi_busfreq;
 429
 430         /* Collect the bits from the scmr.
 431         */
 432         plldf = (scmr >> 12) & 1;
 433         pllmf = scmr & 0xfff;
 434         corecnf = (scmr >> 24) &0x1f;
 435
 436         /* This is arithmetic from the 8260 manual.
 437         */
 438         vco_out = clkin / (plldf + 1);
 439         vco_out *= 2 * (pllmf + 1);
 440         bd->bi_vco = vco_out;           /* Save for later */
 441
 442         bd->bi_cpmfreq = vco_out / 2;   /* CPM Freq, in MHz */
 443         bd->bi_intfreq = bd->bi_busfreq * bus2core_8260[corecnf] / 2;
 444
 445         /* Set Baud rate divisor.  The power up default is divide by 16,
 446          * but we set it again here in case it was changed.
 447          */
 448         ip->im_clkrst.car_sccr = 1;     /* DIV 16 BRG */
 449         bd->bi_brgfreq = vco_out / 16;
 450 }
 451
 452 static unsigned char bus2core_8280[] = {
 453 /*      0   1   2   3   4   5   6   7   8   9   a   b   c   d   e   f */
 454         3,  2,  2,  2,  4,  4,  5,  9,  6, 11,  8, 10,  3, 12,  7,  2,
 455         6,  5, 13,  2, 14,  2, 15,  2,  3,  2,  2,  2, 16,  2,  2,  2,
 456 };
 457
 458 static void
 459 clk_8280(bd_t *bd)
 460 {
 461         uint    scmr, main_clk, clkin;
 462         uint    pllmf, corecnf;
 463         volatile cpm2_map_t     *ip;
 464
 465         ip = (cpm2_map_t *)CPM_MAP_ADDR;
 466         scmr = ip->im_clkrst.car_scmr;
 467
 468         /* The clkin is always bus frequency.
 469         */
 470         clkin = bd->bi_busfreq;
 471
 472         /* Collect the bits from the scmr.
 473         */
 474         pllmf = scmr & 0xf;
 475         corecnf = (scmr >> 24) & 0x1f;
 476
 477         /* This is arithmetic from the 8280 manual.
 478         */
 479         main_clk = clkin * (pllmf + 1);
 480
 481         bd->bi_cpmfreq = main_clk / 2;  /* CPM Freq, in MHz */
 482         bd->bi_intfreq = bd->bi_busfreq * bus2core_8280[corecnf] / 2;
 483
 484         /* Set Baud rate divisor.  The power up default is divide by 16,
 485          * but we set it again here in case it was changed.
 486          */
 487         ip->im_clkrst.car_sccr = (ip->im_clkrst.car_sccr & 0x3) | 0x1;
 488         bd->bi_brgfreq = main_clk / 16;
 489 }
 490 #endif
 491
 492 #ifdef CONFIG_SBC82xx
 493 void
 494 embed_config(bd_t **bdp)
 495 {
 496         u_char  *cp;
 497         int     i;
 498         bd_t    *bd;
 499         unsigned long pvr;
 500
 501         bd = *bdp;
 502
 503         bd = &bdinfo;
 504         *bdp = bd;
 505         bd->bi_baudrate = 9600;
 506         bd->bi_memsize = 256 * 1024 * 1024;     /* just a guess */
 507
 508         cp = (void*)SBC82xx_MACADDR_NVRAM_SCC1;
 509         memcpy(bd->bi_enetaddr, cp, 6);
 510
 511         /* can busfreq be calculated? */
 512         pvr = mfspr(SPRN_PVR);
 513         if ((pvr & 0xffff0000) == 0x80820000) {
 514                 bd->bi_busfreq = 100000000;
 515                 clk_8280(bd);
 516         } else {
 517                 bd->bi_busfreq = 66000000;
 518                 clk_8260(bd);
 519         }
 520
 521 }
 522 #endif /* SBC82xx */
 523
 524 #if defined(CONFIG_EST8260) || defined(CONFIG_TQM8260)
 525 void
 526 embed_config(bd_t **bdp)
 527 {
 528         u_char  *cp;
 529         int     i;
 530         bd_t    *bd;
 531
 532         bd = *bdp;
 533 #if 0
 534         /* This is actually provided by my boot rom.  I have it
 535          * here for those people that may load the kernel with
 536          * a JTAG/COP tool and not the rom monitor.
 537          */
 538         bd->bi_baudrate = 115200;
 539         bd->bi_intfreq = 200000000;
 540         bd->bi_busfreq = 66666666;
 541         bd->bi_cpmfreq = 66666666;
 542         bd->bi_brgfreq = 33333333;
 543         bd->bi_memsize = 16 * 1024 * 1024;
 544 #else
 545         /* The boot rom passes these to us in MHz.  Linux now expects
 546          * them to be in Hz.
 547          */
 548         bd->bi_intfreq *= 1000000;
 549         bd->bi_busfreq *= 1000000;
 550         bd->bi_cpmfreq *= 1000000;
 551         bd->bi_brgfreq *= 1000000;
 552 #endif
 553
 554         cp = (u_char *)def_enet_addr;
 555         for (i=0; i<6; i++) {
 556                 bd->bi_enetaddr[i] = *cp++;
 557         }
 558 }
 559 #endif /* EST8260 */
 560
 561 #ifdef CONFIG_SBS8260
 562 void
 563 embed_config(bd_t **bdp)
 564 {
 565         u_char  *cp;
 566         int     i;
 567         bd_t    *bd;
 568
 569         /* This should provided by the boot rom.
 570          */
 571         bd = &bdinfo;
 572         *bdp = bd;
 573         bd->bi_baudrate = 9600;
 574         bd->bi_memsize = 64 * 1024 * 1024;
 575
 576         /* Set all of the clocks.  We have to know the speed of the
 577          * external clock.  The development board had 66 MHz.
 578          */
 579         bd->bi_busfreq = 66666666;
 580         clk_8260(bd);
 581
 582         /* I don't know how to compute this yet.
 583         */
 584         bd->bi_intfreq = 133000000;
 585
 586
 587         cp = (u_char *)def_enet_addr;
 588         for (i=0; i<6; i++) {
 589                 bd->bi_enetaddr[i] = *cp++;
 590         }
 591 }
 592 #endif /* SBS8260 */
 593
 594 #ifdef CONFIG_RPX8260
 595 void
 596 embed_config(bd_t **bdp)
 597 {
 598         u_char  *cp, *keyvals;
 599         int     i;
 600         bd_t    *bd;
 601
 602         keyvals = (u_char *)*bdp;
 603
 604         bd = &bdinfo;
 605         *bdp = bd;
 606
 607         /* This is almost identical to the RPX-Lite/Classic functions
 608          * on the 8xx boards.  It would be nice to have a key lookup
 609          * function in a string, but the format of all of the fields
 610          * is slightly different.
 611          */
 612         cp = keyvals;
 613         for (;;) {
 614                 if (*cp == 'E') {
 615                         cp++;
 616                         if (*cp == 'A') {
 617                                 cp += 2;
 618                                 rpx_eth(bd, cp);
 619                         }
 620                 }
 621                 if (*cp == 'S') {
 622                         cp++;
 623                         if (*cp == 'B') {
 624                                 cp += 2;
 625                                 bd->bi_baudrate = rpx_baseten(cp);
 626                         }
 627                 }
 628                 if (*cp == 'D') {
 629                         cp++;
 630                         if (*cp == '1') {
 631                                 cp += 2;
 632                                 bd->bi_memsize = rpx_baseten(cp) * 1024 * 1024;
 633                         }
 634                 }
 635                 if (*cp == 'X') {
 636                         cp++;
 637                         if (*cp == 'T') {
 638                                 cp += 2;
 639                                 bd->bi_busfreq = rpx_baseten(cp);
 640                         }
 641                 }
 642                 if (*cp == 'N') {
 643                         cp++;
 644                         if (*cp == 'V') {
 645                                 cp += 2;
 646                                 bd->bi_nvsize = rpx_baseten(cp) * 1024 * 1024;
 647                         }
 648                 }
 649
 650                 /* Scan to the end of the record.
 651                 */
 652                 while ((*cp != '\n') && (*cp != 0xff))
 653                         cp++;
 654
 655                 /* If the next character is a 0 or ff, we are done.
 656                 */
 657                 cp++;
 658                 if ((*cp == 0) || (*cp == 0xff))
 659                         break;
 660         }
 661         bd->bi_memstart = 0;
 662
 663         /* The memory size includes both the 60x and local bus DRAM.
 664          * I don't want to use the local bus DRAM for real memory,
 665          * so subtract it out.  It would be nice if they were separate
 666          * keys.
 667          */
 668         bd->bi_memsize -= 32 * 1024 * 1024;
 669
 670         /* Set all of the clocks.  We have to know the speed of the
 671          * external clock.
 672          */
 673         clk_8260(bd);
 674
 675         /* I don't know how to compute this yet.
 676         */
 677         bd->bi_intfreq = 200000000;
 678 }
 679 #endif /* RPX6 for testing */
 680
 681 #ifdef CONFIG_ADS8260
 682 void
 683 embed_config(bd_t **bdp)
 684 {
 685         u_char  *cp;
 686         int     i;
 687         bd_t    *bd;
 688
 689         /* This should provided by the boot rom.
 690          */
 691         bd = &bdinfo;
 692         *bdp = bd;
 693         bd->bi_baudrate = 9600;
 694         bd->bi_memsize = 16 * 1024 * 1024;
 695
 696         /* Set all of the clocks.  We have to know the speed of the
 697          * external clock.  The development board had 66 MHz.
 698          */
 699         bd->bi_busfreq = 66666666;
 700         clk_8260(bd);
 701
 702         /* I don't know how to compute this yet.
 703         */
 704         bd->bi_intfreq = 200000000;
 705
 706
 707         cp = (u_char *)def_enet_addr;
 708         for (i=0; i<6; i++) {
 709                 bd->bi_enetaddr[i] = *cp++;
 710         }
 711 }
 712 #endif /* ADS8260 */
 713
 714 #ifdef CONFIG_WILLOW
 715 void
 716 embed_config(bd_t **bdp)
 717 {
 718         u_char  *cp;
 719         int     i;
 720         bd_t    *bd;
 721
 722         /* Willow has Open Firmware....I should learn how to get this
 723          * information from it.
 724          */
 725         bd = &bdinfo;
 726         *bdp = bd;
 727         bd->bi_baudrate = 9600;
 728         bd->bi_memsize = 32 * 1024 * 1024;
 729
 730         /* Set all of the clocks.  We have to know the speed of the
 731          * external clock.  The development board had 66 MHz.
 732          */
 733         bd->bi_busfreq = 66666666;
 734         clk_8260(bd);
 735
 736         /* I don't know how to compute this yet.
 737         */
 738         bd->bi_intfreq = 200000000;
 739
 740
 741         cp = (u_char *)def_enet_addr;
 742         for (i=0; i<6; i++) {
 743                 bd->bi_enetaddr[i] = *cp++;
 744         }
 745 }
 746 #endif /* WILLOW */
 747
 748 #if defined(CONFIG_XILINX_ML300) || defined(CONFIG_XILINX_ML403)
 749 void
 750 embed_config(bd_t ** bdp)
 751 {
 752         static const unsigned long line_size = 32;
 753         static const unsigned long congruence_classes = 256;
 754         unsigned long addr;
 755         unsigned long dccr;
 756         bd_t *bd;
 757
 758         /*
 759          * Invalidate the data cache if the data cache is turned off.
 760          * - The 405 core does not invalidate the data cache on power-up
 761          *   or reset but does turn off the data cache. We cannot assume
 762          *   that the cache contents are valid.
 763          * - If the data cache is turned on this must have been done by
 764          *   a bootloader and we assume that the cache contents are
 765          *   valid.
 766          */
 767         __asm__("mfdccr %0": "=r" (dccr));
 768         if (dccr == 0) {
 769                 for (addr = 0;
 770                      addr < (congruence_classes * line_size);
 771                      addr += line_size) {
 772                         __asm__("dccci 0,%0": :"b"(addr));
 773                 }
 774         }
 775
 776         bd = &bdinfo;
 777         *bdp = bd;
 778         bd->bi_memsize = XPAR_DDR_0_SIZE;
 779         bd->bi_intfreq = XPAR_CORE_CLOCK_FREQ_HZ;
 780         bd->bi_busfreq = XPAR_PLB_CLOCK_FREQ_HZ;
 781         bd->bi_pci_busfreq = XPAR_PCI_0_CLOCK_FREQ_HZ;
 782         timebase_period_ns = 1000000000 / bd->bi_tbfreq;
 783         /* see bi_tbfreq definition in arch/ppc/platforms/4xx/xilinx_ml300.h */
 784 }
 785 #endif /* CONFIG_XILINX_ML300 || CONFIG_XILINX_ML403 */
 786
 787 #ifdef CONFIG_IBM_OPENBIOS
 788 /* This could possibly work for all treeboot roms.
 789 */
 790 #if defined(CONFIG_BUBINGA)
 791 #define BOARD_INFO_VECTOR       0xFFF80B50 /* openbios 1.19 moved this vector down  - armin */
 792 #else
 793 #define BOARD_INFO_VECTOR       0xFFFE0B50
 794 #endif
 795
 796 void
 797 embed_config(bd_t **bdp)
 798 {
 799         u_char  *cp;
 800         int     i;
 801         bd_t    *bd, *treeboot_bd;
 802         bd_t *(*get_board_info)(void) =
 803             (bd_t *(*)(void))(*(unsigned long *)BOARD_INFO_VECTOR);
 804 #if !defined(CONFIG_STB03xxx)
 805
 806         /* shut down the Ethernet controller that the boot rom
 807          * sometimes leaves running.
 808          */
 809         mtdcr(DCRN_MALCR(DCRN_MAL_BASE), MALCR_MMSR);     /* 1st reset MAL */
 810         while (mfdcr(DCRN_MALCR(DCRN_MAL_BASE)) & MALCR_MMSR) {}; /* wait for the reset */
 811         out_be32((volatile u32*)EMAC0_BASE,0x20000000);        /* then reset EMAC */
 812 #endif
 813
 814         bd = &bdinfo;
 815         *bdp = bd;
 816         if ((treeboot_bd = get_board_info()) != NULL) {
 817                 memcpy(bd, treeboot_bd, sizeof(bd_t));
 818         }
 819         else {
 820                 /* Hmmm...better try to stuff some defaults.
 821                 */
 822                 bd->bi_memsize = 16 * 1024 * 1024;
 823                 cp = (u_char *)def_enet_addr;
 824                 for (i=0; i<6; i++) {
 825                         /* I should probably put different ones here,
 826                          * hopefully only one is used.
 827                          */
 828                         bd->BD_EMAC_ADDR(0,i) = *cp;
 829
 830 #ifdef CONFIG_PCI
 831                         bd->bi_pci_enetaddr[i] = *cp++;
 832 #endif
 833                 }
 834                 bd->bi_tbfreq = 200 * 1000 * 1000;
 835                 bd->bi_intfreq = 200000000;
 836                 bd->bi_busfreq = 100000000;
 837 #ifdef CONFIG_PCI
 838                 bd->bi_pci_busfreq = 66666666;
 839 #endif
 840         }
 841         /* Yeah, this look weird, but on Redwood 4 they are
 842          * different object in the structure.  Sincr Redwwood 5
 843          * and Redwood 6 use OpenBIOS, it requires a special value.
 844          */
 845 #if defined(CONFIG_REDWOOD_5) || defined (CONFIG_REDWOOD_6)
 846         bd->bi_tbfreq = 27 * 1000 * 1000;
 847 #endif
 848         timebase_period_ns = 1000000000 / bd->bi_tbfreq;
 849 }
 850 #endif /* CONFIG_IBM_OPENBIOS */
 851
 852 #ifdef CONFIG_EP405
 853 #include <linux/serial_reg.h>
 854
 855 void
 856 embed_config(bd_t **bdp)
 857 {
 858         u32 chcr0;
 859         u_char *cp;
 860         bd_t    *bd;
 861
 862         /* Different versions of the PlanetCore firmware vary in how
 863            they set up the serial port - in particular whether they
 864            use the internal or external serial clock for UART0.  Make
 865            sure the UART is in a known state. */
 866         /* FIXME: We should use the board's 11.0592MHz external serial
 867            clock - it will be more accurate for serial rates.  For
 868            now, however the baud rates in ep405.h are for the internal
 869            clock. */
 870         chcr0 = mfdcr(DCRN_CHCR0);
 871         if ( (chcr0 & 0x1fff) != 0x103e ) {
 872                 mtdcr(DCRN_CHCR0, (chcr0 & 0xffffe000) | 0x103e);
 873                 /* The following tricks serial_init() into resetting the baud rate */
 874                 writeb(0, UART0_IO_BASE + UART_LCR);
 875         }
 876
 877         /* We haven't seen actual problems with the EP405 leaving the
 878          * EMAC running (as we have on Walnut).  But the registers
 879          * suggest it may not be left completely quiescent.  Reset it
 880          * just to be sure. */
 881         mtdcr(DCRN_MALCR(DCRN_MAL_BASE), MALCR_MMSR);     /* 1st reset MAL */
 882         while (mfdcr(DCRN_MALCR(DCRN_MAL_BASE)) & MALCR_MMSR) {}; /* wait for the reset */
 883         out_be32((unsigned *)EMAC0_BASE,0x20000000);        /* then reset EMAC */
 884
 885         bd = &bdinfo;
 886         *bdp = bd;
 887 #if 1
 888                 cp = (u_char *)0xF0000EE0;
 889                 for (;;) {
 890                         if (*cp == 'E') {
 891                                 cp++;
 892                                 if (*cp == 'A') {
 893                                   cp += 2;
 894                                   rpx_eth(bd, cp);
 895                                 }
 896                          }
 897
 898                         if (*cp == 'D') {
 899                                         cp++;
 900                                         if (*cp == '1') {
 901                                                 cp += 2;
 902                                                 rpx_memsize(bd, cp);
 903                                         }
 904                         }
 905
 906                         if (*cp == 'N') {
 907                                 cp++;
 908                                 if (*cp == 'V') {
 909                                         cp += 2;
 910                                         rpx_nvramsize(bd, cp);
 911                                 }
 912                         }
 913                         while ((*cp != '\n') && (*cp != 0xff))
 914                               cp++;
 915
 916                         cp++;
 917                         if ((*cp == 0) || (*cp == 0xff))
 918                            break;
 919                }
 920         bd->bi_intfreq   = 200000000;
 921         bd->bi_busfreq   = 100000000;
 922         bd->bi_pci_busfreq= 33000000 ;
 923 #else
 924
 925         bd->bi_memsize   = 64000000;
 926         bd->bi_intfreq   = 200000000;
 927         bd->bi_busfreq   = 100000000;
 928         bd->bi_pci_busfreq= 33000000 ;
 929 #endif
 930 }
 931 #endif