arch/ppc/boot/simple/head.S

   1 /*
   2  * arch/ppc/boot/simple/head.S
   3  *
   4  * Initial board bringup code for many different boards.
   5  *
   6  * Author: Tom Rini
   7  *         trini@mvista.com
   8  * Derived from arch/ppc/boot/prep/head.S (Cort Dougan, many others).
   9  *
  10  * 2001-2004 (c) MontaVista, Software, Inc.  This file is licensed under
  11  * the terms of the GNU General Public License version 2.  This program
  12  * is licensed "as is" without any warranty of any kind, whether express
  13  * or implied.
  14  */
  15
  16 #include <linux/config.h>
  17 #include <asm/reg.h>
  18 #include <asm/cache.h>
  19 #include <asm/ppc_asm.h>
  20
  21         .text
  22
  23 /*
  24  *      Begin at some arbitrary location in RAM or Flash
  25  *        Initialize core registers
  26  *        Configure memory controller (Not executing from RAM)
  27  *      Move the boot code to the link address (8M)
  28  *        Setup C stack
  29  *        Initialize UART
  30  *      Decompress the kernel to 0x0
  31  *      Jump to the kernel entry
  32  *
  33  */
  34
  35         .globl  start
  36 start:
  37         bl      start_
  38 #ifdef CONFIG_IBM_OPENBIOS
  39         /* The IBM "Tree" bootrom knows that the address of the bootrom
  40          * read only structure is 4 bytes after _start.
  41          */
  42         .long   0x62726f6d              # structure ID - "brom"
  43         .long   0x5f726f00              #              - "_ro\0"
  44         .long   1                       # structure version
  45         .long   bootrom_cmdline         # address of *bootrom_cmdline
  46 #endif
  47
  48 start_:
  49 #ifdef CONFIG_FORCE
  50         /* We have some really bad firmware.  We must disable the L1
  51          * icache/dcache now or the board won't boot.
  52          */
  53         li      r4,0x0000
  54         isync
  55         mtspr   SPRN_HID0,r4
  56         sync
  57         isync
  58 #endif
  59
  60 #if defined(CONFIG_MBX) || defined(CONFIG_RPX8260) || defined(CONFIG_PPC_PREP)
  61         mr      r29,r3  /* On the MBX860, r3 is the board info pointer.
  62                          * On the RPXSUPER, r3 points to the NVRAM
  63                          * configuration keys.
  64                          * On PReP, r3 is the pointer to the residual data.
  65                          */
  66 #endif
  67
  68         mflr    r3      /* Save our actual starting address. */
  69
  70         /* The following functions we call must not modify r3 or r4.....
  71         */
  72 #ifdef CONFIG_6xx
  73         /* On PReP we must look at the OpenFirmware pointer and sanity
  74          * test it.  On other platforms, we disable the MMU right now
  75          * and other bits.
  76          */
  77 #ifdef CONFIG_PPC_PREP
  78 /*
  79  * Save the OF pointer to r25, but only if the entry point is in a sane
  80  * location; if not we store 0.  If there is no entry point, or it is
  81  * invalid, we establish the default MSR value immediately.  Otherwise,
  82  * we defer doing that, to allow OF functions to be called, until we
  83  * begin uncompressing the kernel.
  84  */
  85         lis     r8,0x0fff               /* r8 = 0x0fffffff */
  86         ori     r8,r8,0xffff
  87
  88         subc    r8,r8,r5                /* r8 = (r5 <= r8) ? ~0 : 0 */
  89         subfe   r8,r8,r8
  90         nand    r8,r8,r8
  91
  92         and.    r5,r5,r8                /* r5 will be cleared if (r5 > r8) */
  93         bne+    haveOF
  94
  95         li      r8,MSR_IP|MSR_FP        /* Not OF: set MSR immediately */
  96         mtmsr   r8
  97         isync
  98 haveOF:
  99         mr      r25,r5
 100 #else
 101         bl      disable_6xx_mmu
 102 #endif
 103         bl      disable_6xx_l1cache
 104
 105         CLEAR_CACHES
 106 #endif
 107
 108 #ifdef CONFIG_8xx
 109         mfmsr   r8              /* Turn off interrupts */
 110         li      r9,0
 111         ori     r9,r9,MSR_EE
 112         andc    r8,r8,r9
 113         mtmsr   r8
 114
 115         /* We do this because some boot roms don't initialize the
 116          * processor correctly. Don't do this if you want to debug
 117          * using a BDM device.
 118          */
 119         li      r4,0            /* Zero DER to prevent FRZ */
 120         mtspr   SPRN_DER,r4
 121 #endif
 122
 123 #ifdef CONFIG_REDWOOD_4
 124         /* All of this Redwood 4 stuff will soon disappear when the
 125          * boot rom is straightened out.
 126          */
 127         mr      r29, r3         /* Easier than changing the other code */
 128         bl      HdwInit
 129         mr      r3, r29
 130 #endif
 131
 132 #if defined(CONFIG_MBX) || defined(CONFIG_RPX8260) || defined(CONFIG_PPC_PREP)
 133         mr      r4,r29  /* put the board info pointer where the relocate
 134                          * routine will find it
 135                          */
 136 #endif
 137
 138         /* Get the load address.
 139         */
 140         subi    r3, r3, 4       /* Get the actual IP, not NIP */
 141         b       relocate
 142