2 * This file contains miscellaneous low-level functions.
3 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
5 * Largely rewritten by Cort Dougan (cort@cs.nmt.edu)
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version
11 * 2 of the License, or (at your option) any later version.
15 #include <linux/config.h>
16 #include <linux/sys.h>
17 #include <asm/unistd.h>
18 #include <asm/errno.h>
19 #include <asm/processor.h>
21 #include <asm/cache.h>
22 #include <asm/cputable.h>
24 #include <asm/ppc_asm.h>
25 #include <asm/thread_info.h>
26 #include <asm/offsets.h>
39 * Returns (address we're running at) - (address we were linked at)
40 * for use before the text and data are mapped to KERNELBASE.
53 * add_reloc_offset(x) returns x + reloc_offset().
55 _GLOBAL(add_reloc_offset)
67 * sub_reloc_offset(x) returns x - reloc_offset().
69 _GLOBAL(sub_reloc_offset)
81 * reloc_got2 runs through the .got2 section adding an offset
86 lis r7,__got2_start@ha
87 addi r7,r7,__got2_start@l
89 addi r8,r8,__got2_end@l
110 * called with r3 = data offset and r4 = CPU number
113 _GLOBAL(identify_cpu)
114 addis r8,r3,cpu_specs@ha
115 addi r8,r8,cpu_specs@l
118 lwz r5,CPU_SPEC_PVR_MASK(r8)
120 lwz r6,CPU_SPEC_PVR_VALUE(r8)
123 addi r8,r8,CPU_SPEC_ENTRY_SIZE
126 addis r6,r3,cur_cpu_spec@ha
127 addi r6,r6,cur_cpu_spec@l
134 * do_cpu_ftr_fixups - goes through the list of CPU feature fixups
135 * and writes nop's over sections of code that don't apply for this cpu.
136 * r3 = data offset (not changed)
138 _GLOBAL(do_cpu_ftr_fixups)
139 /* Get CPU 0 features */
140 addis r6,r3,cur_cpu_spec@ha
141 addi r6,r6,cur_cpu_spec@l
144 lwz r4,CPU_SPEC_FEATURES(r4)
146 /* Get the fixup table */
147 addis r6,r3,__start___ftr_fixup@ha
148 addi r6,r6,__start___ftr_fixup@l
149 addis r7,r3,__stop___ftr_fixup@ha
150 addi r7,r7,__stop___ftr_fixup@l
156 lwz r8,-16(r6) /* mask */
158 lwz r9,-12(r6) /* value */
161 lwz r8,-8(r6) /* section begin */
162 lwz r9,-4(r6) /* section end */
165 /* write nops over the section of code */
166 /* todo: if large section, add a branch at the start of it */
170 lis r0,0x60000000@h /* nop */
172 andi. r10,r4,CPU_FTR_SPLIT_ID_CACHE@l
174 dcbst 0,r8 /* suboptimal, but simpler */
179 sync /* additional sync needed on g4 */
184 * call_setup_cpu - call the setup_cpu function for this cpu
185 * r3 = data offset, r24 = cpu number
187 * Setup function is called with:
190 * r5 = ptr to CPU spec (relocated)
192 _GLOBAL(call_setup_cpu)
193 addis r5,r3,cur_cpu_spec@ha
194 addi r5,r5,cur_cpu_spec@l
198 lwz r6,CPU_SPEC_SETUP(r5)
204 #if defined(CONFIG_CPU_FREQ_PMAC) && defined(CONFIG_6xx)
206 /* This gets called by via-pmu.c to switch the PLL selection
207 * on 750fx CPU. This function should really be moved to some
208 * other place (as most of the cpufreq code in via-pmu
210 _GLOBAL(low_choose_750fx_pll)
216 /* If switching to PLL1, disable HID0:BTIC */
227 /* Calc new HID1 value */
228 mfspr r4,SPRN_HID1 /* Build a HID1:PS bit from parameter */
229 rlwinm r5,r3,16,15,15 /* Clear out HID1:PS from value read */
230 rlwinm r4,r4,0,16,14 /* Could have I used rlwimi here ? */
234 /* Store new HID1 image */
238 addis r6,r6,nap_save_hid1@ha
239 stw r4,nap_save_hid1@l(r6)
241 /* If switching to PLL0, enable HID0:BTIC */
256 _GLOBAL(low_choose_7447a_dfs)
262 /* Calc new HID1 value */
264 insrwi r4,r3,1,9 /* insert parameter into bit 9 */
274 #endif /* CONFIG_CPU_FREQ_PMAC && CONFIG_6xx */
276 /* void local_save_flags_ptr(unsigned long *flags) */
277 _GLOBAL(local_save_flags_ptr)
282 * Need these nops here for taking over save/restore to
303 _GLOBAL(local_save_flags_ptr_end)
305 /* void local_irq_restore(unsigned long flags) */
306 _GLOBAL(local_irq_restore)
308 * Just set/clear the MSR_EE bit through restore/flags but do not
309 * change anything else. This is needed by the RT system and makes
314 /* Copy all except the MSR_EE bit from r4 (current MSR value)
315 to r3. This is the sort of thing the rlwimi instruction is
316 designed for. -- paulus. */
318 /* Check if things are setup the way we want _already_. */
344 _GLOBAL(local_irq_restore_end)
346 _GLOBAL(local_irq_disable)
347 mfmsr r0 /* Get current interrupt state */
348 rlwinm r3,r0,16+1,32-1,31 /* Extract old value of 'EE' */
349 rlwinm r0,r0,0,17,15 /* clear MSR_EE in r0 */
350 SYNC /* Some chip revs have problems here... */
351 mtmsr r0 /* Update machine state */
354 * Need these nops here for taking over save/restore to
373 _GLOBAL(local_irq_disable_end)
375 _GLOBAL(local_irq_enable)
376 mfmsr r3 /* Get current state */
377 ori r3,r3,MSR_EE /* Turn on 'EE' bit */
378 SYNC /* Some chip revs have problems here... */
379 mtmsr r3 /* Update machine state */
382 * Need these nops here for taking over save/restore to
402 _GLOBAL(local_irq_enable_end)
405 * complement mask on the msr then "or" some values on.
406 * _nmask_and_or_msr(nmask, value_to_or)
408 _GLOBAL(_nmask_and_or_msr)
409 mfmsr r0 /* Get current msr */
410 andc r0,r0,r3 /* And off the bits set in r3 (first parm) */
411 or r0,r0,r4 /* Or on the bits in r4 (second parm) */
412 SYNC /* Some chip revs have problems here... */
413 mtmsr r0 /* Update machine state */
422 #if defined(CONFIG_40x)
423 sync /* Flush to memory before changing mapping */
425 isync /* Flush shadow TLB */
426 #elif defined(CONFIG_44x)
430 /* Load high watermark */
431 lis r4,tlb_44x_hwater@ha
432 lwz r5,tlb_44x_hwater@l(r4)
434 1: tlbwe r3,r3,PPC44x_TLB_PAGEID
440 #elif defined(CONFIG_FSL_BOOKE)
441 /* Invalidate all entries in TLB0 */
444 /* Invalidate all entries in TLB1 */
447 /* Invalidate all entries in TLB2 */
450 /* Invalidate all entries in TLB3 */
456 #endif /* CONFIG_SMP */
457 #else /* !(CONFIG_40x || CONFIG_44x || CONFIG_FSL_BOOKE) */
458 #if defined(CONFIG_SMP)
464 rlwinm r0,r10,0,17,15 /* clear bit 16 (MSR_EE) */
465 rlwinm r0,r0,0,28,26 /* clear DR */
469 lis r9,mmu_hash_lock@h
470 ori r9,r9,mmu_hash_lock@l
482 stw r0,0(r9) /* clear mmu_hash_lock */
486 #else /* CONFIG_SMP */
490 #endif /* CONFIG_SMP */
491 #endif /* ! defined(CONFIG_40x) */
495 * Flush MMU TLB for a particular address
498 #if defined(CONFIG_40x)
502 /* There are only 64 TLB entries, so r3 < 64, which means bit 25 is clear.
503 * Since 25 is the V bit in the TLB_TAG, loading this value will invalidate
505 tlbwe r3, r3, TLB_TAG
508 #elif defined(CONFIG_44x)
510 mfspr r5,SPRN_PID /* Get PID */
511 rlwimi r4,r5,0,24,31 /* Set TID */
517 /* There are only 64 TLB entries, so r3 < 64,
518 * which means bit 22, is clear. Since 22 is
519 * the V bit in the TLB_PAGEID, loading this
520 * value will invalidate the TLB entry.
522 tlbwe r3, r3, PPC44x_TLB_PAGEID
525 #elif defined(CONFIG_FSL_BOOKE)
526 rlwinm r4, r3, 0, 0, 19
527 ori r5, r4, 0x08 /* TLBSEL = 1 */
528 ori r6, r4, 0x10 /* TLBSEL = 2 */
529 ori r7, r4, 0x18 /* TLBSEL = 3 */
535 #if defined(CONFIG_SMP)
537 #endif /* CONFIG_SMP */
538 #else /* !(CONFIG_40x || CONFIG_44x || CONFIG_FSL_BOOKE) */
539 #if defined(CONFIG_SMP)
545 rlwinm r0,r10,0,17,15 /* clear bit 16 (MSR_EE) */
546 rlwinm r0,r0,0,28,26 /* clear DR */
550 lis r9,mmu_hash_lock@h
551 ori r9,r9,mmu_hash_lock@l
563 stw r0,0(r9) /* clear mmu_hash_lock */
567 #else /* CONFIG_SMP */
570 #endif /* CONFIG_SMP */
571 #endif /* ! CONFIG_40x */
575 * Flush instruction cache.
576 * This is a no-op on the 601.
578 _GLOBAL(flush_instruction_cache)
579 #if defined(CONFIG_8xx)
582 mtspr SPRN_IC_CST, r5
583 #elif defined(CONFIG_4xx)
595 #elif CONFIG_FSL_BOOKE
598 ori r3,r3,L1CSR0_CFI|L1CSR0_CLFC
599 /* msync; isync recommended here */
603 END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE)
605 ori r3,r3,L1CSR1_ICFI|L1CSR1_ICLFR
609 rlwinm r3,r3,16,16,31
611 beqlr /* for 601, do nothing */
612 /* 603/604 processor - use invalidate-all bit in HID0 */
616 #endif /* CONFIG_8xx/4xx */
621 * Write any modified data cache blocks out to memory
622 * and invalidate the corresponding instruction cache blocks.
623 * This is a no-op on the 601.
625 * flush_icache_range(unsigned long start, unsigned long stop)
627 _GLOBAL(flush_icache_range)
629 blr /* for 601, do nothing */
630 END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE)
631 li r5,L1_CACHE_LINE_SIZE-1
635 srwi. r4,r4,LG_L1_CACHE_LINE_SIZE
640 addi r3,r3,L1_CACHE_LINE_SIZE
642 sync /* wait for dcbst's to get to ram */
645 addi r6,r6,L1_CACHE_LINE_SIZE
647 sync /* additional sync needed on g4 */
651 * Write any modified data cache blocks out to memory.
652 * Does not invalidate the corresponding cache lines (especially for
653 * any corresponding instruction cache).
655 * clean_dcache_range(unsigned long start, unsigned long stop)
657 _GLOBAL(clean_dcache_range)
658 li r5,L1_CACHE_LINE_SIZE-1
662 srwi. r4,r4,LG_L1_CACHE_LINE_SIZE
667 addi r3,r3,L1_CACHE_LINE_SIZE
669 sync /* wait for dcbst's to get to ram */
673 * Write any modified data cache blocks out to memory and invalidate them.
674 * Does not invalidate the corresponding instruction cache blocks.
676 * flush_dcache_range(unsigned long start, unsigned long stop)
678 _GLOBAL(flush_dcache_range)
679 li r5,L1_CACHE_LINE_SIZE-1
683 srwi. r4,r4,LG_L1_CACHE_LINE_SIZE
688 addi r3,r3,L1_CACHE_LINE_SIZE
690 sync /* wait for dcbst's to get to ram */
694 * Like above, but invalidate the D-cache. This is used by the 8xx
695 * to invalidate the cache so the PPC core doesn't get stale data
696 * from the CPM (no cache snooping here :-).
698 * invalidate_dcache_range(unsigned long start, unsigned long stop)
700 _GLOBAL(invalidate_dcache_range)
701 li r5,L1_CACHE_LINE_SIZE-1
705 srwi. r4,r4,LG_L1_CACHE_LINE_SIZE
710 addi r3,r3,L1_CACHE_LINE_SIZE
712 sync /* wait for dcbi's to get to ram */
715 #ifdef CONFIG_NOT_COHERENT_CACHE
717 * 40x cores have 8K or 16K dcache and 32 byte line size.
718 * 44x has a 32K dcache and 32 byte line size.
719 * 8xx has 1, 2, 4, 8K variants.
720 * For now, cover the worst case of the 44x.
721 * Must be called with external interrupts disabled.
723 #define CACHE_NWAYS 64
724 #define CACHE_NLINES 16
726 _GLOBAL(flush_dcache_all)
727 li r4, (2 * CACHE_NWAYS * CACHE_NLINES)
730 1: lwz r3, 0(r5) /* Load one word from every line */
731 addi r5, r5, L1_CACHE_LINE_SIZE
734 #endif /* CONFIG_NOT_COHERENT_CACHE */
737 * Flush a particular page from the data cache to RAM.
738 * Note: this is necessary because the instruction cache does *not*
739 * snoop from the data cache.
740 * This is a no-op on the 601 which has a unified cache.
742 * void __flush_dcache_icache(void *page)
744 _GLOBAL(__flush_dcache_icache)
746 blr /* for 601, do nothing */
747 END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE)
748 rlwinm r3,r3,0,0,19 /* Get page base address */
749 li r4,4096/L1_CACHE_LINE_SIZE /* Number of lines in a page */
752 0: dcbst 0,r3 /* Write line to ram */
753 addi r3,r3,L1_CACHE_LINE_SIZE
758 addi r6,r6,L1_CACHE_LINE_SIZE
765 * Flush a particular page from the data cache to RAM, identified
766 * by its physical address. We turn off the MMU so we can just use
767 * the physical address (this may be a highmem page without a kernel
770 * void __flush_dcache_icache_phys(unsigned long physaddr)
772 _GLOBAL(__flush_dcache_icache_phys)
774 blr /* for 601, do nothing */
775 END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE)
777 rlwinm r0,r10,0,28,26 /* clear DR */
780 rlwinm r3,r3,0,0,19 /* Get page base address */
781 li r4,4096/L1_CACHE_LINE_SIZE /* Number of lines in a page */
784 0: dcbst 0,r3 /* Write line to ram */
785 addi r3,r3,L1_CACHE_LINE_SIZE
790 addi r6,r6,L1_CACHE_LINE_SIZE
793 mtmsr r10 /* restore DR */
798 * Clear pages using the dcbz instruction, which doesn't cause any
799 * memory traffic (except to write out any cache lines which get
800 * displaced). This only works on cacheable memory.
802 * void clear_pages(void *page, int order) ;
805 li r0,4096/L1_CACHE_LINE_SIZE
817 addi r3,r3,L1_CACHE_LINE_SIZE
822 * Copy a whole page. We use the dcbz instruction on the destination
823 * to reduce memory traffic (it eliminates the unnecessary reads of
824 * the destination into cache). This requires that the destination
827 #define COPY_16_BYTES \
842 /* don't use prefetch on 8xx */
843 li r0,4096/L1_CACHE_LINE_SIZE
849 #else /* not 8xx, we can prefetch */
852 #if MAX_COPY_PREFETCH > 1
853 li r0,MAX_COPY_PREFETCH
857 addi r11,r11,L1_CACHE_LINE_SIZE
859 #else /* MAX_COPY_PREFETCH == 1 */
861 li r11,L1_CACHE_LINE_SIZE+4
862 #endif /* MAX_COPY_PREFETCH */
863 li r0,4096/L1_CACHE_LINE_SIZE - MAX_COPY_PREFETCH
871 #if L1_CACHE_LINE_SIZE >= 32
873 #if L1_CACHE_LINE_SIZE >= 64
876 #if L1_CACHE_LINE_SIZE >= 128
886 crnot 4*cr0+eq,4*cr0+eq
887 li r0,MAX_COPY_PREFETCH
890 #endif /* CONFIG_8xx */
893 * void atomic_clear_mask(atomic_t mask, atomic_t *addr)
894 * void atomic_set_mask(atomic_t mask, atomic_t *addr);
896 _GLOBAL(atomic_clear_mask)
903 _GLOBAL(atomic_set_mask)
912 * I/O string operations
914 * insb(port, buf, len)
915 * outsb(port, buf, len)
916 * insw(port, buf, len)
917 * outsw(port, buf, len)
918 * insl(port, buf, len)
919 * outsl(port, buf, len)
920 * insw_ns(port, buf, len)
921 * outsw_ns(port, buf, len)
922 * insl_ns(port, buf, len)
923 * outsl_ns(port, buf, len)
925 * The *_ns versions don't do byte-swapping.
993 _GLOBAL(__ide_mm_insw)
1005 _GLOBAL(__ide_mm_outsw)
1017 _GLOBAL(__ide_mm_insl)
1029 _GLOBAL(__ide_mm_outsl)
1042 * Extended precision shifts.
1044 * Updated to be valid for shift counts from 0 to 63 inclusive.
1047 * R3/R4 has 64 bit value
1048 * R5 has shift count
1051 * ashrdi3: arithmetic right shift (sign propagation)
1052 * lshrdi3: logical right shift
1053 * ashldi3: left shift
1057 srw r4,r4,r5 # LSW = count > 31 ? 0 : LSW >> count
1058 addi r7,r5,32 # could be xori, or addi with -32
1059 slw r6,r3,r6 # t1 = count > 31 ? 0 : MSW << (32-count)
1060 rlwinm r8,r7,0,32 # t3 = (count < 32) ? 32 : 0
1061 sraw r7,r3,r7 # t2 = MSW >> (count-32)
1062 or r4,r4,r6 # LSW |= t1
1063 slw r7,r7,r8 # t2 = (count < 32) ? 0 : t2
1064 sraw r3,r3,r5 # MSW = MSW >> count
1065 or r4,r4,r7 # LSW |= t2
1070 slw r3,r3,r5 # MSW = count > 31 ? 0 : MSW << count
1071 addi r7,r5,32 # could be xori, or addi with -32
1072 srw r6,r4,r6 # t1 = count > 31 ? 0 : LSW >> (32-count)
1073 slw r7,r4,r7 # t2 = count < 32 ? 0 : LSW << (count-32)
1074 or r3,r3,r6 # MSW |= t1
1075 slw r4,r4,r5 # LSW = LSW << count
1076 or r3,r3,r7 # MSW |= t2
1081 srw r4,r4,r5 # LSW = count > 31 ? 0 : LSW >> count
1082 addi r7,r5,32 # could be xori, or addi with -32
1083 slw r6,r3,r6 # t1 = count > 31 ? 0 : MSW << (32-count)
1084 srw r7,r3,r7 # t2 = count < 32 ? 0 : MSW >> (count-32)
1085 or r4,r4,r6 # LSW |= t1
1086 srw r3,r3,r5 # MSW = MSW >> count
1087 or r4,r4,r7 # LSW |= t2
1097 mr r3,r1 /* Close enough */
1101 * These are used in the alignment trap handler when emulating
1102 * single-precision loads and stores.
1103 * We restore and save the fpscr so the task gets the same result
1104 * and exceptions as if the cpu had performed the load or store.
1107 #ifdef CONFIG_PPC_FPU
1109 lfd 0,-4(r5) /* load up fpscr value */
1113 mffs 0 /* save new fpscr value */
1118 lfd 0,-4(r5) /* load up fpscr value */
1122 mffs 0 /* save new fpscr value */
1128 * Create a kernel thread
1129 * kernel_thread(fn, arg, flags)
1131 _GLOBAL(kernel_thread)
1135 mr r30,r3 /* function */
1136 mr r31,r4 /* argument */
1137 ori r3,r5,CLONE_VM /* flags */
1138 oris r3,r3,CLONE_UNTRACED>>16
1139 li r4,0 /* new sp (unused) */
1142 cmpwi 0,r3,0 /* parent or child? */
1143 bne 1f /* return if parent */
1144 li r0,0 /* make top-level stack frame */
1146 mtlr r30 /* fn addr in lr */
1147 mr r3,r31 /* load arg and call fn */
1149 li r0,__NR_exit /* exit if function returns */
1158 * This routine is just here to keep GCC happy - sigh...
1163 #define SYSCALL(name) \
1165 li r0,__NR_##name; \
1169 stw r3,errno@l(r4); \
1175 /* Why isn't this a) automatic, b) written in 'C'? */
1178 _GLOBAL(sys_call_table)
1179 .long sys_restart_syscall /* 0 */
1184 .long sys_open /* 5 */
1189 .long sys_unlink /* 10 */
1194 .long sys_chmod /* 15 */
1196 .long sys_ni_syscall /* old break syscall holder */
1199 .long sys_getpid /* 20 */
1204 .long sys_stime /* 25 */
1209 .long sys_utime /* 30 */
1210 .long sys_ni_syscall /* old stty syscall holder */
1211 .long sys_ni_syscall /* old gtty syscall holder */
1214 .long sys_ni_syscall /* 35 */ /* old ftime syscall holder */
1219 .long sys_rmdir /* 40 */
1223 .long sys_ni_syscall /* old prof syscall holder */
1224 .long sys_brk /* 45 */
1229 .long sys_getegid /* 50 */
1231 .long sys_umount /* recycled never used phys() */
1232 .long sys_ni_syscall /* old lock syscall holder */
1234 .long sys_fcntl /* 55 */
1235 .long sys_ni_syscall /* old mpx syscall holder */
1237 .long sys_ni_syscall /* old ulimit syscall holder */
1239 .long sys_umask /* 60 */
1244 .long sys_getpgrp /* 65 */
1249 .long sys_setreuid /* 70 */
1251 .long ppc_sigsuspend
1252 .long sys_sigpending
1253 .long sys_sethostname
1254 .long sys_setrlimit /* 75 */
1255 .long sys_old_getrlimit
1257 .long sys_gettimeofday
1258 .long sys_settimeofday
1259 .long sys_getgroups /* 80 */
1264 .long sys_readlink /* 85 */
1269 .long sys_mmap /* 90 */
1274 .long sys_fchown /* 95 */
1275 .long sys_getpriority
1276 .long sys_setpriority
1277 .long sys_ni_syscall /* old profil syscall holder */
1279 .long sys_fstatfs /* 100 */
1280 .long sys_ni_syscall
1281 .long sys_socketcall
1284 .long sys_getitimer /* 105 */
1289 .long sys_ni_syscall /* 110 */
1291 .long sys_ni_syscall /* old 'idle' syscall */
1292 .long sys_ni_syscall
1294 .long sys_swapoff /* 115 */
1299 .long ppc_clone /* 120 */
1300 .long sys_setdomainname
1302 .long sys_ni_syscall
1304 .long sys_mprotect /* 125 */
1305 .long sys_sigprocmask
1306 .long sys_ni_syscall /* old sys_create_module */
1307 .long sys_init_module
1308 .long sys_delete_module
1309 .long sys_ni_syscall /* old sys_get_kernel_syms */ /* 130 */
1314 .long sys_sysfs /* 135 */
1315 .long sys_personality
1316 .long sys_ni_syscall /* for afs_syscall */
1319 .long sys_llseek /* 140 */
1324 .long sys_readv /* 145 */
1329 .long sys_mlock /* 150 */
1332 .long sys_munlockall
1333 .long sys_sched_setparam
1334 .long sys_sched_getparam /* 155 */
1335 .long sys_sched_setscheduler
1336 .long sys_sched_getscheduler
1337 .long sys_sched_yield
1338 .long sys_sched_get_priority_max
1339 .long sys_sched_get_priority_min /* 160 */
1340 .long sys_sched_rr_get_interval
1344 .long sys_getresuid /* 165 */
1345 .long sys_ni_syscall /* old sys_query_module */
1347 .long sys_nfsservctl
1349 .long sys_getresgid /* 170 */
1351 .long sys_rt_sigreturn
1352 .long sys_rt_sigaction
1353 .long sys_rt_sigprocmask
1354 .long sys_rt_sigpending /* 175 */
1355 .long sys_rt_sigtimedwait
1356 .long sys_rt_sigqueueinfo
1357 .long ppc_rt_sigsuspend
1359 .long sys_pwrite64 /* 180 */
1364 .long sys_sigaltstack /* 185 */
1366 .long sys_ni_syscall /* streams1 */
1367 .long sys_ni_syscall /* streams2 */
1369 .long sys_getrlimit /* 190 */
1372 .long sys_truncate64
1373 .long sys_ftruncate64
1374 .long sys_stat64 /* 195 */
1377 .long sys_pciconfig_read
1378 .long sys_pciconfig_write
1379 .long sys_pciconfig_iobase /* 200 */
1380 .long sys_ni_syscall /* 201 - reserved - MacOnLinux - new */
1381 .long sys_getdents64
1382 .long sys_pivot_root
1384 .long sys_madvise /* 205 */
1389 .long sys_lsetxattr /* 210 */
1394 .long sys_listxattr /* 215 */
1395 .long sys_llistxattr
1396 .long sys_flistxattr
1397 .long sys_removexattr
1398 .long sys_lremovexattr
1399 .long sys_fremovexattr /* 220 */
1401 .long sys_sched_setaffinity
1402 .long sys_sched_getaffinity
1403 .long sys_ni_syscall
1404 .long sys_ni_syscall /* 225 - reserved for Tux */
1405 .long sys_sendfile64
1407 .long sys_io_destroy
1408 .long sys_io_getevents
1409 .long sys_io_submit /* 230 */
1411 .long sys_set_tid_address
1413 .long sys_exit_group
1414 .long sys_lookup_dcookie /* 235 */
1415 .long sys_epoll_create
1417 .long sys_epoll_wait
1418 .long sys_remap_file_pages
1419 .long sys_timer_create /* 240 */
1420 .long sys_timer_settime
1421 .long sys_timer_gettime
1422 .long sys_timer_getoverrun
1423 .long sys_timer_delete
1424 .long sys_clock_settime /* 245 */
1425 .long sys_clock_gettime
1426 .long sys_clock_getres
1427 .long sys_clock_nanosleep
1428 .long ppc_swapcontext
1429 .long sys_tgkill /* 250 */
1433 .long ppc_fadvise64_64
1434 .long sys_ni_syscall /* 255 - rtas (used on ppc64) */
1435 .long sys_debug_setcontext
1436 .long sys_ni_syscall /* 257 reserved for vserver */
1437 .long sys_ni_syscall /* 258 reserved for new sys_remap_file_pages */
1438 .long sys_ni_syscall /* 259 reserved for new sys_mbind */
1439 .long sys_ni_syscall /* 260 reserved for new sys_get_mempolicy */
1440 .long sys_ni_syscall /* 261 reserved for new sys_set_mempolicy */
1443 .long sys_mq_timedsend
1444 .long sys_mq_timedreceive /* 265 */
1446 .long sys_mq_getsetattr
1447 .long sys_kexec_load
1449 .long sys_request_key /* 270 */
1452 .long sys_ioprio_set
1453 .long sys_ioprio_get
projects / mirror_ubuntu-zesty-kernel.git / blob