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1 /*
2 * PowerPC hash table management proc entry. Will show information
3 * about the current hash table and will allow changes to it.
4 *
5 * Written by Cort Dougan (cort@cs.nmt.edu)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13 #include <linux/config.h>
14 #include <linux/errno.h>
15 #include <linux/sched.h>
16 #include <linux/proc_fs.h>
17 #include <linux/stat.h>
18 #include <linux/sysctl.h>
19 #include <linux/capability.h>
20 #include <linux/ctype.h>
21 #include <linux/threads.h>
22 #include <linux/smp_lock.h>
23 #include <linux/seq_file.h>
24 #include <linux/init.h>
25 #include <linux/bitops.h>
26
27 #include <asm/uaccess.h>
28 #include <asm/mmu.h>
29 #include <asm/residual.h>
30 #include <asm/io.h>
31 #include <asm/pgtable.h>
32 #include <asm/cputable.h>
33 #include <asm/system.h>
34 #include <asm/reg.h>
35
36 static int ppc_htab_show(struct seq_file *m, void *v);
37 static ssize_t ppc_htab_write(struct file * file, const char __user * buffer,
38 size_t count, loff_t *ppos);
39 extern PTE *Hash, *Hash_end;
40 extern unsigned long Hash_size, Hash_mask;
41 extern unsigned long _SDR1;
42 extern unsigned long htab_reloads;
43 extern unsigned long htab_preloads;
44 extern unsigned long htab_evicts;
45 extern unsigned long pte_misses;
46 extern unsigned long pte_errors;
47 extern unsigned int primary_pteg_full;
48 extern unsigned int htab_hash_searches;
49
50 static int ppc_htab_open(struct inode *inode, struct file *file)
51 {
52 return single_open(file, ppc_htab_show, NULL);
53 }
54
55 const struct file_operations ppc_htab_operations = {
56 .open = ppc_htab_open,
57 .read = seq_read,
58 .llseek = seq_lseek,
59 .write = ppc_htab_write,
60 .release = single_release,
61 };
62
63 static char *pmc1_lookup(unsigned long mmcr0)
64 {
65 switch ( mmcr0 & (0x7f<<7) )
66 {
67 case 0x0:
68 return "none";
69 case MMCR0_PMC1_CYCLES:
70 return "cycles";
71 case MMCR0_PMC1_ICACHEMISS:
72 return "ic miss";
73 case MMCR0_PMC1_DTLB:
74 return "dtlb miss";
75 default:
76 return "unknown";
77 }
78 }
79
80 static char *pmc2_lookup(unsigned long mmcr0)
81 {
82 switch ( mmcr0 & 0x3f )
83 {
84 case 0x0:
85 return "none";
86 case MMCR0_PMC2_CYCLES:
87 return "cycles";
88 case MMCR0_PMC2_DCACHEMISS:
89 return "dc miss";
90 case MMCR0_PMC2_ITLB:
91 return "itlb miss";
92 case MMCR0_PMC2_LOADMISSTIME:
93 return "load miss time";
94 default:
95 return "unknown";
96 }
97 }
98
99 /*
100 * print some useful info about the hash table. This function
101 * is _REALLY_ slow (see the nested for loops below) but nothing
102 * in here should be really timing critical. -- Cort
103 */
104 static int ppc_htab_show(struct seq_file *m, void *v)
105 {
106 unsigned long mmcr0 = 0, pmc1 = 0, pmc2 = 0;
107 #if defined(CONFIG_PPC_STD_MMU)
108 unsigned int kptes = 0, uptes = 0;
109 PTE *ptr;
110 #endif /* CONFIG_PPC_STD_MMU */
111
112 if (cpu_has_feature(CPU_FTR_604_PERF_MON)) {
113 mmcr0 = mfspr(SPRN_MMCR0);
114 pmc1 = mfspr(SPRN_PMC1);
115 pmc2 = mfspr(SPRN_PMC2);
116 seq_printf(m,
117 "604 Performance Monitoring\n"
118 "MMCR0\t\t: %08lx %s%s ",
119 mmcr0,
120 ( mmcr0>>28 & 0x2 ) ? "(user mode counted)" : "",
121 ( mmcr0>>28 & 0x4 ) ? "(kernel mode counted)" : "");
122 seq_printf(m,
123 "\nPMC1\t\t: %08lx (%s)\n"
124 "PMC2\t\t: %08lx (%s)\n",
125 pmc1, pmc1_lookup(mmcr0),
126 pmc2, pmc2_lookup(mmcr0));
127 }
128
129 #ifdef CONFIG_PPC_STD_MMU
130 /* if we don't have a htab */
131 if ( Hash_size == 0 ) {
132 seq_printf(m, "No Hash Table used\n");
133 return 0;
134 }
135
136 for (ptr = Hash; ptr < Hash_end; ptr++) {
137 unsigned int mctx, vsid;
138
139 if (!ptr->v)
140 continue;
141 /* undo the esid skew */
142 vsid = ptr->vsid;
143 mctx = ((vsid - (vsid & 0xf) * 0x111) >> 4) & 0xfffff;
144 if (mctx == 0)
145 kptes++;
146 else
147 uptes++;
148 }
149
150 seq_printf(m,
151 "PTE Hash Table Information\n"
152 "Size\t\t: %luKb\n"
153 "Buckets\t\t: %lu\n"
154 "Address\t\t: %08lx\n"
155 "Entries\t\t: %lu\n"
156 "User ptes\t: %u\n"
157 "Kernel ptes\t: %u\n"
158 "Percent full\t: %lu%%\n"
159 , (unsigned long)(Hash_size>>10),
160 (Hash_size/(sizeof(PTE)*8)),
161 (unsigned long)Hash,
162 Hash_size/sizeof(PTE)
163 , uptes,
164 kptes,
165 ((kptes+uptes)*100) / (Hash_size/sizeof(PTE))
166 );
167
168 seq_printf(m,
169 "Reloads\t\t: %lu\n"
170 "Preloads\t: %lu\n"
171 "Searches\t: %u\n"
172 "Overflows\t: %u\n"
173 "Evicts\t\t: %lu\n",
174 htab_reloads, htab_preloads, htab_hash_searches,
175 primary_pteg_full, htab_evicts);
176 #endif /* CONFIG_PPC_STD_MMU */
177
178 seq_printf(m,
179 "Non-error misses: %lu\n"
180 "Error misses\t: %lu\n",
181 pte_misses, pte_errors);
182 return 0;
183 }
184
185 /*
186 * Allow user to define performance counters and resize the hash table
187 */
188 static ssize_t ppc_htab_write(struct file * file, const char __user * ubuffer,
189 size_t count, loff_t *ppos)
190 {
191 #ifdef CONFIG_PPC_STD_MMU
192 unsigned long tmp;
193 char buffer[16];
194
195 if (!capable(CAP_SYS_ADMIN))
196 return -EACCES;
197 if (strncpy_from_user(buffer, ubuffer, 15))
198 return -EFAULT;
199 buffer[15] = 0;
200
201 /* don't set the htab size for now */
202 if ( !strncmp( buffer, "size ", 5) )
203 return -EBUSY;
204
205 if ( !strncmp( buffer, "reset", 5) )
206 {
207 if (cpu_has_feature(CPU_FTR_604_PERF_MON)) {
208 /* reset PMC1 and PMC2 */
209 mtspr(SPRN_PMC1, 0);
210 mtspr(SPRN_PMC2, 0);
211 }
212 htab_reloads = 0;
213 htab_evicts = 0;
214 pte_misses = 0;
215 pte_errors = 0;
216 }
217
218 /* Everything below here requires the performance monitor feature. */
219 if (!cpu_has_feature(CPU_FTR_604_PERF_MON))
220 return count;
221
222 /* turn off performance monitoring */
223 if ( !strncmp( buffer, "off", 3) )
224 {
225 mtspr(SPRN_MMCR0, 0);
226 mtspr(SPRN_PMC1, 0);
227 mtspr(SPRN_PMC2, 0);
228 }
229
230 if ( !strncmp( buffer, "user", 4) )
231 {
232 /* setup mmcr0 and clear the correct pmc */
233 tmp = (mfspr(SPRN_MMCR0) & ~(0x60000000)) | 0x20000000;
234 mtspr(SPRN_MMCR0, tmp);
235 mtspr(SPRN_PMC1, 0);
236 mtspr(SPRN_PMC2, 0);
237 }
238
239 if ( !strncmp( buffer, "kernel", 6) )
240 {
241 /* setup mmcr0 and clear the correct pmc */
242 tmp = (mfspr(SPRN_MMCR0) & ~(0x60000000)) | 0x40000000;
243 mtspr(SPRN_MMCR0, tmp);
244 mtspr(SPRN_PMC1, 0);
245 mtspr(SPRN_PMC2, 0);
246 }
247
248 /* PMC1 values */
249 if ( !strncmp( buffer, "dtlb", 4) )
250 {
251 /* setup mmcr0 and clear the correct pmc */
252 tmp = (mfspr(SPRN_MMCR0) & ~(0x7F << 7)) | MMCR0_PMC1_DTLB;
253 mtspr(SPRN_MMCR0, tmp);
254 mtspr(SPRN_PMC1, 0);
255 }
256
257 if ( !strncmp( buffer, "ic miss", 7) )
258 {
259 /* setup mmcr0 and clear the correct pmc */
260 tmp = (mfspr(SPRN_MMCR0) & ~(0x7F<<7)) | MMCR0_PMC1_ICACHEMISS;
261 mtspr(SPRN_MMCR0, tmp);
262 mtspr(SPRN_PMC1, 0);
263 }
264
265 /* PMC2 values */
266 if ( !strncmp( buffer, "load miss time", 14) )
267 {
268 /* setup mmcr0 and clear the correct pmc */
269 asm volatile(
270 "mfspr %0,%1\n\t" /* get current mccr0 */
271 "rlwinm %0,%0,0,0,31-6\n\t" /* clear bits [26-31] */
272 "ori %0,%0,%2 \n\t" /* or in mmcr0 settings */
273 "mtspr %1,%0 \n\t" /* set new mccr0 */
274 "mtspr %3,%4 \n\t" /* reset the pmc */
275 : "=r" (tmp)
276 : "i" (SPRN_MMCR0),
277 "i" (MMCR0_PMC2_LOADMISSTIME),
278 "i" (SPRN_PMC2), "r" (0) );
279 }
280
281 if ( !strncmp( buffer, "itlb", 4) )
282 {
283 /* setup mmcr0 and clear the correct pmc */
284 asm volatile(
285 "mfspr %0,%1\n\t" /* get current mccr0 */
286 "rlwinm %0,%0,0,0,31-6\n\t" /* clear bits [26-31] */
287 "ori %0,%0,%2 \n\t" /* or in mmcr0 settings */
288 "mtspr %1,%0 \n\t" /* set new mccr0 */
289 "mtspr %3,%4 \n\t" /* reset the pmc */
290 : "=r" (tmp)
291 : "i" (SPRN_MMCR0), "i" (MMCR0_PMC2_ITLB),
292 "i" (SPRN_PMC2), "r" (0) );
293 }
294
295 if ( !strncmp( buffer, "dc miss", 7) )
296 {
297 /* setup mmcr0 and clear the correct pmc */
298 asm volatile(
299 "mfspr %0,%1\n\t" /* get current mccr0 */
300 "rlwinm %0,%0,0,0,31-6\n\t" /* clear bits [26-31] */
301 "ori %0,%0,%2 \n\t" /* or in mmcr0 settings */
302 "mtspr %1,%0 \n\t" /* set new mccr0 */
303 "mtspr %3,%4 \n\t" /* reset the pmc */
304 : "=r" (tmp)
305 : "i" (SPRN_MMCR0), "i" (MMCR0_PMC2_DCACHEMISS),
306 "i" (SPRN_PMC2), "r" (0) );
307 }
308
309 return count;
310 #else /* CONFIG_PPC_STD_MMU */
311 return 0;
312 #endif /* CONFIG_PPC_STD_MMU */
313 }
314
315 int proc_dol2crvec(ctl_table *table, int write, struct file *filp,
316 void __user *buffer_arg, size_t *lenp, loff_t *ppos)
317 {
318 int vleft, first=1, len, left, val;
319 char __user *buffer = (char __user *) buffer_arg;
320 #define TMPBUFLEN 256
321 char buf[TMPBUFLEN], *p;
322 static const char *sizestrings[4] = {
323 "2MB", "256KB", "512KB", "1MB"
324 };
325 static const char *clockstrings[8] = {
326 "clock disabled", "+1 clock", "+1.5 clock", "reserved(3)",
327 "+2 clock", "+2.5 clock", "+3 clock", "reserved(7)"
328 };
329 static const char *typestrings[4] = {
330 "flow-through burst SRAM", "reserved SRAM",
331 "pipelined burst SRAM", "pipelined late-write SRAM"
332 };
333 static const char *holdstrings[4] = {
334 "0.5", "1.0", "(reserved2)", "(reserved3)"
335 };
336
337 if (!cpu_has_feature(CPU_FTR_L2CR))
338 return -EFAULT;
339
340 if ( /*!table->maxlen ||*/ (*ppos && !write)) {
341 *lenp = 0;
342 return 0;
343 }
344
345 vleft = table->maxlen / sizeof(int);
346 left = *lenp;
347
348 for (; left /*&& vleft--*/; first=0) {
349 if (write) {
350 while (left) {
351 char c;
352 if(get_user(c, buffer))
353 return -EFAULT;
354 if (!isspace(c))
355 break;
356 left--;
357 buffer++;
358 }
359 if (!left)
360 break;
361 len = left;
362 if (len > TMPBUFLEN-1)
363 len = TMPBUFLEN-1;
364 if(copy_from_user(buf, buffer, len))
365 return -EFAULT;
366 buf[len] = 0;
367 p = buf;
368 if (*p < '0' || *p > '9')
369 break;
370 val = simple_strtoul(p, &p, 0);
371 len = p-buf;
372 if ((len < left) && *p && !isspace(*p))
373 break;
374 buffer += len;
375 left -= len;
376 _set_L2CR(val);
377 } else {
378 p = buf;
379 if (!first)
380 *p++ = '\t';
381 val = _get_L2CR();
382 p += sprintf(p, "0x%08x: ", val);
383 p += sprintf(p, " %s", (val >> 31) & 1 ? "enabled" :
384 "disabled");
385 p += sprintf(p, ", %sparity", (val>>30)&1 ? "" : "no ");
386 p += sprintf(p, ", %s", sizestrings[(val >> 28) & 3]);
387 p += sprintf(p, ", %s", clockstrings[(val >> 25) & 7]);
388 p += sprintf(p, ", %s", typestrings[(val >> 23) & 2]);
389 p += sprintf(p, "%s", (val>>22)&1 ? ", data only" : "");
390 p += sprintf(p, "%s", (val>>20)&1 ? ", ZZ enabled": "");
391 p += sprintf(p, ", %s", (val>>19)&1 ? "write-through" :
392 "copy-back");
393 p += sprintf(p, "%s", (val>>18)&1 ? ", testing" : "");
394 p += sprintf(p, ", %sns hold",holdstrings[(val>>16)&3]);
395 p += sprintf(p, "%s", (val>>15)&1 ? ", DLL slow" : "");
396 p += sprintf(p, "%s", (val>>14)&1 ? ", diff clock" :"");
397 p += sprintf(p, "%s", (val>>13)&1 ? ", DLL bypass" :"");
398
399 p += sprintf(p,"\n");
400
401 len = strlen(buf);
402 if (len > left)
403 len = left;
404 if (copy_to_user(buffer, buf, len))
405 return -EFAULT;
406 left -= len;
407 buffer += len;
408 break;
409 }
410 }
411
412 if (!write && !first && left) {
413 if(put_user('\n', (char __user *) buffer))
414 return -EFAULT;
415 left--, buffer++;
416 }
417 if (write) {
418 char __user *s = (char __user *) buffer;
419 while (left) {
420 char c;
421 if(get_user(c, s++))
422 return -EFAULT;
423 if (!isspace(c))
424 break;
425 left--;
426 }
427 }
428 if (write && first)
429 return -EINVAL;
430 *lenp -= left;
431 *ppos += *lenp;
432 return 0;
433 }
434
435 #ifdef CONFIG_SYSCTL
436 /*
437 * Register our sysctl.
438 */
439 static ctl_table htab_ctl_table[]={
440 {
441 .ctl_name = KERN_PPC_L2CR,
442 .procname = "l2cr",
443 .mode = 0644,
444 .proc_handler = &proc_dol2crvec,
445 },
446 { 0, },
447 };
448 static ctl_table htab_sysctl_root[] = {
449 { 1, "kernel", NULL, 0, 0755, htab_ctl_table, },
450 { 0,},
451 };
452
453 static int __init
454 register_ppc_htab_sysctl(void)
455 {
456 register_sysctl_table(htab_sysctl_root, 0);
457
458 return 0;
459 }
460
461 __initcall(register_ppc_htab_sysctl);
462 #endif