2 * PowerPC hash table management proc entry. Will show information
3 * about the current hash table and will allow changes to it.
5 * Written by Cort Dougan (cort@cs.nmt.edu)
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
13 #include <linux/config.h>
14 #include <linux/errno.h>
15 #include <linux/sched.h>
16 #include <linux/proc_fs.h>
17 #include <linux/stat.h>
18 #include <linux/sysctl.h>
19 #include <linux/capability.h>
20 #include <linux/ctype.h>
21 #include <linux/threads.h>
22 #include <linux/smp_lock.h>
23 #include <linux/seq_file.h>
24 #include <linux/init.h>
25 #include <linux/bitops.h>
27 #include <asm/uaccess.h>
29 #include <asm/residual.h>
31 #include <asm/pgtable.h>
32 #include <asm/cputable.h>
33 #include <asm/system.h>
36 static int ppc_htab_show(struct seq_file
*m
, void *v
);
37 static ssize_t
ppc_htab_write(struct file
* file
, const char __user
* buffer
,
38 size_t count
, loff_t
*ppos
);
39 extern PTE
*Hash
, *Hash_end
;
40 extern unsigned long Hash_size
, Hash_mask
;
41 extern unsigned long _SDR1
;
42 extern unsigned long htab_reloads
;
43 extern unsigned long htab_preloads
;
44 extern unsigned long htab_evicts
;
45 extern unsigned long pte_misses
;
46 extern unsigned long pte_errors
;
47 extern unsigned int primary_pteg_full
;
48 extern unsigned int htab_hash_searches
;
50 static int ppc_htab_open(struct inode
*inode
, struct file
*file
)
52 return single_open(file
, ppc_htab_show
, NULL
);
55 struct file_operations ppc_htab_operations
= {
56 .open
= ppc_htab_open
,
59 .write
= ppc_htab_write
,
60 .release
= single_release
,
63 static char *pmc1_lookup(unsigned long mmcr0
)
65 switch ( mmcr0
& (0x7f<<7) )
69 case MMCR0_PMC1_CYCLES
:
71 case MMCR0_PMC1_ICACHEMISS
:
80 static char *pmc2_lookup(unsigned long mmcr0
)
82 switch ( mmcr0
& 0x3f )
86 case MMCR0_PMC2_CYCLES
:
88 case MMCR0_PMC2_DCACHEMISS
:
92 case MMCR0_PMC2_LOADMISSTIME
:
93 return "load miss time";
100 * print some useful info about the hash table. This function
101 * is _REALLY_ slow (see the nested for loops below) but nothing
102 * in here should be really timing critical. -- Cort
104 static int ppc_htab_show(struct seq_file
*m
, void *v
)
106 unsigned long mmcr0
= 0, pmc1
= 0, pmc2
= 0;
107 #if defined(CONFIG_PPC_STD_MMU) && !defined(CONFIG_PPC64BRIDGE)
108 unsigned int kptes
= 0, uptes
= 0;
110 #endif /* CONFIG_PPC_STD_MMU */
112 if (cpu_has_feature(CPU_FTR_604_PERF_MON
)) {
113 mmcr0
= mfspr(SPRN_MMCR0
);
114 pmc1
= mfspr(SPRN_PMC1
);
115 pmc2
= mfspr(SPRN_PMC2
);
117 "604 Performance Monitoring\n"
118 "MMCR0\t\t: %08lx %s%s ",
120 ( mmcr0
>>28 & 0x2 ) ? "(user mode counted)" : "",
121 ( mmcr0
>>28 & 0x4 ) ? "(kernel mode counted)" : "");
123 "\nPMC1\t\t: %08lx (%s)\n"
124 "PMC2\t\t: %08lx (%s)\n",
125 pmc1
, pmc1_lookup(mmcr0
),
126 pmc2
, pmc2_lookup(mmcr0
));
129 #ifdef CONFIG_PPC_STD_MMU
130 /* if we don't have a htab */
131 if ( Hash_size
== 0 ) {
132 seq_printf(m
, "No Hash Table used\n");
136 #ifndef CONFIG_PPC64BRIDGE
137 for (ptr
= Hash
; ptr
< Hash_end
; ptr
++) {
138 unsigned int mctx
, vsid
;
142 /* undo the esid skew */
144 mctx
= ((vsid
- (vsid
& 0xf) * 0x111) >> 4) & 0xfffff;
153 "PTE Hash Table Information\n"
156 "Address\t\t: %08lx\n"
158 #ifndef CONFIG_PPC64BRIDGE
160 "Kernel ptes\t: %u\n"
161 "Percent full\t: %lu%%\n"
163 , (unsigned long)(Hash_size
>>10),
164 (Hash_size
/(sizeof(PTE
)*8)),
166 Hash_size
/sizeof(PTE
)
167 #ifndef CONFIG_PPC64BRIDGE
170 ((kptes
+uptes
)*100) / (Hash_size
/sizeof(PTE
))
180 htab_reloads
, htab_preloads
, htab_hash_searches
,
181 primary_pteg_full
, htab_evicts
);
182 #endif /* CONFIG_PPC_STD_MMU */
185 "Non-error misses: %lu\n"
186 "Error misses\t: %lu\n",
187 pte_misses
, pte_errors
);
192 * Allow user to define performance counters and resize the hash table
194 static ssize_t
ppc_htab_write(struct file
* file
, const char __user
* ubuffer
,
195 size_t count
, loff_t
*ppos
)
197 #ifdef CONFIG_PPC_STD_MMU
201 if (!capable(CAP_SYS_ADMIN
))
203 if (strncpy_from_user(buffer
, ubuffer
, 15))
207 /* don't set the htab size for now */
208 if ( !strncmp( buffer
, "size ", 5) )
211 if ( !strncmp( buffer
, "reset", 5) )
213 if (cpu_has_feature(CPU_FTR_604_PERF_MON
)) {
214 /* reset PMC1 and PMC2 */
224 /* Everything below here requires the performance monitor feature. */
225 if (!cpu_has_feature(CPU_FTR_604_PERF_MON
))
228 /* turn off performance monitoring */
229 if ( !strncmp( buffer
, "off", 3) )
231 mtspr(SPRN_MMCR0
, 0);
236 if ( !strncmp( buffer
, "user", 4) )
238 /* setup mmcr0 and clear the correct pmc */
239 tmp
= (mfspr(SPRN_MMCR0
) & ~(0x60000000)) | 0x20000000;
240 mtspr(SPRN_MMCR0
, tmp
);
245 if ( !strncmp( buffer
, "kernel", 6) )
247 /* setup mmcr0 and clear the correct pmc */
248 tmp
= (mfspr(SPRN_MMCR0
) & ~(0x60000000)) | 0x40000000;
249 mtspr(SPRN_MMCR0
, tmp
);
255 if ( !strncmp( buffer
, "dtlb", 4) )
257 /* setup mmcr0 and clear the correct pmc */
258 tmp
= (mfspr(SPRN_MMCR0
) & ~(0x7F << 7)) | MMCR0_PMC1_DTLB
;
259 mtspr(SPRN_MMCR0
, tmp
);
263 if ( !strncmp( buffer
, "ic miss", 7) )
265 /* setup mmcr0 and clear the correct pmc */
266 tmp
= (mfspr(SPRN_MMCR0
) & ~(0x7F<<7)) | MMCR0_PMC1_ICACHEMISS
;
267 mtspr(SPRN_MMCR0
, tmp
);
272 if ( !strncmp( buffer
, "load miss time", 14) )
274 /* setup mmcr0 and clear the correct pmc */
276 "mfspr %0,%1\n\t" /* get current mccr0 */
277 "rlwinm %0,%0,0,0,31-6\n\t" /* clear bits [26-31] */
278 "ori %0,%0,%2 \n\t" /* or in mmcr0 settings */
279 "mtspr %1,%0 \n\t" /* set new mccr0 */
280 "mtspr %3,%4 \n\t" /* reset the pmc */
283 "i" (MMCR0_PMC2_LOADMISSTIME
),
284 "i" (SPRN_PMC2
), "r" (0) );
287 if ( !strncmp( buffer
, "itlb", 4) )
289 /* setup mmcr0 and clear the correct pmc */
291 "mfspr %0,%1\n\t" /* get current mccr0 */
292 "rlwinm %0,%0,0,0,31-6\n\t" /* clear bits [26-31] */
293 "ori %0,%0,%2 \n\t" /* or in mmcr0 settings */
294 "mtspr %1,%0 \n\t" /* set new mccr0 */
295 "mtspr %3,%4 \n\t" /* reset the pmc */
297 : "i" (SPRN_MMCR0
), "i" (MMCR0_PMC2_ITLB
),
298 "i" (SPRN_PMC2
), "r" (0) );
301 if ( !strncmp( buffer
, "dc miss", 7) )
303 /* setup mmcr0 and clear the correct pmc */
305 "mfspr %0,%1\n\t" /* get current mccr0 */
306 "rlwinm %0,%0,0,0,31-6\n\t" /* clear bits [26-31] */
307 "ori %0,%0,%2 \n\t" /* or in mmcr0 settings */
308 "mtspr %1,%0 \n\t" /* set new mccr0 */
309 "mtspr %3,%4 \n\t" /* reset the pmc */
311 : "i" (SPRN_MMCR0
), "i" (MMCR0_PMC2_DCACHEMISS
),
312 "i" (SPRN_PMC2
), "r" (0) );
316 #else /* CONFIG_PPC_STD_MMU */
318 #endif /* CONFIG_PPC_STD_MMU */
321 int proc_dol2crvec(ctl_table
*table
, int write
, struct file
*filp
,
322 void __user
*buffer_arg
, size_t *lenp
, loff_t
*ppos
)
324 int vleft
, first
=1, len
, left
, val
;
325 char __user
*buffer
= (char __user
*) buffer_arg
;
326 #define TMPBUFLEN 256
327 char buf
[TMPBUFLEN
], *p
;
328 static const char *sizestrings
[4] = {
329 "2MB", "256KB", "512KB", "1MB"
331 static const char *clockstrings
[8] = {
332 "clock disabled", "+1 clock", "+1.5 clock", "reserved(3)",
333 "+2 clock", "+2.5 clock", "+3 clock", "reserved(7)"
335 static const char *typestrings
[4] = {
336 "flow-through burst SRAM", "reserved SRAM",
337 "pipelined burst SRAM", "pipelined late-write SRAM"
339 static const char *holdstrings
[4] = {
340 "0.5", "1.0", "(reserved2)", "(reserved3)"
343 if (!cpu_has_feature(CPU_FTR_L2CR
))
346 if ( /*!table->maxlen ||*/ (*ppos
&& !write
)) {
351 vleft
= table
->maxlen
/ sizeof(int);
354 for (; left
/*&& vleft--*/; first
=0) {
358 if(get_user(c
, buffer
))
368 if (len
> TMPBUFLEN
-1)
370 if(copy_from_user(buf
, buffer
, len
))
374 if (*p
< '0' || *p
> '9')
376 val
= simple_strtoul(p
, &p
, 0);
378 if ((len
< left
) && *p
&& !isspace(*p
))
388 p
+= sprintf(p
, "0x%08x: ", val
);
389 p
+= sprintf(p
, " %s", (val
>> 31) & 1 ? "enabled" :
391 p
+= sprintf(p
, ", %sparity", (val
>>30)&1 ? "" : "no ");
392 p
+= sprintf(p
, ", %s", sizestrings
[(val
>> 28) & 3]);
393 p
+= sprintf(p
, ", %s", clockstrings
[(val
>> 25) & 7]);
394 p
+= sprintf(p
, ", %s", typestrings
[(val
>> 23) & 2]);
395 p
+= sprintf(p
, "%s", (val
>>22)&1 ? ", data only" : "");
396 p
+= sprintf(p
, "%s", (val
>>20)&1 ? ", ZZ enabled": "");
397 p
+= sprintf(p
, ", %s", (val
>>19)&1 ? "write-through" :
399 p
+= sprintf(p
, "%s", (val
>>18)&1 ? ", testing" : "");
400 p
+= sprintf(p
, ", %sns hold",holdstrings
[(val
>>16)&3]);
401 p
+= sprintf(p
, "%s", (val
>>15)&1 ? ", DLL slow" : "");
402 p
+= sprintf(p
, "%s", (val
>>14)&1 ? ", diff clock" :"");
403 p
+= sprintf(p
, "%s", (val
>>13)&1 ? ", DLL bypass" :"");
405 p
+= sprintf(p
,"\n");
410 if (copy_to_user(buffer
, buf
, len
))
418 if (!write
&& !first
&& left
) {
419 if(put_user('\n', (char __user
*) buffer
))
424 char __user
*s
= (char __user
*) buffer
;
443 * Register our sysctl.
445 static ctl_table htab_ctl_table
[]={
447 .ctl_name
= KERN_PPC_L2CR
,
450 .proc_handler
= &proc_dol2crvec
,
454 static ctl_table htab_sysctl_root
[] = {
455 { 1, "kernel", NULL
, 0, 0755, htab_ctl_table
, },
460 register_ppc_htab_sysctl(void)
462 register_sysctl_table(htab_sysctl_root
, 0);
467 __initcall(register_ppc_htab_sysctl
);