arch/ppc/platforms/4xx/ocotea.h

   1 /*
   2  * arch/ppc/platforms/ocotea.h
   3  *
   4  * Ocotea board definitions
   5  *
   6  * Matt Porter <mporter@kernel.crashing.org>
   7  *
   8  * Copyright 2003-2005 MontaVista Software Inc.
   9  *
  10  * This program is free software; you can redistribute  it and/or modify it
  11  * under  the terms of  the GNU General  Public License as published by the
  12  * Free Software Foundation;  either version 2 of the  License, or (at your
  13  * option) any later version.
  14  *
  15  */
  16
  17 #ifdef __KERNEL__
  18 #ifndef __ASM_OCOTEA_H__
  19 #define __ASM_OCOTEA_H__
  20
  21 #include <linux/config.h>
  22 #include <platforms/4xx/ibm440gx.h>
  23
  24 /* F/W TLB mapping used in bootloader glue to reset EMAC */
  25 #define PPC44x_EMAC0_MR0        0xe0000800
  26
  27 /* Location of MAC addresses in PIBS image */
  28 #define PIBS_FLASH_BASE         0xfff00000
  29 #define PIBS_MAC_BASE           (PIBS_FLASH_BASE+0xb0500)
  30 #define PIBS_MAC_SIZE           0x200
  31 #define PIBS_MAC_OFFSET         0x100
  32
  33 /* External timer clock frequency */
  34 #define OCOTEA_TMR_CLK  25000000
  35
  36 /* RTC/NVRAM location */
  37 #define OCOTEA_RTC_ADDR         0x0000000148000000ULL
  38 #define OCOTEA_RTC_SIZE         0x2000
  39
  40 /* Flash */
  41 #define OCOTEA_FPGA_REG_0               0x0000000148300000ULL
  42 #define OCOTEA_BOOT_LARGE_FLASH(x)      (x & 0x40)
  43 #define OCOTEA_SMALL_FLASH_LOW          0x00000001ff900000ULL
  44 #define OCOTEA_SMALL_FLASH_HIGH         0x00000001fff00000ULL
  45 #define OCOTEA_SMALL_FLASH_SIZE         0x100000
  46 #define OCOTEA_LARGE_FLASH_LOW          0x00000001ff800000ULL
  47 #define OCOTEA_LARGE_FLASH_HIGH         0x00000001ffc00000ULL
  48 #define OCOTEA_LARGE_FLASH_SIZE         0x400000
  49
  50 /* FPGA_REG_3 (Ethernet Groups) */
  51 #define OCOTEA_FPGA_REG_3               0x0000000148300003ULL
  52
  53 /*
  54  * Serial port defines
  55  */
  56 #define RS_TABLE_SIZE   2
  57
  58 /* OpenBIOS defined UART mappings, used before early_serial_setup */
  59 #define UART0_IO_BASE   0xE0000200
  60 #define UART1_IO_BASE   0xE0000300
  61
  62 #define BASE_BAUD       11059200/16
  63 #define STD_UART_OP(num)                                        \
  64         { 0, BASE_BAUD, 0, UART##num##_INT,                     \
  65                 (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST),        \
  66                 iomem_base: UART##num##_IO_BASE,                \
  67                 io_type: SERIAL_IO_MEM},
  68
  69 #define SERIAL_PORT_DFNS        \
  70         STD_UART_OP(0)          \
  71         STD_UART_OP(1)
  72
  73 /* PCI support */
  74 #define OCOTEA_PCI_LOWER_IO     0x00000000
  75 #define OCOTEA_PCI_UPPER_IO     0x0000ffff
  76 #define OCOTEA_PCI_LOWER_MEM    0x80000000
  77 #define OCOTEA_PCI_UPPER_MEM    0xffffefff
  78
  79 #define OCOTEA_PCI_CFGREGS_BASE 0x000000020ec00000ULL
  80 #define OCOTEA_PCI_CFGA_PLB32   0x0ec00000
  81 #define OCOTEA_PCI_CFGD_PLB32   0x0ec00004
  82
  83 #define OCOTEA_PCI_IO_BASE      0x0000000208000000ULL
  84 #define OCOTEA_PCI_IO_SIZE      0x00010000
  85 #define OCOTEA_PCI_MEM_OFFSET   0x00000000
  86
  87 #endif                          /* __ASM_OCOTEA_H__ */
  88 #endif                          /* __KERNEL__ */