arch/ppc/platforms/pal4_setup.c

   1 /*
   2  * arch/ppc/platforms/pal4_setup.c
   3  *
   4  * Board setup routines for the SBS PalomarIV.
   5  *
   6  * Author: Dan Cox
   7  *
   8  * 2002 (c) MontaVista, Software, Inc.  This file is licensed under
   9  * the terms of the GNU General Public License version 2.  This program
  10  * is licensed "as is" without any warranty of any kind, whether express
  11  * or implied.
  12  */
  13
  14 #include <linux/config.h>
  15 #include <linux/kernel.h>
  16 #include <linux/init.h>
  17 #include <linux/types.h>
  18 #include <linux/errno.h>
  19 #include <linux/reboot.h>
  20 #include <linux/time.h>
  21 #include <linux/irq.h>
  22 #include <linux/kdev_t.h>
  23 #include <linux/initrd.h>
  24 #include <linux/console.h>
  25 #include <linux/seq_file.h>
  26 #include <linux/root_dev.h>
  27
  28 #include <asm/io.h>
  29 #include <asm/todc.h>
  30 #include <asm/bootinfo.h>
  31
  32 #include <syslib/cpc700.h>
  33
  34 #include "pal4.h"
  35
  36 extern void pal4_find_bridges(void);
  37
  38 unsigned int cpc700_irq_assigns[][2] = {
  39         {1, 1},    /* IRQ 0: ECC correctable error */
  40         {1, 1},    /* IRQ 1: PCI write to memory range */
  41         {0, 1},    /* IRQ 2: PCI write to command register */
  42         {0, 1},    /* IRQ 3: UART 0 */
  43         {0, 1},    /* IRQ 4: UART 1 */
  44         {0, 1},    /* IRQ 5: ICC 0 */
  45         {0, 1},    /* IRQ 6: ICC 1 */
  46         {0, 1},    /* IRQ 7: GPT compare 0 */
  47         {0, 1},    /* IRQ 8: GPT compare 1 */
  48         {0, 1},    /* IRQ 9: GPT compare 2 */
  49         {0, 1},    /* IRQ 10: GPT compare 3 */
  50         {0, 1},    /* IRQ 11: GPT compare 4 */
  51         {0, 1},    /* IRQ 12: GPT capture 0 */
  52         {0, 1},    /* IRQ 13: GPT capture 1 */
  53         {0, 1},    /* IRQ 14: GPT capture 2 */
  54         {0, 1},    /* IRQ 15: GPT capture 3 */
  55         {0, 1},    /* IRQ 16: GPT capture 4 */
  56         {0, 0},    /* IRQ 17: reserved */
  57         {0, 0},    /* IRQ 18: reserved */
  58         {0, 0},    /* IRQ 19: reserved */
  59         {0, 0},    /* IRQ 20: reserved */
  60         {0, 1},    /* IRQ 21: Ethernet */
  61         {0, 0},    /* IRQ 22: reserved */
  62         {0, 0},    /* IRQ 23: reserved */
  63         {0, 0},    /* IRQ 24: resreved */
  64         {0, 0},    /* IRQ 25: reserved */
  65         {0, 0},    /* IRQ 26: reserved */
  66         {0, 0},    /* IRQ 27: reserved */
  67         {0, 0},    /* IRQ 28: reserved */
  68         {0, 0},    /* IRQ 29: reserved */
  69         {0, 0},    /* IRQ 30: reserved */
  70         {0, 0},    /* IRQ 31: reserved */
  71 };
  72
  73 static int
  74 pal4_show_cpuinfo(struct seq_file *m)
  75 {
  76         seq_printf(m, "board\t\t: SBS Palomar IV\n");
  77
  78         return 0;
  79 }
  80
  81 static void
  82 pal4_restart(char *cmd)
  83 {
  84         local_irq_disable();
  85         __asm__ __volatile__("lis  3,0xfff0\n \
  86                               ori  3,3,0x100\n \
  87                               mtspr 26,3\n \
  88                               li   3,0\n \
  89                               mtspr 27,3\n \
  90                               rfi");
  91
  92         for(;;);
  93 }
  94
  95 static void
  96 pal4_power_off(void)
  97 {
  98         local_irq_disable();
  99         for(;;);
 100 }
 101
 102 static void
 103 pal4_halt(void)
 104 {
 105         pal4_power_off();
 106 }
 107
 108 TODC_ALLOC();
 109
 110 static void __init
 111 pal4_setup_arch(void)
 112 {
 113         unsigned long l2;
 114
 115         TODC_INIT(TODC_TYPE_MK48T37, 0, 0,
 116                   ioremap(PAL4_NVRAM, PAL4_NVRAM_SIZE), 8);
 117
 118         pal4_find_bridges();
 119
 120 #ifdef CONFIG_BLK_DEV_INITRD
 121         if (initrd_start)
 122                 ROOT_DEV = Root_RAM0;
 123         else
 124 #endif
 125                 ROOT_DEV = Root_NFS;
 126
 127         /* The L2 gets disabled in the bootloader, but all the proper
 128            bits should be present from the fw, so just re-enable it */
 129         l2 = _get_L2CR();
 130         if (!(l2 & L2CR_L2E)) {
 131                 /* presume that it was initially set if the size is
 132                    still present. */
 133                 if (l2 ^ L2CR_L2SIZ_MASK)
 134                         _set_L2CR(l2 | L2CR_L2E);
 135                 else
 136                         printk("L2 not set by firmware; left disabled.\n");
 137         }
 138 }
 139
 140 static void __init
 141 pal4_map_io(void)
 142 {
 143         io_block_mapping(0xf0000000, 0xf0000000, 0x10000000, _PAGE_IO);
 144 }
 145
 146 void __init
 147 platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
 148               unsigned long r6, unsigned long r7)
 149 {
 150         parse_bootinfo(find_bootinfo());
 151
 152         isa_io_base = 0 /*PAL4_ISA_IO_BASE*/;
 153         pci_dram_offset = 0 /*PAL4_PCI_SYS_MEM_BASE*/;
 154
 155         ppc_md.setup_arch = pal4_setup_arch;
 156         ppc_md.show_cpuinfo = pal4_show_cpuinfo;
 157
 158         ppc_md.setup_io_mappings = pal4_map_io;
 159
 160         ppc_md.init_IRQ = cpc700_init_IRQ;
 161         ppc_md.get_irq = cpc700_get_irq;
 162
 163         ppc_md.restart = pal4_restart;
 164         ppc_md.halt = pal4_halt;
 165         ppc_md.power_off = pal4_power_off;
 166
 167         ppc_md.time_init = todc_time_init;
 168         ppc_md.set_rtc_time = todc_set_rtc_time;
 169         ppc_md.get_rtc_time = todc_get_rtc_time;
 170         ppc_md.calibrate_decr = todc_calibrate_decr;
 171
 172         ppc_md.nvram_read_val = todc_direct_read_val;
 173         ppc_md.nvram_write_val = todc_direct_write_val;
 174 }
 175