arch/ppc/platforms/spruce.c

   1 /*
   2  * Board and PCI setup routines for IBM Spruce
   3  *
   4  * Author: MontaVista Software <source@mvista.com>
   5  *
   6  * 2000-2004 (c) MontaVista, Software, Inc.  This file is licensed under
   7  * the terms of the GNU General Public License version 2.  This program
   8  * is licensed "as is" without any warranty of any kind, whether express
   9  * or implied.
  10  */
  11
  12 #include <linux/config.h>
  13 #include <linux/stddef.h>
  14 #include <linux/kernel.h>
  15 #include <linux/init.h>
  16 #include <linux/errno.h>
  17 #include <linux/reboot.h>
  18 #include <linux/pci.h>
  19 #include <linux/kdev_t.h>
  20 #include <linux/types.h>
  21 #include <linux/major.h>
  22 #include <linux/initrd.h>
  23 #include <linux/console.h>
  24 #include <linux/delay.h>
  25 #include <linux/seq_file.h>
  26 #include <linux/ide.h>
  27 #include <linux/root_dev.h>
  28 #include <linux/serial.h>
  29 #include <linux/tty.h>
  30 #include <linux/serial_core.h>
  31
  32 #include <asm/system.h>
  33 #include <asm/pgtable.h>
  34 #include <asm/page.h>
  35 #include <asm/dma.h>
  36 #include <asm/io.h>
  37 #include <asm/machdep.h>
  38 #include <asm/time.h>
  39 #include <asm/todc.h>
  40 #include <asm/bootinfo.h>
  41 #include <asm/kgdb.h>
  42
  43 #include <syslib/cpc700.h>
  44
  45 #include "spruce.h"
  46
  47 static inline int
  48 spruce_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
  49 {
  50         static char pci_irq_table[][4] =
  51                 /*
  52                  *      PCI IDSEL/INTPIN->INTLINE
  53                  *      A       B       C       D
  54                  */
  55         {
  56                 {23, 24, 25, 26},       /* IDSEL 1 - PCI slot 3 */
  57                 {24, 25, 26, 23},       /* IDSEL 2 - PCI slot 2 */
  58                 {25, 26, 23, 24},       /* IDSEL 3 - PCI slot 1 */
  59                 {26, 23, 24, 25},       /* IDSEL 4 - PCI slot 0 */
  60         };
  61
  62         const long min_idsel = 1, max_idsel = 4, irqs_per_slot = 4;
  63         return PCI_IRQ_TABLE_LOOKUP;
  64 }
  65
  66 static void __init
  67 spruce_setup_hose(void)
  68 {
  69         struct pci_controller *hose;
  70
  71         /* Setup hose */
  72         hose = pcibios_alloc_controller();
  73         if (!hose)
  74                 return;
  75
  76         hose->first_busno = 0;
  77         hose->last_busno = 0xff;
  78
  79         pci_init_resource(&hose->io_resource,
  80                         SPRUCE_PCI_LOWER_IO,
  81                         SPRUCE_PCI_UPPER_IO,
  82                         IORESOURCE_IO,
  83                         "PCI host bridge");
  84
  85         pci_init_resource(&hose->mem_resources[0],
  86                         SPRUCE_PCI_LOWER_MEM,
  87                         SPRUCE_PCI_UPPER_MEM,
  88                         IORESOURCE_MEM,
  89                         "PCI host bridge");
  90
  91         hose->io_space.start = SPRUCE_PCI_LOWER_IO;
  92         hose->io_space.end = SPRUCE_PCI_UPPER_IO;
  93         hose->mem_space.start = SPRUCE_PCI_LOWER_MEM;
  94         hose->mem_space.end = SPRUCE_PCI_UPPER_MEM;
  95         hose->io_base_virt = (void *)SPRUCE_ISA_IO_BASE;
  96
  97         setup_indirect_pci(hose,
  98                         SPRUCE_PCI_CONFIG_ADDR,
  99                         SPRUCE_PCI_CONFIG_DATA);
 100
 101         hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
 102
 103         ppc_md.pci_swizzle = common_swizzle;
 104         ppc_md.pci_map_irq = spruce_map_irq;
 105 }
 106
 107 /*
 108  * CPC700 PIC interrupt programming table
 109  *
 110  * First entry is the sensitivity (level/edge), second is the polarity.
 111  */
 112 unsigned int cpc700_irq_assigns[32][2] = {
 113         { 1, 1 },       /* IRQ  0: ECC Correctable Error - rising edge */
 114         { 1, 1 },       /* IRQ  1: PCI Write Mem Range   - rising edge */
 115         { 0, 1 },       /* IRQ  2: PCI Write Command Reg - active high */
 116         { 0, 1 },       /* IRQ  3: UART 0                - active high */
 117         { 0, 1 },       /* IRQ  4: UART 1                - active high */
 118         { 0, 1 },       /* IRQ  5: ICC 0                 - active high */
 119         { 0, 1 },       /* IRQ  6: ICC 1                 - active high */
 120         { 0, 1 },       /* IRQ  7: GPT Compare 0         - active high */
 121         { 0, 1 },       /* IRQ  8: GPT Compare 1         - active high */
 122         { 0, 1 },       /* IRQ  9: GPT Compare 2         - active high */
 123         { 0, 1 },       /* IRQ 10: GPT Compare 3         - active high */
 124         { 0, 1 },       /* IRQ 11: GPT Compare 4         - active high */
 125         { 0, 1 },       /* IRQ 12: GPT Capture 0         - active high */
 126         { 0, 1 },       /* IRQ 13: GPT Capture 1         - active high */
 127         { 0, 1 },       /* IRQ 14: GPT Capture 2         - active high */
 128         { 0, 1 },       /* IRQ 15: GPT Capture 3         - active high */
 129         { 0, 1 },       /* IRQ 16: GPT Capture 4         - active high */
 130         { 0, 0 },       /* IRQ 17: Reserved */
 131         { 0, 0 },       /* IRQ 18: Reserved */
 132         { 0, 0 },       /* IRQ 19: Reserved */
 133         { 0, 1 },       /* IRQ 20: FPGA EXT_IRQ0         - active high */
 134         { 1, 1 },       /* IRQ 21: Mouse                 - rising edge */
 135         { 1, 1 },       /* IRQ 22: Keyboard              - rising edge */
 136         { 0, 0 },       /* IRQ 23: PCI Slot 3            - active low */
 137         { 0, 0 },       /* IRQ 24: PCI Slot 2            - active low */
 138         { 0, 0 },       /* IRQ 25: PCI Slot 1            - active low */
 139         { 0, 0 },       /* IRQ 26: PCI Slot 0            - active low */
 140 };
 141
 142 static void __init
 143 spruce_calibrate_decr(void)
 144 {
 145         int freq, divisor = 4;
 146
 147         /* determine processor bus speed */
 148         freq = SPRUCE_BUS_SPEED;
 149         tb_ticks_per_jiffy = freq / HZ / divisor;
 150         tb_to_us = mulhwu_scale_factor(freq/divisor, 1000000);
 151 }
 152
 153 static int
 154 spruce_show_cpuinfo(struct seq_file *m)
 155 {
 156         seq_printf(m, "vendor\t\t: IBM\n");
 157         seq_printf(m, "machine\t\t: Spruce\n");
 158
 159         return 0;
 160 }
 161
 162 static void __init
 163 spruce_early_serial_map(void)
 164 {
 165         u32 uart_clk;
 166         struct uart_port serial_req;
 167
 168         if (SPRUCE_UARTCLK_IS_33M(readb(SPRUCE_FPGA_REG_A)))
 169                 uart_clk = SPRUCE_BAUD_33M * 16;
 170         else
 171                 uart_clk = SPRUCE_BAUD_30M * 16;
 172
 173         /* Setup serial port access */
 174         memset(&serial_req, 0, sizeof(serial_req));
 175         serial_req.uartclk = uart_clk;
 176         serial_req.irq = UART0_INT;
 177         serial_req.flags = UPF_BOOT_AUTOCONF;
 178         serial_req.iotype = UPIO_MEM;
 179         serial_req.membase = (u_char *)UART0_IO_BASE;
 180         serial_req.regshift = 0;
 181
 182 #if defined(CONFIG_KGDB) || defined(CONFIG_SERIAL_TEXT_DEBUG)
 183         gen550_init(0, &serial_req);
 184 #endif
 185 #ifdef CONFIG_SERIAL_8250
 186         if (early_serial_setup(&serial_req) != 0)
 187                 printk("Early serial init of port 0 failed\n");
 188 #endif
 189
 190         /* Assume early_serial_setup() doesn't modify serial_req */
 191         serial_req.line = 1;
 192         serial_req.irq = UART1_INT;
 193         serial_req.membase = (u_char *)UART1_IO_BASE;
 194
 195 #if defined(CONFIG_KGDB) || defined(CONFIG_SERIAL_TEXT_DEBUG)
 196         gen550_init(1, &serial_req);
 197 #endif
 198 #ifdef CONFIG_SERIAL_8250
 199         if (early_serial_setup(&serial_req) != 0)
 200                 printk("Early serial init of port 1 failed\n");
 201 #endif
 202 }
 203
 204 TODC_ALLOC();
 205
 206 static void __init
 207 spruce_setup_arch(void)
 208 {
 209         /* Setup TODC access */
 210         TODC_INIT(TODC_TYPE_DS1643, 0, 0, SPRUCE_RTC_BASE_ADDR, 8);
 211
 212         /* init to some ~sane value until calibrate_delay() runs */
 213         loops_per_jiffy = 50000000 / HZ;
 214
 215         /* Setup PCI host bridge */
 216         spruce_setup_hose();
 217
 218 #ifdef CONFIG_BLK_DEV_INITRD
 219         if (initrd_start)
 220                 ROOT_DEV = Root_RAM0;
 221         else
 222 #endif
 223 #ifdef CONFIG_ROOT_NFS
 224                 ROOT_DEV = Root_NFS;
 225 #else
 226                 ROOT_DEV = Root_SDA1;
 227 #endif
 228
 229         /* Identify the system */
 230         printk(KERN_INFO "System Identification: IBM Spruce\n");
 231         printk(KERN_INFO "Port by MontaVista Software, Inc. (source@mvista.com)\n");
 232 }
 233
 234 static void
 235 spruce_restart(char *cmd)
 236 {
 237         local_irq_disable();
 238
 239         /* SRR0 has system reset vector, SRR1 has default MSR value */
 240         /* rfi restores MSR from SRR1 and sets the PC to the SRR0 value */
 241         __asm__ __volatile__
 242         ("\n\
 243         lis     3,0xfff0        \n\
 244         ori     3,3,0x0100      \n\
 245         mtspr   26,3            \n\
 246         li      3,0             \n\
 247         mtspr   27,3            \n\
 248         rfi                     \n\
 249         ");
 250         for(;;);
 251 }
 252
 253 static void
 254 spruce_power_off(void)
 255 {
 256         for(;;);
 257 }
 258
 259 static void
 260 spruce_halt(void)
 261 {
 262         spruce_restart(NULL);
 263 }
 264
 265 static void __init
 266 spruce_map_io(void)
 267 {
 268         io_block_mapping(SPRUCE_PCI_IO_BASE, SPRUCE_PCI_PHY_IO_BASE,
 269                          0x08000000, _PAGE_IO);
 270 }
 271
 272 /*
 273  * Set BAT 3 to map 0xf8000000 to end of physical memory space 1-to-1.
 274  */
 275 static __inline__ void
 276 spruce_set_bat(void)
 277 {
 278         mb();
 279         mtspr(SPRN_DBAT1U, 0xf8000ffe);
 280         mtspr(SPRN_DBAT1L, 0xf800002a);
 281         mb();
 282 }
 283
 284 void __init
 285 platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
 286               unsigned long r6, unsigned long r7)
 287 {
 288         parse_bootinfo(find_bootinfo());
 289
 290         /* Map in board regs, etc. */
 291         spruce_set_bat();
 292
 293         isa_io_base = SPRUCE_ISA_IO_BASE;
 294         pci_dram_offset = SPRUCE_PCI_SYS_MEM_BASE;
 295
 296         ppc_md.setup_arch = spruce_setup_arch;
 297         ppc_md.show_cpuinfo = spruce_show_cpuinfo;
 298         ppc_md.init_IRQ = cpc700_init_IRQ;
 299         ppc_md.get_irq = cpc700_get_irq;
 300
 301         ppc_md.setup_io_mappings = spruce_map_io;
 302
 303         ppc_md.restart = spruce_restart;
 304         ppc_md.power_off = spruce_power_off;
 305         ppc_md.halt = spruce_halt;
 306
 307         ppc_md.time_init = todc_time_init;
 308         ppc_md.set_rtc_time = todc_set_rtc_time;
 309         ppc_md.get_rtc_time = todc_get_rtc_time;
 310         ppc_md.calibrate_decr = spruce_calibrate_decr;
 311
 312         ppc_md.nvram_read_val = todc_direct_read_val;
 313         ppc_md.nvram_write_val = todc_direct_write_val;
 314
 315         spruce_early_serial_map();
 316
 317 #ifdef CONFIG_SERIAL_TEXT_DEBUG
 318         ppc_md.progress = gen550_progress;
 319 #endif /* CONFIG_SERIAL_TEXT_DEBUG */
 320 #ifdef CONFIG_KGDB
 321         ppc_md.kgdb_map_scc = gen550_kgdb_map_scc;
 322 #endif
 323 }