3 * Copyright (C) 2001 Dave Engebretsen & Todd Inglett IBM Corporation
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include <linux/init.h>
21 #include <linux/list.h>
22 #include <linux/notifier.h>
23 #include <linux/pci.h>
24 #include <linux/proc_fs.h>
25 #include <linux/rbtree.h>
26 #include <linux/seq_file.h>
27 #include <linux/spinlock.h>
28 #include <asm/atomic.h>
31 #include <asm/machdep.h>
33 #include <asm/atomic.h>
34 #include <asm/systemcfg.h>
35 #include <asm/ppc-pci.h>
40 * EEH, or "Extended Error Handling" is a PCI bridge technology for
41 * dealing with PCI bus errors that can't be dealt with within the
42 * usual PCI framework, except by check-stopping the CPU. Systems
43 * that are designed for high-availability/reliability cannot afford
44 * to crash due to a "mere" PCI error, thus the need for EEH.
45 * An EEH-capable bridge operates by converting a detected error
46 * into a "slot freeze", taking the PCI adapter off-line, making
47 * the slot behave, from the OS'es point of view, as if the slot
48 * were "empty": all reads return 0xff's and all writes are silently
49 * ignored. EEH slot isolation events can be triggered by parity
50 * errors on the address or data busses (e.g. during posted writes),
51 * which in turn might be caused by low voltage on the bus, dust,
52 * vibration, humidity, radioactivity or plain-old failed hardware.
54 * Note, however, that one of the leading causes of EEH slot
55 * freeze events are buggy device drivers, buggy device microcode,
56 * or buggy device hardware. This is because any attempt by the
57 * device to bus-master data to a memory address that is not
58 * assigned to the device will trigger a slot freeze. (The idea
59 * is to prevent devices-gone-wild from corrupting system memory).
60 * Buggy hardware/drivers will have a miserable time co-existing
63 * Ideally, a PCI device driver, when suspecting that an isolation
64 * event has occured (e.g. by reading 0xff's), will then ask EEH
65 * whether this is the case, and then take appropriate steps to
66 * reset the PCI slot, the PCI device, and then resume operations.
67 * However, until that day, the checking is done here, with the
68 * eeh_check_failure() routine embedded in the MMIO macros. If
69 * the slot is found to be isolated, an "EEH Event" is synthesized
70 * and sent out for processing.
73 /* EEH event workqueue setup. */
74 static DEFINE_SPINLOCK(eeh_eventlist_lock
);
75 LIST_HEAD(eeh_eventlist
);
76 static void eeh_event_handler(void *);
77 DECLARE_WORK(eeh_event_wq
, eeh_event_handler
, NULL
);
79 static struct notifier_block
*eeh_notifier_chain
;
82 * If a device driver keeps reading an MMIO register in an interrupt
83 * handler after a slot isolation event has occurred, we assume it
84 * is broken and panic. This sets the threshold for how many read
85 * attempts we allow before panicking.
87 #define EEH_MAX_FAILS 1000
88 static atomic_t eeh_fail_count
;
91 static int ibm_set_eeh_option
;
92 static int ibm_set_slot_reset
;
93 static int ibm_read_slot_reset_state
;
94 static int ibm_read_slot_reset_state2
;
95 static int ibm_slot_error_detail
;
97 static int eeh_subsystem_enabled
;
99 /* Buffer for reporting slot-error-detail rtas calls */
100 static unsigned char slot_errbuf
[RTAS_ERROR_LOG_MAX
];
101 static DEFINE_SPINLOCK(slot_errbuf_lock
);
102 static int eeh_error_buf_size
;
104 /* System monitoring statistics */
105 static DEFINE_PER_CPU(unsigned long, total_mmio_ffs
);
106 static DEFINE_PER_CPU(unsigned long, false_positives
);
107 static DEFINE_PER_CPU(unsigned long, ignored_failures
);
108 static DEFINE_PER_CPU(unsigned long, slot_resets
);
111 * The pci address cache subsystem. This subsystem places
112 * PCI device address resources into a red-black tree, sorted
113 * according to the address range, so that given only an i/o
114 * address, the corresponding PCI device can be **quickly**
115 * found. It is safe to perform an address lookup in an interrupt
116 * context; this ability is an important feature.
118 * Currently, the only customer of this code is the EEH subsystem;
119 * thus, this code has been somewhat tailored to suit EEH better.
120 * In particular, the cache does *not* hold the addresses of devices
121 * for which EEH is not enabled.
123 * (Implementation Note: The RB tree seems to be better/faster
124 * than any hash algo I could think of for this problem, even
125 * with the penalty of slow pointer chases for d-cache misses).
127 struct pci_io_addr_range
129 struct rb_node rb_node
;
130 unsigned long addr_lo
;
131 unsigned long addr_hi
;
132 struct pci_dev
*pcidev
;
136 static struct pci_io_addr_cache
138 struct rb_root rb_root
;
139 spinlock_t piar_lock
;
140 } pci_io_addr_cache_root
;
142 static inline struct pci_dev
*__pci_get_device_by_addr(unsigned long addr
)
144 struct rb_node
*n
= pci_io_addr_cache_root
.rb_root
.rb_node
;
147 struct pci_io_addr_range
*piar
;
148 piar
= rb_entry(n
, struct pci_io_addr_range
, rb_node
);
150 if (addr
< piar
->addr_lo
) {
153 if (addr
> piar
->addr_hi
) {
156 pci_dev_get(piar
->pcidev
);
166 * pci_get_device_by_addr - Get device, given only address
167 * @addr: mmio (PIO) phys address or i/o port number
169 * Given an mmio phys address, or a port number, find a pci device
170 * that implements this address. Be sure to pci_dev_put the device
171 * when finished. I/O port numbers are assumed to be offset
172 * from zero (that is, they do *not* have pci_io_addr added in).
173 * It is safe to call this function within an interrupt.
175 static struct pci_dev
*pci_get_device_by_addr(unsigned long addr
)
180 spin_lock_irqsave(&pci_io_addr_cache_root
.piar_lock
, flags
);
181 dev
= __pci_get_device_by_addr(addr
);
182 spin_unlock_irqrestore(&pci_io_addr_cache_root
.piar_lock
, flags
);
188 * Handy-dandy debug print routine, does nothing more
189 * than print out the contents of our addr cache.
191 static void pci_addr_cache_print(struct pci_io_addr_cache
*cache
)
196 n
= rb_first(&cache
->rb_root
);
198 struct pci_io_addr_range
*piar
;
199 piar
= rb_entry(n
, struct pci_io_addr_range
, rb_node
);
200 printk(KERN_DEBUG
"PCI: %s addr range %d [%lx-%lx]: %s\n",
201 (piar
->flags
& IORESOURCE_IO
) ? "i/o" : "mem", cnt
,
202 piar
->addr_lo
, piar
->addr_hi
, pci_name(piar
->pcidev
));
209 /* Insert address range into the rb tree. */
210 static struct pci_io_addr_range
*
211 pci_addr_cache_insert(struct pci_dev
*dev
, unsigned long alo
,
212 unsigned long ahi
, unsigned int flags
)
214 struct rb_node
**p
= &pci_io_addr_cache_root
.rb_root
.rb_node
;
215 struct rb_node
*parent
= NULL
;
216 struct pci_io_addr_range
*piar
;
218 /* Walk tree, find a place to insert into tree */
221 piar
= rb_entry(parent
, struct pci_io_addr_range
, rb_node
);
222 if (ahi
< piar
->addr_lo
) {
223 p
= &parent
->rb_left
;
224 } else if (alo
> piar
->addr_hi
) {
225 p
= &parent
->rb_right
;
227 if (dev
!= piar
->pcidev
||
228 alo
!= piar
->addr_lo
|| ahi
!= piar
->addr_hi
) {
229 printk(KERN_WARNING
"PIAR: overlapping address range\n");
234 piar
= (struct pci_io_addr_range
*)kmalloc(sizeof(struct pci_io_addr_range
), GFP_ATOMIC
);
244 printk(KERN_DEBUG
"PIAR: insert range=[%lx:%lx] dev=%s\n",
245 alo
, ahi
, pci_name (dev
));
248 rb_link_node(&piar
->rb_node
, parent
, p
);
249 rb_insert_color(&piar
->rb_node
, &pci_io_addr_cache_root
.rb_root
);
254 static void __pci_addr_cache_insert_device(struct pci_dev
*dev
)
256 struct device_node
*dn
;
261 dn
= pci_device_to_OF_node(dev
);
263 printk(KERN_WARNING
"PCI: no pci dn found for dev=%s\n", pci_name(dev
));
267 /* Skip any devices for which EEH is not enabled. */
269 if (!(pdn
->eeh_mode
& EEH_MODE_SUPPORTED
) ||
270 pdn
->eeh_mode
& EEH_MODE_NOCHECK
) {
272 printk(KERN_INFO
"PCI: skip building address cache for=%s - %s\n",
273 pci_name(dev
), pdn
->node
->full_name
);
278 /* The cache holds a reference to the device... */
281 /* Walk resources on this device, poke them into the tree */
282 for (i
= 0; i
< DEVICE_COUNT_RESOURCE
; i
++) {
283 unsigned long start
= pci_resource_start(dev
,i
);
284 unsigned long end
= pci_resource_end(dev
,i
);
285 unsigned int flags
= pci_resource_flags(dev
,i
);
287 /* We are interested only bus addresses, not dma or other stuff */
288 if (0 == (flags
& (IORESOURCE_IO
| IORESOURCE_MEM
)))
290 if (start
== 0 || ~start
== 0 || end
== 0 || ~end
== 0)
292 pci_addr_cache_insert(dev
, start
, end
, flags
);
296 /* If there was nothing to add, the cache has no reference... */
302 * pci_addr_cache_insert_device - Add a device to the address cache
303 * @dev: PCI device whose I/O addresses we are interested in.
305 * In order to support the fast lookup of devices based on addresses,
306 * we maintain a cache of devices that can be quickly searched.
307 * This routine adds a device to that cache.
309 static void pci_addr_cache_insert_device(struct pci_dev
*dev
)
313 spin_lock_irqsave(&pci_io_addr_cache_root
.piar_lock
, flags
);
314 __pci_addr_cache_insert_device(dev
);
315 spin_unlock_irqrestore(&pci_io_addr_cache_root
.piar_lock
, flags
);
318 static inline void __pci_addr_cache_remove_device(struct pci_dev
*dev
)
324 n
= rb_first(&pci_io_addr_cache_root
.rb_root
);
326 struct pci_io_addr_range
*piar
;
327 piar
= rb_entry(n
, struct pci_io_addr_range
, rb_node
);
329 if (piar
->pcidev
== dev
) {
330 rb_erase(n
, &pci_io_addr_cache_root
.rb_root
);
338 /* The cache no longer holds its reference to this device... */
344 * pci_addr_cache_remove_device - remove pci device from addr cache
345 * @dev: device to remove
347 * Remove a device from the addr-cache tree.
348 * This is potentially expensive, since it will walk
349 * the tree multiple times (once per resource).
350 * But so what; device removal doesn't need to be that fast.
352 static void pci_addr_cache_remove_device(struct pci_dev
*dev
)
356 spin_lock_irqsave(&pci_io_addr_cache_root
.piar_lock
, flags
);
357 __pci_addr_cache_remove_device(dev
);
358 spin_unlock_irqrestore(&pci_io_addr_cache_root
.piar_lock
, flags
);
362 * pci_addr_cache_build - Build a cache of I/O addresses
364 * Build a cache of pci i/o addresses. This cache will be used to
365 * find the pci device that corresponds to a given address.
366 * This routine scans all pci busses to build the cache.
367 * Must be run late in boot process, after the pci controllers
368 * have been scaned for devices (after all device resources are known).
370 void __init
pci_addr_cache_build(void)
372 struct pci_dev
*dev
= NULL
;
374 if (!eeh_subsystem_enabled
)
377 spin_lock_init(&pci_io_addr_cache_root
.piar_lock
);
379 while ((dev
= pci_get_device(PCI_ANY_ID
, PCI_ANY_ID
, dev
)) != NULL
) {
380 /* Ignore PCI bridges ( XXX why ??) */
381 if ((dev
->class >> 16) == PCI_BASE_CLASS_BRIDGE
) {
384 pci_addr_cache_insert_device(dev
);
388 /* Verify tree built up above, echo back the list of addrs. */
389 pci_addr_cache_print(&pci_io_addr_cache_root
);
393 /* --------------------------------------------------------------- */
394 /* Above lies the PCI Address Cache. Below lies the EEH event infrastructure */
397 * eeh_register_notifier - Register to find out about EEH events.
398 * @nb: notifier block to callback on events
400 int eeh_register_notifier(struct notifier_block
*nb
)
402 return notifier_chain_register(&eeh_notifier_chain
, nb
);
406 * eeh_unregister_notifier - Unregister to an EEH event notifier.
407 * @nb: notifier block to callback on events
409 int eeh_unregister_notifier(struct notifier_block
*nb
)
411 return notifier_chain_unregister(&eeh_notifier_chain
, nb
);
415 * read_slot_reset_state - Read the reset state of a device node's slot
416 * @dn: device node to read
417 * @rets: array to return results in
419 static int read_slot_reset_state(struct pci_dn
*pdn
, int rets
[])
423 if (ibm_read_slot_reset_state2
!= RTAS_UNKNOWN_SERVICE
) {
424 token
= ibm_read_slot_reset_state2
;
427 token
= ibm_read_slot_reset_state
;
428 rets
[2] = 0; /* fake PE Unavailable info */
432 return rtas_call(token
, 3, outputs
, rets
, pdn
->eeh_config_addr
,
433 BUID_HI(pdn
->phb
->buid
), BUID_LO(pdn
->phb
->buid
));
437 * eeh_panic - call panic() for an eeh event that cannot be handled.
438 * The philosophy of this routine is that it is better to panic and
439 * halt the OS than it is to risk possible data corruption by
440 * oblivious device drivers that don't know better.
442 * @dev pci device that had an eeh event
443 * @reset_state current reset state of the device slot
445 static void eeh_panic(struct pci_dev
*dev
, int reset_state
)
448 * XXX We should create a separate sysctl for this.
450 * Since the panic_on_oops sysctl is used to halt the system
451 * in light of potential corruption, we can use it here.
454 panic("EEH: MMIO failure (%d) on device:%s\n", reset_state
,
457 __get_cpu_var(ignored_failures
)++;
458 printk(KERN_INFO
"EEH: Ignored MMIO failure (%d) on device:%s\n",
459 reset_state
, pci_name(dev
));
464 * eeh_event_handler - dispatch EEH events. The detection of a frozen
465 * slot can occur inside an interrupt, where it can be hard to do
466 * anything about it. The goal of this routine is to pull these
467 * detection events out of the context of the interrupt handler, and
468 * re-dispatch them for processing at a later time in a normal context.
472 static void eeh_event_handler(void *dummy
)
475 struct eeh_event
*event
;
478 spin_lock_irqsave(&eeh_eventlist_lock
, flags
);
480 if (!list_empty(&eeh_eventlist
)) {
481 event
= list_entry(eeh_eventlist
.next
, struct eeh_event
, list
);
482 list_del(&event
->list
);
484 spin_unlock_irqrestore(&eeh_eventlist_lock
, flags
);
488 printk(KERN_INFO
"EEH: MMIO failure (%d), notifiying device "
489 "%s\n", event
->reset_state
,
490 pci_name(event
->dev
));
492 atomic_set(&eeh_fail_count
, 0);
493 notifier_call_chain (&eeh_notifier_chain
,
494 EEH_NOTIFY_FREEZE
, event
);
496 __get_cpu_var(slot_resets
)++;
498 pci_dev_put(event
->dev
);
504 * eeh_token_to_phys - convert EEH address token to phys address
505 * @token i/o token, should be address in the form 0xA....
507 static inline unsigned long eeh_token_to_phys(unsigned long token
)
512 ptep
= find_linux_pte(init_mm
.pgd
, token
);
515 pa
= pte_pfn(*ptep
) << PAGE_SHIFT
;
517 return pa
| (token
& (PAGE_SIZE
-1));
521 * eeh_dn_check_failure - check if all 1's data is due to EEH slot freeze
523 * @dev pci device, if known
525 * Check for an EEH failure for the given device node. Call this
526 * routine if the result of a read was all 0xff's and you want to
527 * find out if this is due to an EEH slot freeze. This routine
528 * will query firmware for the EEH status.
530 * Returns 0 if there has not been an EEH error; otherwise returns
531 * a non-zero value and queues up a slot isolation event notification.
533 * It is safe to call this routine in an interrupt context.
535 int eeh_dn_check_failure(struct device_node
*dn
, struct pci_dev
*dev
)
541 struct eeh_event
*event
;
544 __get_cpu_var(total_mmio_ffs
)++;
546 if (!eeh_subsystem_enabled
)
553 /* Access to IO BARs might get this far and still not want checking. */
554 if (!pdn
->eeh_capable
|| !(pdn
->eeh_mode
& EEH_MODE_SUPPORTED
) ||
555 pdn
->eeh_mode
& EEH_MODE_NOCHECK
) {
559 if (!pdn
->eeh_config_addr
) {
564 * If we already have a pending isolation event for this
565 * slot, we know it's bad already, we don't need to check...
567 if (pdn
->eeh_mode
& EEH_MODE_ISOLATED
) {
568 atomic_inc(&eeh_fail_count
);
569 if (atomic_read(&eeh_fail_count
) >= EEH_MAX_FAILS
) {
570 /* re-read the slot reset state */
571 if (read_slot_reset_state(pdn
, rets
) != 0)
572 rets
[0] = -1; /* reset state unknown */
573 eeh_panic(dev
, rets
[0]);
579 * Now test for an EEH failure. This is VERY expensive.
580 * Note that the eeh_config_addr may be a parent device
581 * in the case of a device behind a bridge, or it may be
582 * function zero of a multi-function device.
583 * In any case they must share a common PHB.
585 ret
= read_slot_reset_state(pdn
, rets
);
586 if (!(ret
== 0 && rets
[1] == 1 && (rets
[0] == 2 || rets
[0] == 4))) {
587 __get_cpu_var(false_positives
)++;
591 /* prevent repeated reports of this failure */
592 pdn
->eeh_mode
|= EEH_MODE_ISOLATED
;
594 reset_state
= rets
[0];
596 spin_lock_irqsave(&slot_errbuf_lock
, flags
);
597 memset(slot_errbuf
, 0, eeh_error_buf_size
);
599 rc
= rtas_call(ibm_slot_error_detail
,
600 8, 1, NULL
, pdn
->eeh_config_addr
,
601 BUID_HI(pdn
->phb
->buid
),
602 BUID_LO(pdn
->phb
->buid
), NULL
, 0,
603 virt_to_phys(slot_errbuf
),
605 1 /* Temporary Error */);
608 log_error(slot_errbuf
, ERR_TYPE_RTAS_LOG
, 0);
609 spin_unlock_irqrestore(&slot_errbuf_lock
, flags
);
611 printk(KERN_INFO
"EEH: MMIO failure (%d) on device: %s %s\n",
612 rets
[0], dn
->name
, dn
->full_name
);
613 event
= kmalloc(sizeof(*event
), GFP_ATOMIC
);
615 eeh_panic(dev
, reset_state
);
621 event
->reset_state
= reset_state
;
623 /* We may or may not be called in an interrupt context */
624 spin_lock_irqsave(&eeh_eventlist_lock
, flags
);
625 list_add(&event
->list
, &eeh_eventlist
);
626 spin_unlock_irqrestore(&eeh_eventlist_lock
, flags
);
628 /* Most EEH events are due to device driver bugs. Having
629 * a stack trace will help the device-driver authors figure
630 * out what happened. So print that out. */
632 schedule_work(&eeh_event_wq
);
637 EXPORT_SYMBOL(eeh_dn_check_failure
);
640 * eeh_check_failure - check if all 1's data is due to EEH slot freeze
641 * @token i/o token, should be address in the form 0xA....
642 * @val value, should be all 1's (XXX why do we need this arg??)
644 * Check for an EEH failure at the given token address. Call this
645 * routine if the result of a read was all 0xff's and you want to
646 * find out if this is due to an EEH slot freeze event. This routine
647 * will query firmware for the EEH status.
649 * Note this routine is safe to call in an interrupt context.
651 unsigned long eeh_check_failure(const volatile void __iomem
*token
, unsigned long val
)
655 struct device_node
*dn
;
657 /* Finding the phys addr + pci device; this is pretty quick. */
658 addr
= eeh_token_to_phys((unsigned long __force
) token
);
659 dev
= pci_get_device_by_addr(addr
);
663 dn
= pci_device_to_OF_node(dev
);
664 eeh_dn_check_failure (dn
, dev
);
670 EXPORT_SYMBOL(eeh_check_failure
);
672 struct eeh_early_enable_info
{
673 unsigned int buid_hi
;
674 unsigned int buid_lo
;
677 /* Enable eeh for the given device node. */
678 static void *early_enable_eeh(struct device_node
*dn
, void *data
)
680 struct eeh_early_enable_info
*info
= data
;
682 char *status
= get_property(dn
, "status", NULL
);
683 u32
*class_code
= (u32
*)get_property(dn
, "class-code", NULL
);
684 u32
*vendor_id
= (u32
*)get_property(dn
, "vendor-id", NULL
);
685 u32
*device_id
= (u32
*)get_property(dn
, "device-id", NULL
);
688 struct pci_dn
*pdn
= PCI_DN(dn
);
692 if (status
&& strcmp(status
, "ok") != 0)
693 return NULL
; /* ignore devices with bad status */
695 /* Ignore bad nodes. */
696 if (!class_code
|| !vendor_id
|| !device_id
)
699 /* There is nothing to check on PCI to ISA bridges */
700 if (dn
->type
&& !strcmp(dn
->type
, "isa")) {
701 pdn
->eeh_mode
|= EEH_MODE_NOCHECK
;
706 * Now decide if we are going to "Disable" EEH checking
707 * for this device. We still run with the EEH hardware active,
708 * but we won't be checking for ff's. This means a driver
709 * could return bad data (very bad!), an interrupt handler could
710 * hang waiting on status bits that won't change, etc.
711 * But there are a few cases like display devices that make sense.
713 enable
= 1; /* i.e. we will do checking */
714 if ((*class_code
>> 16) == PCI_BASE_CLASS_DISPLAY
)
718 pdn
->eeh_mode
|= EEH_MODE_NOCHECK
;
720 /* Ok... see if this device supports EEH. Some do, some don't,
721 * and the only way to find out is to check each and every one. */
722 regs
= (u32
*)get_property(dn
, "reg", NULL
);
724 /* First register entry is addr (00BBSS00) */
725 /* Try to enable eeh */
726 ret
= rtas_call(ibm_set_eeh_option
, 4, 1, NULL
,
727 regs
[0], info
->buid_hi
, info
->buid_lo
,
730 eeh_subsystem_enabled
= 1;
731 pdn
->eeh_mode
|= EEH_MODE_SUPPORTED
;
732 pdn
->eeh_config_addr
= regs
[0];
734 printk(KERN_DEBUG
"EEH: %s: eeh enabled\n", dn
->full_name
);
738 /* This device doesn't support EEH, but it may have an
739 * EEH parent, in which case we mark it as supported. */
740 if (dn
->parent
&& PCI_DN(dn
->parent
)
741 && (PCI_DN(dn
->parent
)->eeh_mode
& EEH_MODE_SUPPORTED
)) {
742 /* Parent supports EEH. */
743 pdn
->eeh_mode
|= EEH_MODE_SUPPORTED
;
744 pdn
->eeh_config_addr
= PCI_DN(dn
->parent
)->eeh_config_addr
;
749 printk(KERN_WARNING
"EEH: %s: unable to get reg property.\n",
757 * Initialize EEH by trying to enable it for all of the adapters in the system.
758 * As a side effect we can determine here if eeh is supported at all.
759 * Note that we leave EEH on so failed config cycles won't cause a machine
760 * check. If a user turns off EEH for a particular adapter they are really
761 * telling Linux to ignore errors. Some hardware (e.g. POWER5) won't
762 * grant access to a slot if EEH isn't enabled, and so we always enable
763 * EEH for all slots/all devices.
765 * The eeh-force-off option disables EEH checking globally, for all slots.
766 * Even if force-off is set, the EEH hardware is still enabled, so that
767 * newer systems can boot.
769 void __init
eeh_init(void)
771 struct device_node
*phb
, *np
;
772 struct eeh_early_enable_info info
;
774 np
= of_find_node_by_path("/rtas");
778 ibm_set_eeh_option
= rtas_token("ibm,set-eeh-option");
779 ibm_set_slot_reset
= rtas_token("ibm,set-slot-reset");
780 ibm_read_slot_reset_state2
= rtas_token("ibm,read-slot-reset-state2");
781 ibm_read_slot_reset_state
= rtas_token("ibm,read-slot-reset-state");
782 ibm_slot_error_detail
= rtas_token("ibm,slot-error-detail");
784 if (ibm_set_eeh_option
== RTAS_UNKNOWN_SERVICE
)
787 eeh_error_buf_size
= rtas_token("rtas-error-log-max");
788 if (eeh_error_buf_size
== RTAS_UNKNOWN_SERVICE
) {
789 eeh_error_buf_size
= 1024;
791 if (eeh_error_buf_size
> RTAS_ERROR_LOG_MAX
) {
792 printk(KERN_WARNING
"EEH: rtas-error-log-max is bigger than allocated "
793 "buffer ! (%d vs %d)", eeh_error_buf_size
, RTAS_ERROR_LOG_MAX
);
794 eeh_error_buf_size
= RTAS_ERROR_LOG_MAX
;
797 /* Enable EEH for all adapters. Note that eeh requires buid's */
798 for (phb
= of_find_node_by_name(NULL
, "pci"); phb
;
799 phb
= of_find_node_by_name(phb
, "pci")) {
802 buid
= get_phb_buid(phb
);
803 if (buid
== 0 || PCI_DN(phb
) == NULL
)
806 info
.buid_lo
= BUID_LO(buid
);
807 info
.buid_hi
= BUID_HI(buid
);
808 traverse_pci_devices(phb
, early_enable_eeh
, &info
);
811 if (eeh_subsystem_enabled
)
812 printk(KERN_INFO
"EEH: PCI Enhanced I/O Error Handling Enabled\n");
814 printk(KERN_WARNING
"EEH: No capable adapters found\n");
818 * eeh_add_device_early - enable EEH for the indicated device_node
819 * @dn: device node for which to set up EEH
821 * This routine must be used to perform EEH initialization for PCI
822 * devices that were added after system boot (e.g. hotplug, dlpar).
823 * This routine must be called before any i/o is performed to the
824 * adapter (inluding any config-space i/o).
825 * Whether this actually enables EEH or not for this device depends
826 * on the CEC architecture, type of the device, on earlier boot
827 * command-line arguments & etc.
829 void eeh_add_device_early(struct device_node
*dn
)
831 struct pci_controller
*phb
;
832 struct eeh_early_enable_info info
;
834 if (!dn
|| !PCI_DN(dn
))
836 phb
= PCI_DN(dn
)->phb
;
837 if (NULL
== phb
|| 0 == phb
->buid
) {
838 printk(KERN_WARNING
"EEH: Expected buid but found none for %s\n",
844 info
.buid_hi
= BUID_HI(phb
->buid
);
845 info
.buid_lo
= BUID_LO(phb
->buid
);
846 early_enable_eeh(dn
, &info
);
848 EXPORT_SYMBOL_GPL(eeh_add_device_early
);
851 * eeh_add_device_late - perform EEH initialization for the indicated pci device
852 * @dev: pci device for which to set up EEH
854 * This routine must be used to complete EEH initialization for PCI
855 * devices that were added after system boot (e.g. hotplug, dlpar).
857 void eeh_add_device_late(struct pci_dev
*dev
)
859 struct device_node
*dn
;
861 if (!dev
|| !eeh_subsystem_enabled
)
865 printk(KERN_DEBUG
"EEH: adding device %s\n", pci_name(dev
));
869 dn
= pci_device_to_OF_node(dev
);
870 PCI_DN(dn
)->pcidev
= dev
;
872 pci_addr_cache_insert_device (dev
);
874 EXPORT_SYMBOL_GPL(eeh_add_device_late
);
877 * eeh_remove_device - undo EEH setup for the indicated pci device
878 * @dev: pci device to be removed
880 * This routine should be when a device is removed from a running
881 * system (e.g. by hotplug or dlpar).
883 void eeh_remove_device(struct pci_dev
*dev
)
885 struct device_node
*dn
;
886 if (!dev
|| !eeh_subsystem_enabled
)
889 /* Unregister the device with the EEH/PCI address search system */
891 printk(KERN_DEBUG
"EEH: remove device %s\n", pci_name(dev
));
893 pci_addr_cache_remove_device(dev
);
895 dn
= pci_device_to_OF_node(dev
);
896 PCI_DN(dn
)->pcidev
= NULL
;
899 EXPORT_SYMBOL_GPL(eeh_remove_device
);
901 static int proc_eeh_show(struct seq_file
*m
, void *v
)
904 unsigned long ffs
= 0, positives
= 0, failures
= 0;
905 unsigned long resets
= 0;
908 ffs
+= per_cpu(total_mmio_ffs
, cpu
);
909 positives
+= per_cpu(false_positives
, cpu
);
910 failures
+= per_cpu(ignored_failures
, cpu
);
911 resets
+= per_cpu(slot_resets
, cpu
);
914 if (0 == eeh_subsystem_enabled
) {
915 seq_printf(m
, "EEH Subsystem is globally disabled\n");
916 seq_printf(m
, "eeh_total_mmio_ffs=%ld\n", ffs
);
918 seq_printf(m
, "EEH Subsystem is enabled\n");
919 seq_printf(m
, "eeh_total_mmio_ffs=%ld\n"
920 "eeh_false_positives=%ld\n"
921 "eeh_ignored_failures=%ld\n"
922 "eeh_slot_resets=%ld\n"
923 "eeh_fail_count=%d\n",
924 ffs
, positives
, failures
, resets
,
925 eeh_fail_count
.counter
);
931 static int proc_eeh_open(struct inode
*inode
, struct file
*file
)
933 return single_open(file
, proc_eeh_show
, NULL
);
936 static struct file_operations proc_eeh_operations
= {
937 .open
= proc_eeh_open
,
940 .release
= single_release
,
943 static int __init
eeh_init_proc(void)
945 struct proc_dir_entry
*e
;
947 if (systemcfg
->platform
& PLATFORM_PSERIES
) {
948 e
= create_proc_entry("ppc64/eeh", 0, NULL
);
950 e
->proc_fops
= &proc_eeh_operations
;
955 __initcall(eeh_init_proc
);