arch/s390/include/asm/cpu_mf.h

   1 /*
   2  * CPU-measurement facilities
   3  *
   4  *  Copyright IBM Corp. 2012
   5  *  Author(s): Hendrik Brueckner <brueckner@linux.vnet.ibm.com>
   6  *             Jan Glauber <jang@linux.vnet.ibm.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License (version 2 only)
  10  * as published by the Free Software Foundation.
  11  */
  12 #ifndef _ASM_S390_CPU_MF_H
  13 #define _ASM_S390_CPU_MF_H
  14
  15 #include <linux/errno.h>
  16 #include <asm/facility.h>
  17
  18 #define CPU_MF_INT_SF_IAE       (1 << 31)       /* invalid entry address */
  19 #define CPU_MF_INT_SF_ISE       (1 << 30)       /* incorrect SDBT entry */
  20 #define CPU_MF_INT_SF_PRA       (1 << 29)       /* program request alert */
  21 #define CPU_MF_INT_SF_SACA      (1 << 23)       /* sampler auth. change alert */
  22 #define CPU_MF_INT_SF_LSDA      (1 << 22)       /* loss of sample data alert */
  23 #define CPU_MF_INT_CF_MTDA      (1 << 15)       /* loss of MT ctr. data alert */
  24 #define CPU_MF_INT_CF_CACA      (1 <<  7)       /* counter auth. change alert */
  25 #define CPU_MF_INT_CF_LCDA      (1 <<  6)       /* loss of counter data alert */
  26 #define CPU_MF_INT_CF_MASK      (CPU_MF_INT_CF_MTDA|CPU_MF_INT_CF_CACA| \
  27                                  CPU_MF_INT_CF_LCDA)
  28 #define CPU_MF_INT_SF_MASK      (CPU_MF_INT_SF_IAE|CPU_MF_INT_SF_ISE|   \
  29                                  CPU_MF_INT_SF_PRA|CPU_MF_INT_SF_SACA|  \
  30                                  CPU_MF_INT_SF_LSDA)
  31
  32 /* CPU measurement facility support */
  33 static inline int cpum_cf_avail(void)
  34 {
  35         return MACHINE_HAS_LPP && test_facility(67);
  36 }
  37
  38 static inline int cpum_sf_avail(void)
  39 {
  40         return MACHINE_HAS_LPP && test_facility(68);
  41 }
  42
  43
  44 struct cpumf_ctr_info {
  45         u16   cfvn;
  46         u16   auth_ctl;
  47         u16   enable_ctl;
  48         u16   act_ctl;
  49         u16   max_cpu;
  50         u16   csvn;
  51         u16   max_cg;
  52         u16   reserved1;
  53         u32   reserved2[12];
  54 } __packed;
  55
  56 /* QUERY SAMPLING INFORMATION block */
  57 struct hws_qsi_info_block {         /* Bit(s) */
  58         unsigned int b0_13:14;      /* 0-13: zeros                       */
  59         unsigned int as:1;          /* 14: basic-sampling authorization  */
  60         unsigned int ad:1;          /* 15: diag-sampling authorization   */
  61         unsigned int b16_21:6;      /* 16-21: zeros                      */
  62         unsigned int es:1;          /* 22: basic-sampling enable control */
  63         unsigned int ed:1;          /* 23: diag-sampling enable control  */
  64         unsigned int b24_29:6;      /* 24-29: zeros                      */
  65         unsigned int cs:1;          /* 30: basic-sampling activation control */
  66         unsigned int cd:1;          /* 31: diag-sampling activation control */
  67         unsigned int bsdes:16;      /* 4-5: size of basic sampling entry */
  68         unsigned int dsdes:16;      /* 6-7: size of diagnostic sampling entry */
  69         unsigned long min_sampl_rate; /* 8-15: minimum sampling interval */
  70         unsigned long max_sampl_rate; /* 16-23: maximum sampling interval*/
  71         unsigned long tear;         /* 24-31: TEAR contents              */
  72         unsigned long dear;         /* 32-39: DEAR contents              */
  73         unsigned int rsvrd0;        /* 40-43: reserved                   */
  74         unsigned int cpu_speed;     /* 44-47: CPU speed                  */
  75         unsigned long long rsvrd1;  /* 48-55: reserved                   */
  76         unsigned long long rsvrd2;  /* 56-63: reserved                   */
  77 } __packed;
  78
  79 /* SET SAMPLING CONTROLS request block */
  80 struct hws_lsctl_request_block {
  81         unsigned int s:1;           /* 0: maximum buffer indicator       */
  82         unsigned int h:1;           /* 1: part. level reserved for VM use*/
  83         unsigned long long b2_53:52;/* 2-53: zeros                       */
  84         unsigned int es:1;          /* 54: basic-sampling enable control */
  85         unsigned int ed:1;          /* 55: diag-sampling enable control  */
  86         unsigned int b56_61:6;      /* 56-61: - zeros                    */
  87         unsigned int cs:1;          /* 62: basic-sampling activation control */
  88         unsigned int cd:1;          /* 63: diag-sampling activation control  */
  89         unsigned long interval;     /* 8-15: sampling interval           */
  90         unsigned long tear;         /* 16-23: TEAR contents              */
  91         unsigned long dear;         /* 24-31: DEAR contents              */
  92         /* 32-63:                                                        */
  93         unsigned long rsvrd1;       /* reserved                          */
  94         unsigned long rsvrd2;       /* reserved                          */
  95         unsigned long rsvrd3;       /* reserved                          */
  96         unsigned long rsvrd4;       /* reserved                          */
  97 } __packed;
  98
  99 struct hws_basic_entry {
 100         unsigned int def:16;        /* 0-15  Data Entry Format           */
 101         unsigned int R:4;           /* 16-19 reserved                    */
 102         unsigned int U:4;           /* 20-23 Number of unique instruct.  */
 103         unsigned int z:2;           /* zeros                             */
 104         unsigned int T:1;           /* 26 PSW DAT mode                   */
 105         unsigned int W:1;           /* 27 PSW wait state                 */
 106         unsigned int P:1;           /* 28 PSW Problem state              */
 107         unsigned int AS:2;          /* 29-30 PSW address-space control   */
 108         unsigned int I:1;           /* 31 entry valid or invalid         */
 109         unsigned int CL:2;          /* 32-33 Configuration Level         */
 110         unsigned int:14;
 111         unsigned int prim_asn:16;   /* primary ASN                       */
 112         unsigned long long ia;      /* Instruction Address               */
 113         unsigned long long gpp;     /* Guest Program Parameter           */
 114         unsigned long long hpp;     /* Host Program Parameter            */
 115 } __packed;
 116
 117 struct hws_diag_entry {
 118         unsigned int def:16;        /* 0-15  Data Entry Format           */
 119         unsigned int R:14;          /* 16-19 and 20-30 reserved          */
 120         unsigned int I:1;           /* 31 entry valid or invalid         */
 121         u8           data[];        /* Machine-dependent sample data     */
 122 } __packed;
 123
 124 struct hws_combined_entry {
 125         struct hws_basic_entry  basic;  /* Basic-sampling data entry */
 126         struct hws_diag_entry   diag;   /* Diagnostic-sampling data entry */
 127 } __packed;
 128
 129 struct hws_trailer_entry {
 130         union {
 131                 struct {
 132                         unsigned int f:1;       /* 0 - Block Full Indicator   */
 133                         unsigned int a:1;       /* 1 - Alert request control  */
 134                         unsigned int t:1;       /* 2 - Timestamp format       */
 135                         unsigned long long:61;  /* 3 - 63: Reserved           */
 136                 };
 137                 unsigned long long flags;       /* 0 - 63: All indicators     */
 138         };
 139         unsigned long long overflow;     /* 64 - sample Overflow count        */
 140         unsigned char timestamp[16];     /* 16 - 31 timestamp                 */
 141         unsigned long long reserved1;    /* 32 -Reserved                      */
 142         unsigned long long reserved2;    /*                                   */
 143         unsigned long long progusage1;   /* 48 - reserved for programming use */
 144         unsigned long long progusage2;   /*                                   */
 145 } __packed;
 146
 147 /* Query counter information */
 148 static inline int qctri(struct cpumf_ctr_info *info)
 149 {
 150         int rc = -EINVAL;
 151
 152         asm volatile (
 153                 "0:     .insn   s,0xb28e0000,%1\n"
 154                 "1:     lhi     %0,0\n"
 155                 "2:\n"
 156                 EX_TABLE(1b, 2b)
 157                 : "+d" (rc), "=Q" (*info));
 158         return rc;
 159 }
 160
 161 /* Load CPU-counter-set controls */
 162 static inline int lcctl(u64 ctl)
 163 {
 164         int cc;
 165
 166         asm volatile (
 167                 "       .insn   s,0xb2840000,%1\n"
 168                 "       ipm     %0\n"
 169                 "       srl     %0,28\n"
 170                 : "=d" (cc) : "m" (ctl) : "cc");
 171         return cc;
 172 }
 173
 174 /* Extract CPU counter */
 175 static inline int __ecctr(u64 ctr, u64 *content)
 176 {
 177         u64 _content;
 178         int cc;
 179
 180         asm volatile (
 181                 "       .insn   rre,0xb2e40000,%0,%2\n"
 182                 "       ipm     %1\n"
 183                 "       srl     %1,28\n"
 184                 : "=d" (_content), "=d" (cc) : "d" (ctr) : "cc");
 185         *content = _content;
 186         return cc;
 187 }
 188
 189 /* Extract CPU counter */
 190 static inline int ecctr(u64 ctr, u64 *val)
 191 {
 192         u64 content;
 193         int cc;
 194
 195         cc = __ecctr(ctr, &content);
 196         if (!cc)
 197                 *val = content;
 198         return cc;
 199 }
 200
 201 /* Store CPU counter multiple for the MT utilization counter set */
 202 static inline int stcctm5(u64 num, u64 *val)
 203 {
 204         int cc;
 205
 206         asm volatile (
 207                 "       .insn   rsy,0xeb0000000017,%2,5,%1\n"
 208                 "       ipm     %0\n"
 209                 "       srl     %0,28\n"
 210                 : "=d" (cc)
 211                 : "Q" (*val), "d" (num)
 212                 : "cc", "memory");
 213         return cc;
 214 }
 215
 216 /* Query sampling information */
 217 static inline int qsi(struct hws_qsi_info_block *info)
 218 {
 219         int cc = 1;
 220
 221         asm volatile(
 222                 "0:     .insn   s,0xb2860000,%1\n"
 223                 "1:     lhi     %0,0\n"
 224                 "2:\n"
 225                 EX_TABLE(0b, 2b) EX_TABLE(1b, 2b)
 226                 : "+d" (cc), "+Q" (*info));
 227         return cc ? -EINVAL : 0;
 228 }
 229
 230 /* Load sampling controls */
 231 static inline int lsctl(struct hws_lsctl_request_block *req)
 232 {
 233         int cc;
 234
 235         cc = 1;
 236         asm volatile(
 237                 "0:     .insn   s,0xb2870000,0(%1)\n"
 238                 "1:     ipm     %0\n"
 239                 "       srl     %0,28\n"
 240                 "2:\n"
 241                 EX_TABLE(0b, 2b) EX_TABLE(1b, 2b)
 242                 : "+d" (cc), "+a" (req)
 243                 : "m" (*req)
 244                 : "cc", "memory");
 245
 246         return cc ? -EINVAL : 0;
 247 }
 248
 249 /* Sampling control helper functions */
 250
 251 #include <linux/time.h>
 252
 253 static inline unsigned long freq_to_sample_rate(struct hws_qsi_info_block *qsi,
 254                                                 unsigned long freq)
 255 {
 256         return (USEC_PER_SEC / freq) * qsi->cpu_speed;
 257 }
 258
 259 static inline unsigned long sample_rate_to_freq(struct hws_qsi_info_block *qsi,
 260                                                 unsigned long rate)
 261 {
 262         return USEC_PER_SEC * qsi->cpu_speed / rate;
 263 }
 264
 265 #define SDB_TE_ALERT_REQ_MASK   0x4000000000000000UL
 266 #define SDB_TE_BUFFER_FULL_MASK 0x8000000000000000UL
 267
 268 /* Return TOD timestamp contained in an trailer entry */
 269 static inline unsigned long long trailer_timestamp(struct hws_trailer_entry *te)
 270 {
 271         /* TOD in STCKE format */
 272         if (te->t)
 273                 return *((unsigned long long *) &te->timestamp[1]);
 274
 275         /* TOD in STCK format */
 276         return *((unsigned long long *) &te->timestamp[0]);
 277 }
 278
 279 /* Return pointer to trailer entry of an sample data block */
 280 static inline unsigned long *trailer_entry_ptr(unsigned long v)
 281 {
 282         void *ret;
 283
 284         ret = (void *) v;
 285         ret += PAGE_SIZE;
 286         ret -= sizeof(struct hws_trailer_entry);
 287
 288         return (unsigned long *) ret;
 289 }
 290
 291 /* Return if the entry in the sample data block table (sdbt)
 292  * is a link to the next sdbt */
 293 static inline int is_link_entry(unsigned long *s)
 294 {
 295         return *s & 0x1ul ? 1 : 0;
 296 }
 297
 298 /* Return pointer to the linked sdbt */
 299 static inline unsigned long *get_next_sdbt(unsigned long *s)
 300 {
 301         return (unsigned long *) (*s & ~0x1ul);
 302 }
 303 #endif /* _ASM_S390_CPU_MF_H */