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s390/mm: use generic mm_hooks
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1 /*
2 * S390 version
3 *
4 * Derived from "include/asm-i386/mmu_context.h"
5 */
6
7 #ifndef __S390_MMU_CONTEXT_H
8 #define __S390_MMU_CONTEXT_H
9
10 #include <asm/pgalloc.h>
11 #include <linux/uaccess.h>
12 #include <linux/mm_types.h>
13 #include <asm/tlbflush.h>
14 #include <asm/ctl_reg.h>
15 #include <asm-generic/mm_hooks.h>
16
17 static inline int init_new_context(struct task_struct *tsk,
18 struct mm_struct *mm)
19 {
20 spin_lock_init(&mm->context.pgtable_lock);
21 INIT_LIST_HEAD(&mm->context.pgtable_list);
22 spin_lock_init(&mm->context.gmap_lock);
23 INIT_LIST_HEAD(&mm->context.gmap_list);
24 cpumask_clear(&mm->context.cpu_attach_mask);
25 atomic_set(&mm->context.flush_count, 0);
26 mm->context.gmap_asce = 0;
27 mm->context.flush_mm = 0;
28 #ifdef CONFIG_PGSTE
29 mm->context.alloc_pgste = page_table_allocate_pgste ||
30 test_thread_flag(TIF_PGSTE) ||
31 current->mm->context.alloc_pgste;
32 mm->context.has_pgste = 0;
33 mm->context.use_skey = 0;
34 mm->context.use_cmma = 0;
35 #endif
36 switch (mm->context.asce_limit) {
37 case _REGION2_SIZE:
38 /*
39 * forked 3-level task, fall through to set new asce with new
40 * mm->pgd
41 */
42 case 0:
43 /* context created by exec, set asce limit to 4TB */
44 mm->context.asce_limit = STACK_TOP_MAX;
45 mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
46 _ASCE_USER_BITS | _ASCE_TYPE_REGION3;
47 break;
48 case _REGION1_SIZE:
49 /* forked 4-level task, set new asce with new mm->pgd */
50 mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
51 _ASCE_USER_BITS | _ASCE_TYPE_REGION2;
52 break;
53 case _REGION3_SIZE:
54 /* forked 2-level compat task, set new asce with new mm->pgd */
55 mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
56 _ASCE_USER_BITS | _ASCE_TYPE_SEGMENT;
57 /* pgd_alloc() did not increase mm->nr_pmds */
58 mm_inc_nr_pmds(mm);
59 }
60 crst_table_init((unsigned long *) mm->pgd, pgd_entry_type(mm));
61 return 0;
62 }
63
64 #define destroy_context(mm) do { } while (0)
65
66 static inline void set_user_asce(struct mm_struct *mm)
67 {
68 S390_lowcore.user_asce = mm->context.asce;
69 if (current->thread.mm_segment.ar4)
70 __ctl_load(S390_lowcore.user_asce, 7, 7);
71 set_cpu_flag(CIF_ASCE_PRIMARY);
72 }
73
74 static inline void clear_user_asce(void)
75 {
76 S390_lowcore.user_asce = S390_lowcore.kernel_asce;
77
78 __ctl_load(S390_lowcore.user_asce, 1, 1);
79 __ctl_load(S390_lowcore.user_asce, 7, 7);
80 }
81
82 static inline void load_kernel_asce(void)
83 {
84 unsigned long asce;
85
86 __ctl_store(asce, 1, 1);
87 if (asce != S390_lowcore.kernel_asce)
88 __ctl_load(S390_lowcore.kernel_asce, 1, 1);
89 set_cpu_flag(CIF_ASCE_PRIMARY);
90 }
91
92 static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
93 struct task_struct *tsk)
94 {
95 int cpu = smp_processor_id();
96
97 S390_lowcore.user_asce = next->context.asce;
98 if (prev == next)
99 return;
100 cpumask_set_cpu(cpu, &next->context.cpu_attach_mask);
101 cpumask_set_cpu(cpu, mm_cpumask(next));
102 /* Clear old ASCE by loading the kernel ASCE. */
103 __ctl_load(S390_lowcore.kernel_asce, 1, 1);
104 __ctl_load(S390_lowcore.kernel_asce, 7, 7);
105 cpumask_clear_cpu(cpu, &prev->context.cpu_attach_mask);
106 }
107
108 #define finish_arch_post_lock_switch finish_arch_post_lock_switch
109 static inline void finish_arch_post_lock_switch(void)
110 {
111 struct task_struct *tsk = current;
112 struct mm_struct *mm = tsk->mm;
113
114 load_kernel_asce();
115 if (mm) {
116 preempt_disable();
117 while (atomic_read(&mm->context.flush_count))
118 cpu_relax();
119
120 if (mm->context.flush_mm)
121 __tlb_flush_mm(mm);
122 preempt_enable();
123 }
124 set_fs(current->thread.mm_segment);
125 }
126
127 #define enter_lazy_tlb(mm,tsk) do { } while (0)
128 #define deactivate_mm(tsk,mm) do { } while (0)
129
130 static inline void activate_mm(struct mm_struct *prev,
131 struct mm_struct *next)
132 {
133 switch_mm(prev, next, current);
134 set_user_asce(next);
135 }
136
137 #endif /* __S390_MMU_CONTEXT_H */