arch/s390/include/asm/mmu_context.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  *  S390 version
   4  *
   5  *  Derived from "include/asm-i386/mmu_context.h"
   6  */
   7
   8 #ifndef __S390_MMU_CONTEXT_H
   9 #define __S390_MMU_CONTEXT_H
  10
  11 #include <asm/pgalloc.h>
  12 #include <linux/uaccess.h>
  13 #include <linux/mm_types.h>
  14 #include <asm/tlbflush.h>
  15 #include <asm/ctl_reg.h>
  16 #include <asm-generic/mm_hooks.h>
  17
  18 static inline int init_new_context(struct task_struct *tsk,
  19                                    struct mm_struct *mm)
  20 {
  21         spin_lock_init(&mm->context.lock);
  22         INIT_LIST_HEAD(&mm->context.pgtable_list);
  23         INIT_LIST_HEAD(&mm->context.gmap_list);
  24         cpumask_clear(&mm->context.cpu_attach_mask);
  25         atomic_set(&mm->context.flush_count, 0);
  26         mm->context.gmap_asce = 0;
  27         mm->context.flush_mm = 0;
  28 #ifdef CONFIG_PGSTE
  29         mm->context.alloc_pgste = page_table_allocate_pgste ||
  30                 test_thread_flag(TIF_PGSTE) ||
  31                 (current->mm && current->mm->context.alloc_pgste);
  32         mm->context.has_pgste = 0;
  33         mm->context.use_skey = 0;
  34         mm->context.use_cmma = 0;
  35 #endif
  36         switch (mm->context.asce_limit) {
  37         case _REGION2_SIZE:
  38                 /*
  39                  * forked 3-level task, fall through to set new asce with new
  40                  * mm->pgd
  41                  */
  42         case 0:
  43                 /* context created by exec, set asce limit to 4TB */
  44                 mm->context.asce_limit = STACK_TOP_MAX;
  45                 mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
  46                                    _ASCE_USER_BITS | _ASCE_TYPE_REGION3;
  47                 break;
  48         case -PAGE_SIZE:
  49                 /* forked 5-level task, set new asce with new_mm->pgd */
  50                 mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
  51                         _ASCE_USER_BITS | _ASCE_TYPE_REGION1;
  52                 break;
  53         case _REGION1_SIZE:
  54                 /* forked 4-level task, set new asce with new mm->pgd */
  55                 mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
  56                                    _ASCE_USER_BITS | _ASCE_TYPE_REGION2;
  57                 break;
  58         case _REGION3_SIZE:
  59                 /* forked 2-level compat task, set new asce with new mm->pgd */
  60                 mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
  61                                    _ASCE_USER_BITS | _ASCE_TYPE_SEGMENT;
  62         }
  63         crst_table_init((unsigned long *) mm->pgd, pgd_entry_type(mm));
  64         return 0;
  65 }
  66
  67 #define destroy_context(mm)             do { } while (0)
  68
  69 static inline void set_user_asce(struct mm_struct *mm)
  70 {
  71         S390_lowcore.user_asce = mm->context.asce;
  72         __ctl_load(S390_lowcore.user_asce, 1, 1);
  73         clear_cpu_flag(CIF_ASCE_PRIMARY);
  74 }
  75
  76 static inline void clear_user_asce(void)
  77 {
  78         S390_lowcore.user_asce = S390_lowcore.kernel_asce;
  79         __ctl_load(S390_lowcore.kernel_asce, 1, 1);
  80         set_cpu_flag(CIF_ASCE_PRIMARY);
  81 }
  82
  83 mm_segment_t enable_sacf_uaccess(void);
  84 void disable_sacf_uaccess(mm_segment_t old_fs);
  85
  86 static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
  87                              struct task_struct *tsk)
  88 {
  89         int cpu = smp_processor_id();
  90
  91         if (prev == next)
  92                 return;
  93         S390_lowcore.user_asce = next->context.asce;
  94         cpumask_set_cpu(cpu, &next->context.cpu_attach_mask);
  95         /* Clear previous user-ASCE from CR1 and CR7 */
  96         if (!test_cpu_flag(CIF_ASCE_PRIMARY)) {
  97                 __ctl_load(S390_lowcore.kernel_asce, 1, 1);
  98                 set_cpu_flag(CIF_ASCE_PRIMARY);
  99         }
 100         if (test_cpu_flag(CIF_ASCE_SECONDARY)) {
 101                 __ctl_load(S390_lowcore.vdso_asce, 7, 7);
 102                 clear_cpu_flag(CIF_ASCE_SECONDARY);
 103         }
 104         cpumask_clear_cpu(cpu, &prev->context.cpu_attach_mask);
 105 }
 106
 107 #define finish_arch_post_lock_switch finish_arch_post_lock_switch
 108 static inline void finish_arch_post_lock_switch(void)
 109 {
 110         struct task_struct *tsk = current;
 111         struct mm_struct *mm = tsk->mm;
 112
 113         if (mm) {
 114                 preempt_disable();
 115                 while (atomic_read(&mm->context.flush_count))
 116                         cpu_relax();
 117                 cpumask_set_cpu(smp_processor_id(), mm_cpumask(mm));
 118                 __tlb_flush_mm_lazy(mm);
 119                 preempt_enable();
 120         }
 121         set_fs(current->thread.mm_segment);
 122 }
 123
 124 #define enter_lazy_tlb(mm,tsk)  do { } while (0)
 125 #define deactivate_mm(tsk,mm)   do { } while (0)
 126
 127 static inline void activate_mm(struct mm_struct *prev,
 128                                struct mm_struct *next)
 129 {
 130         switch_mm(prev, next, current);
 131         cpumask_set_cpu(smp_processor_id(), mm_cpumask(next));
 132         set_user_asce(next);
 133 }
 134
 135 #endif /* __S390_MMU_CONTEXT_H */