1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Copyright IBM Corp. 1999, 2000
5 * Author(s): Hartmut Penner (hp@de.ibm.com)
6 * Ulrich Weigand (weigand@de.ibm.com)
7 * Martin Schwidefsky (schwidefsky@de.ibm.com)
9 * Derived from "include/asm-i386/pgtable.h"
12 #ifndef _ASM_S390_PGTABLE_H
13 #define _ASM_S390_PGTABLE_H
15 #include <linux/sched.h>
16 #include <linux/mm_types.h>
17 #include <linux/page-flags.h>
18 #include <linux/radix-tree.h>
19 #include <linux/atomic.h>
23 extern pgd_t swapper_pg_dir
[];
24 extern void paging_init(void);
33 extern atomic_long_t direct_pages_count
[PG_DIRECT_MAP_MAX
];
35 static inline void update_page_count(int level
, long count
)
37 if (IS_ENABLED(CONFIG_PROC_FS
))
38 atomic_long_add(count
, &direct_pages_count
[level
]);
42 void arch_report_meminfo(struct seq_file
*m
);
45 * The S390 doesn't have any external MMU info: the kernel page
46 * tables contain all the necessary information.
48 #define update_mmu_cache(vma, address, ptep) do { } while (0)
49 #define update_mmu_cache_pmd(vma, address, ptep) do { } while (0)
52 * ZERO_PAGE is a global shared page that is always zero; used
53 * for zero-mapped memory areas etc..
56 extern unsigned long empty_zero_page
;
57 extern unsigned long zero_page_mask
;
59 #define ZERO_PAGE(vaddr) \
60 (virt_to_page((void *)(empty_zero_page + \
61 (((unsigned long)(vaddr)) &zero_page_mask))))
62 #define __HAVE_COLOR_ZERO_PAGE
64 /* TODO: s390 cannot support io_remap_pfn_range... */
66 #define FIRST_USER_ADDRESS 0UL
68 #define pte_ERROR(e) \
69 printk("%s:%d: bad pte %p.\n", __FILE__, __LINE__, (void *) pte_val(e))
70 #define pmd_ERROR(e) \
71 printk("%s:%d: bad pmd %p.\n", __FILE__, __LINE__, (void *) pmd_val(e))
72 #define pud_ERROR(e) \
73 printk("%s:%d: bad pud %p.\n", __FILE__, __LINE__, (void *) pud_val(e))
74 #define p4d_ERROR(e) \
75 printk("%s:%d: bad p4d %p.\n", __FILE__, __LINE__, (void *) p4d_val(e))
76 #define pgd_ERROR(e) \
77 printk("%s:%d: bad pgd %p.\n", __FILE__, __LINE__, (void *) pgd_val(e))
80 * The vmalloc and module area will always be on the topmost area of the
81 * kernel mapping. We reserve 128GB (64bit) for vmalloc and modules.
82 * On 64 bit kernels we have a 2GB area at the top of the vmalloc area where
83 * modules will reside. That makes sure that inter module branches always
84 * happen without trampolines and in addition the placement within a 2GB frame
85 * is branch prediction unit friendly.
87 extern unsigned long VMALLOC_START
;
88 extern unsigned long VMALLOC_END
;
89 extern struct page
*vmemmap
;
91 #define VMEM_MAX_PHYS ((unsigned long) vmemmap)
93 extern unsigned long MODULES_VADDR
;
94 extern unsigned long MODULES_END
;
95 #define MODULES_VADDR MODULES_VADDR
96 #define MODULES_END MODULES_END
97 #define MODULES_LEN (1UL << 31)
99 static inline int is_module_addr(void *addr
)
101 BUILD_BUG_ON(MODULES_LEN
> (1UL << 31));
102 if (addr
< (void *)MODULES_VADDR
)
104 if (addr
> (void *)MODULES_END
)
110 * A 64 bit pagetable entry of S390 has following format:
112 * 0000000000111111111122222222223333333333444444444455555555556666
113 * 0123456789012345678901234567890123456789012345678901234567890123
115 * I Page-Invalid Bit: Page is not available for address-translation
116 * P Page-Protection Bit: Store access not possible for page
117 * C Change-bit override: HW is not required to set change bit
119 * A 64 bit segmenttable entry of S390 has following format:
120 * | P-table origin | TT
121 * 0000000000111111111122222222223333333333444444444455555555556666
122 * 0123456789012345678901234567890123456789012345678901234567890123
124 * I Segment-Invalid Bit: Segment is not available for address-translation
125 * C Common-Segment Bit: Segment is not private (PoP 3-30)
126 * P Page-Protection Bit: Store access not possible for page
129 * A 64 bit region table entry of S390 has following format:
130 * | S-table origin | TF TTTL
131 * 0000000000111111111122222222223333333333444444444455555555556666
132 * 0123456789012345678901234567890123456789012345678901234567890123
134 * I Segment-Invalid Bit: Segment is not available for address-translation
139 * The 64 bit regiontable origin of S390 has following format:
140 * | region table origon | DTTL
141 * 0000000000111111111122222222223333333333444444444455555555556666
142 * 0123456789012345678901234567890123456789012345678901234567890123
144 * X Space-Switch event:
145 * G Segment-Invalid Bit:
146 * P Private-Space Bit:
147 * S Storage-Alteration:
151 * A storage key has the following format:
155 * F : fetch protection bit
160 /* Hardware bits in the page table entry */
161 #define _PAGE_NOEXEC 0x100 /* HW no-execute bit */
162 #define _PAGE_PROTECT 0x200 /* HW read-only bit */
163 #define _PAGE_INVALID 0x400 /* HW invalid bit */
164 #define _PAGE_LARGE 0x800 /* Bit to mark a large pte */
166 /* Software bits in the page table entry */
167 #define _PAGE_PRESENT 0x001 /* SW pte present bit */
168 #define _PAGE_YOUNG 0x004 /* SW pte young bit */
169 #define _PAGE_DIRTY 0x008 /* SW pte dirty bit */
170 #define _PAGE_READ 0x010 /* SW pte read bit */
171 #define _PAGE_WRITE 0x020 /* SW pte write bit */
172 #define _PAGE_SPECIAL 0x040 /* SW associated with special page */
173 #define _PAGE_UNUSED 0x080 /* SW bit for pgste usage state */
174 #define __HAVE_ARCH_PTE_SPECIAL
176 #ifdef CONFIG_MEM_SOFT_DIRTY
177 #define _PAGE_SOFT_DIRTY 0x002 /* SW pte soft dirty bit */
179 #define _PAGE_SOFT_DIRTY 0x000
182 /* Set of bits not changed in pte_modify */
183 #define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_SPECIAL | _PAGE_DIRTY | \
184 _PAGE_YOUNG | _PAGE_SOFT_DIRTY)
187 * handle_pte_fault uses pte_present and pte_none to find out the pte type
188 * WITHOUT holding the page table lock. The _PAGE_PRESENT bit is used to
189 * distinguish present from not-present ptes. It is changed only with the page
192 * The following table gives the different possible bit combinations for
193 * the pte hardware and software bits in the last 12 bits of a pte
194 * (. unassigned bit, x don't care, t swap type):
202 * prot-none, clean, old .11.xx0000.1
203 * prot-none, clean, young .11.xx0001.1
204 * prot-none, dirty, old .11.xx0010.1
205 * prot-none, dirty, young .11.xx0011.1
206 * read-only, clean, old .11.xx0100.1
207 * read-only, clean, young .01.xx0101.1
208 * read-only, dirty, old .11.xx0110.1
209 * read-only, dirty, young .01.xx0111.1
210 * read-write, clean, old .11.xx1100.1
211 * read-write, clean, young .01.xx1101.1
212 * read-write, dirty, old .10.xx1110.1
213 * read-write, dirty, young .00.xx1111.1
214 * HW-bits: R read-only, I invalid
215 * SW-bits: p present, y young, d dirty, r read, w write, s special,
218 * pte_none is true for the bit pattern .10.00000000, pte == 0x400
219 * pte_swap is true for the bit pattern .11..ooooo.0, (pte & 0x201) == 0x200
220 * pte_present is true for the bit pattern .xx.xxxxxx.1, (pte & 0x001) == 0x001
223 /* Bits in the segment/region table address-space-control-element */
224 #define _ASCE_ORIGIN ~0xfffUL/* region/segment table origin */
225 #define _ASCE_PRIVATE_SPACE 0x100 /* private space control */
226 #define _ASCE_ALT_EVENT 0x80 /* storage alteration event control */
227 #define _ASCE_SPACE_SWITCH 0x40 /* space switch event */
228 #define _ASCE_REAL_SPACE 0x20 /* real space control */
229 #define _ASCE_TYPE_MASK 0x0c /* asce table type mask */
230 #define _ASCE_TYPE_REGION1 0x0c /* region first table type */
231 #define _ASCE_TYPE_REGION2 0x08 /* region second table type */
232 #define _ASCE_TYPE_REGION3 0x04 /* region third table type */
233 #define _ASCE_TYPE_SEGMENT 0x00 /* segment table type */
234 #define _ASCE_TABLE_LENGTH 0x03 /* region table length */
236 /* Bits in the region table entry */
237 #define _REGION_ENTRY_ORIGIN ~0xfffUL/* region/segment table origin */
238 #define _REGION_ENTRY_PROTECT 0x200 /* region protection bit */
239 #define _REGION_ENTRY_NOEXEC 0x100 /* region no-execute bit */
240 #define _REGION_ENTRY_OFFSET 0xc0 /* region table offset */
241 #define _REGION_ENTRY_INVALID 0x20 /* invalid region table entry */
242 #define _REGION_ENTRY_TYPE_MASK 0x0c /* region/segment table type mask */
243 #define _REGION_ENTRY_TYPE_R1 0x0c /* region first table type */
244 #define _REGION_ENTRY_TYPE_R2 0x08 /* region second table type */
245 #define _REGION_ENTRY_TYPE_R3 0x04 /* region third table type */
246 #define _REGION_ENTRY_LENGTH 0x03 /* region third length */
248 #define _REGION1_ENTRY (_REGION_ENTRY_TYPE_R1 | _REGION_ENTRY_LENGTH)
249 #define _REGION1_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R1 | _REGION_ENTRY_INVALID)
250 #define _REGION2_ENTRY (_REGION_ENTRY_TYPE_R2 | _REGION_ENTRY_LENGTH)
251 #define _REGION2_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R2 | _REGION_ENTRY_INVALID)
252 #define _REGION3_ENTRY (_REGION_ENTRY_TYPE_R3 | _REGION_ENTRY_LENGTH)
253 #define _REGION3_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R3 | _REGION_ENTRY_INVALID)
255 #define _REGION3_ENTRY_ORIGIN_LARGE ~0x7fffffffUL /* large page address */
256 #define _REGION3_ENTRY_DIRTY 0x2000 /* SW region dirty bit */
257 #define _REGION3_ENTRY_YOUNG 0x1000 /* SW region young bit */
258 #define _REGION3_ENTRY_LARGE 0x0400 /* RTTE-format control, large page */
259 #define _REGION3_ENTRY_READ 0x0002 /* SW region read bit */
260 #define _REGION3_ENTRY_WRITE 0x0001 /* SW region write bit */
262 #ifdef CONFIG_MEM_SOFT_DIRTY
263 #define _REGION3_ENTRY_SOFT_DIRTY 0x4000 /* SW region soft dirty bit */
265 #define _REGION3_ENTRY_SOFT_DIRTY 0x0000 /* SW region soft dirty bit */
268 #define _REGION_ENTRY_BITS 0xfffffffffffff22fUL
269 #define _REGION_ENTRY_BITS_LARGE 0xffffffff8000fe2fUL
271 /* Bits in the segment table entry */
272 #define _SEGMENT_ENTRY_BITS 0xfffffffffffffe33UL
273 #define _SEGMENT_ENTRY_BITS_LARGE 0xfffffffffff0ff33UL
274 #define _SEGMENT_ENTRY_ORIGIN_LARGE ~0xfffffUL /* large page address */
275 #define _SEGMENT_ENTRY_ORIGIN ~0x7ffUL/* page table origin */
276 #define _SEGMENT_ENTRY_PROTECT 0x200 /* segment protection bit */
277 #define _SEGMENT_ENTRY_NOEXEC 0x100 /* segment no-execute bit */
278 #define _SEGMENT_ENTRY_INVALID 0x20 /* invalid segment table entry */
280 #define _SEGMENT_ENTRY (0)
281 #define _SEGMENT_ENTRY_EMPTY (_SEGMENT_ENTRY_INVALID)
283 #define _SEGMENT_ENTRY_DIRTY 0x2000 /* SW segment dirty bit */
284 #define _SEGMENT_ENTRY_YOUNG 0x1000 /* SW segment young bit */
285 #define _SEGMENT_ENTRY_LARGE 0x0400 /* STE-format control, large page */
286 #define _SEGMENT_ENTRY_WRITE 0x0002 /* SW segment write bit */
287 #define _SEGMENT_ENTRY_READ 0x0001 /* SW segment read bit */
289 #ifdef CONFIG_MEM_SOFT_DIRTY
290 #define _SEGMENT_ENTRY_SOFT_DIRTY 0x4000 /* SW segment soft dirty bit */
292 #define _SEGMENT_ENTRY_SOFT_DIRTY 0x0000 /* SW segment soft dirty bit */
295 #define _CRST_ENTRIES 2048 /* number of region/segment table entries */
296 #define _PAGE_ENTRIES 256 /* number of page table entries */
298 #define _CRST_TABLE_SIZE (_CRST_ENTRIES * 8)
299 #define _PAGE_TABLE_SIZE (_PAGE_ENTRIES * 8)
301 #define _REGION1_SHIFT 53
302 #define _REGION2_SHIFT 42
303 #define _REGION3_SHIFT 31
304 #define _SEGMENT_SHIFT 20
306 #define _REGION1_INDEX (0x7ffUL << _REGION1_SHIFT)
307 #define _REGION2_INDEX (0x7ffUL << _REGION2_SHIFT)
308 #define _REGION3_INDEX (0x7ffUL << _REGION3_SHIFT)
309 #define _SEGMENT_INDEX (0x7ffUL << _SEGMENT_SHIFT)
310 #define _PAGE_INDEX (0xffUL << _PAGE_SHIFT)
312 #define _REGION1_SIZE (1UL << _REGION1_SHIFT)
313 #define _REGION2_SIZE (1UL << _REGION2_SHIFT)
314 #define _REGION3_SIZE (1UL << _REGION3_SHIFT)
315 #define _SEGMENT_SIZE (1UL << _SEGMENT_SHIFT)
317 #define _REGION1_MASK (~(_REGION1_SIZE - 1))
318 #define _REGION2_MASK (~(_REGION2_SIZE - 1))
319 #define _REGION3_MASK (~(_REGION3_SIZE - 1))
320 #define _SEGMENT_MASK (~(_SEGMENT_SIZE - 1))
322 #define PMD_SHIFT _SEGMENT_SHIFT
323 #define PUD_SHIFT _REGION3_SHIFT
324 #define P4D_SHIFT _REGION2_SHIFT
325 #define PGDIR_SHIFT _REGION1_SHIFT
327 #define PMD_SIZE _SEGMENT_SIZE
328 #define PUD_SIZE _REGION3_SIZE
329 #define P4D_SIZE _REGION2_SIZE
330 #define PGDIR_SIZE _REGION1_SIZE
332 #define PMD_MASK _SEGMENT_MASK
333 #define PUD_MASK _REGION3_MASK
334 #define P4D_MASK _REGION2_MASK
335 #define PGDIR_MASK _REGION1_MASK
337 #define PTRS_PER_PTE _PAGE_ENTRIES
338 #define PTRS_PER_PMD _CRST_ENTRIES
339 #define PTRS_PER_PUD _CRST_ENTRIES
340 #define PTRS_PER_P4D _CRST_ENTRIES
341 #define PTRS_PER_PGD _CRST_ENTRIES
344 * Segment table and region3 table entry encoding
345 * (R = read-only, I = invalid, y = young bit):
347 * prot-none, clean, old 00..1...1...00
348 * prot-none, clean, young 01..1...1...00
349 * prot-none, dirty, old 10..1...1...00
350 * prot-none, dirty, young 11..1...1...00
351 * read-only, clean, old 00..1...1...01
352 * read-only, clean, young 01..1...0...01
353 * read-only, dirty, old 10..1...1...01
354 * read-only, dirty, young 11..1...0...01
355 * read-write, clean, old 00..1...1...11
356 * read-write, clean, young 01..1...0...11
357 * read-write, dirty, old 10..0...1...11
358 * read-write, dirty, young 11..0...0...11
359 * The segment table origin is used to distinguish empty (origin==0) from
360 * read-write, old segment table entries (origin!=0)
361 * HW-bits: R read-only, I invalid
362 * SW-bits: y young, d dirty, r read, w write
365 /* Page status table bits for virtualization */
366 #define PGSTE_ACC_BITS 0xf000000000000000UL
367 #define PGSTE_FP_BIT 0x0800000000000000UL
368 #define PGSTE_PCL_BIT 0x0080000000000000UL
369 #define PGSTE_HR_BIT 0x0040000000000000UL
370 #define PGSTE_HC_BIT 0x0020000000000000UL
371 #define PGSTE_GR_BIT 0x0004000000000000UL
372 #define PGSTE_GC_BIT 0x0002000000000000UL
373 #define PGSTE_UC_BIT 0x0000800000000000UL /* user dirty (migration) */
374 #define PGSTE_IN_BIT 0x0000400000000000UL /* IPTE notify bit */
375 #define PGSTE_VSIE_BIT 0x0000200000000000UL /* ref'd in a shadow table */
377 /* Guest Page State used for virtualization */
378 #define _PGSTE_GPS_ZERO 0x0000000080000000UL
379 #define _PGSTE_GPS_NODAT 0x0000000040000000UL
380 #define _PGSTE_GPS_USAGE_MASK 0x0000000003000000UL
381 #define _PGSTE_GPS_USAGE_STABLE 0x0000000000000000UL
382 #define _PGSTE_GPS_USAGE_UNUSED 0x0000000001000000UL
383 #define _PGSTE_GPS_USAGE_POT_VOLATILE 0x0000000002000000UL
384 #define _PGSTE_GPS_USAGE_VOLATILE _PGSTE_GPS_USAGE_MASK
387 * A user page table pointer has the space-switch-event bit, the
388 * private-space-control bit and the storage-alteration-event-control
389 * bit set. A kernel page table pointer doesn't need them.
391 #define _ASCE_USER_BITS (_ASCE_SPACE_SWITCH | _ASCE_PRIVATE_SPACE | \
395 * Page protection definitions.
397 #define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_INVALID | _PAGE_PROTECT)
398 #define PAGE_RO __pgprot(_PAGE_PRESENT | _PAGE_READ | \
399 _PAGE_NOEXEC | _PAGE_INVALID | _PAGE_PROTECT)
400 #define PAGE_RX __pgprot(_PAGE_PRESENT | _PAGE_READ | \
401 _PAGE_INVALID | _PAGE_PROTECT)
402 #define PAGE_RW __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
403 _PAGE_NOEXEC | _PAGE_INVALID | _PAGE_PROTECT)
404 #define PAGE_RWX __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
405 _PAGE_INVALID | _PAGE_PROTECT)
407 #define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
408 _PAGE_YOUNG | _PAGE_DIRTY | _PAGE_NOEXEC)
409 #define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
410 _PAGE_YOUNG | _PAGE_DIRTY | _PAGE_NOEXEC)
411 #define PAGE_KERNEL_RO __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_YOUNG | \
412 _PAGE_PROTECT | _PAGE_NOEXEC)
413 #define PAGE_KERNEL_EXEC __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
414 _PAGE_YOUNG | _PAGE_DIRTY)
417 * On s390 the page table entry has an invalid bit and a read-only bit.
418 * Read permission implies execute permission and write permission
419 * implies read permission.
422 #define __P000 PAGE_NONE
423 #define __P001 PAGE_RO
424 #define __P010 PAGE_RO
425 #define __P011 PAGE_RO
426 #define __P100 PAGE_RX
427 #define __P101 PAGE_RX
428 #define __P110 PAGE_RX
429 #define __P111 PAGE_RX
431 #define __S000 PAGE_NONE
432 #define __S001 PAGE_RO
433 #define __S010 PAGE_RW
434 #define __S011 PAGE_RW
435 #define __S100 PAGE_RX
436 #define __S101 PAGE_RX
437 #define __S110 PAGE_RWX
438 #define __S111 PAGE_RWX
441 * Segment entry (large page) protection definitions.
443 #define SEGMENT_NONE __pgprot(_SEGMENT_ENTRY_INVALID | \
444 _SEGMENT_ENTRY_PROTECT)
445 #define SEGMENT_RO __pgprot(_SEGMENT_ENTRY_PROTECT | \
446 _SEGMENT_ENTRY_READ | \
447 _SEGMENT_ENTRY_NOEXEC)
448 #define SEGMENT_RX __pgprot(_SEGMENT_ENTRY_PROTECT | \
450 #define SEGMENT_RW __pgprot(_SEGMENT_ENTRY_READ | \
451 _SEGMENT_ENTRY_WRITE | \
452 _SEGMENT_ENTRY_NOEXEC)
453 #define SEGMENT_RWX __pgprot(_SEGMENT_ENTRY_READ | \
454 _SEGMENT_ENTRY_WRITE)
455 #define SEGMENT_KERNEL __pgprot(_SEGMENT_ENTRY | \
456 _SEGMENT_ENTRY_LARGE | \
457 _SEGMENT_ENTRY_READ | \
458 _SEGMENT_ENTRY_WRITE | \
459 _SEGMENT_ENTRY_YOUNG | \
460 _SEGMENT_ENTRY_DIRTY | \
461 _SEGMENT_ENTRY_NOEXEC)
462 #define SEGMENT_KERNEL_RO __pgprot(_SEGMENT_ENTRY | \
463 _SEGMENT_ENTRY_LARGE | \
464 _SEGMENT_ENTRY_READ | \
465 _SEGMENT_ENTRY_YOUNG | \
466 _SEGMENT_ENTRY_PROTECT | \
467 _SEGMENT_ENTRY_NOEXEC)
470 * Region3 entry (large page) protection definitions.
473 #define REGION3_KERNEL __pgprot(_REGION_ENTRY_TYPE_R3 | \
474 _REGION3_ENTRY_LARGE | \
475 _REGION3_ENTRY_READ | \
476 _REGION3_ENTRY_WRITE | \
477 _REGION3_ENTRY_YOUNG | \
478 _REGION3_ENTRY_DIRTY | \
479 _REGION_ENTRY_NOEXEC)
480 #define REGION3_KERNEL_RO __pgprot(_REGION_ENTRY_TYPE_R3 | \
481 _REGION3_ENTRY_LARGE | \
482 _REGION3_ENTRY_READ | \
483 _REGION3_ENTRY_YOUNG | \
484 _REGION_ENTRY_PROTECT | \
485 _REGION_ENTRY_NOEXEC)
487 static inline bool mm_p4d_folded(struct mm_struct
*mm
)
489 return mm
->context
.asce_limit
<= _REGION1_SIZE
;
491 #define mm_p4d_folded(mm) mm_p4d_folded(mm)
493 static inline bool mm_pud_folded(struct mm_struct
*mm
)
495 return mm
->context
.asce_limit
<= _REGION2_SIZE
;
497 #define mm_pud_folded(mm) mm_pud_folded(mm)
499 static inline bool mm_pmd_folded(struct mm_struct
*mm
)
501 return mm
->context
.asce_limit
<= _REGION3_SIZE
;
503 #define mm_pmd_folded(mm) mm_pmd_folded(mm)
505 static inline int mm_has_pgste(struct mm_struct
*mm
)
508 if (unlikely(mm
->context
.has_pgste
))
514 static inline int mm_alloc_pgste(struct mm_struct
*mm
)
517 if (unlikely(mm
->context
.alloc_pgste
))
524 * In the case that a guest uses storage keys
525 * faults should no longer be backed by zero pages
527 #define mm_forbids_zeropage mm_has_pgste
528 static inline int mm_use_skey(struct mm_struct
*mm
)
531 if (mm
->context
.use_skey
)
537 static inline void csp(unsigned int *ptr
, unsigned int old
, unsigned int new)
539 register unsigned long reg2
asm("2") = old
;
540 register unsigned long reg3
asm("3") = new;
541 unsigned long address
= (unsigned long)ptr
| 1;
545 : "+d" (reg2
), "+m" (*ptr
)
546 : "d" (reg3
), "d" (address
)
550 static inline void cspg(unsigned long *ptr
, unsigned long old
, unsigned long new)
552 register unsigned long reg2
asm("2") = old
;
553 register unsigned long reg3
asm("3") = new;
554 unsigned long address
= (unsigned long)ptr
| 1;
557 " .insn rre,0xb98a0000,%0,%3"
558 : "+d" (reg2
), "+m" (*ptr
)
559 : "d" (reg3
), "d" (address
)
563 #define CRDTE_DTT_PAGE 0x00UL
564 #define CRDTE_DTT_SEGMENT 0x10UL
565 #define CRDTE_DTT_REGION3 0x14UL
566 #define CRDTE_DTT_REGION2 0x18UL
567 #define CRDTE_DTT_REGION1 0x1cUL
569 static inline void crdte(unsigned long old
, unsigned long new,
570 unsigned long table
, unsigned long dtt
,
571 unsigned long address
, unsigned long asce
)
573 register unsigned long reg2
asm("2") = old
;
574 register unsigned long reg3
asm("3") = new;
575 register unsigned long reg4
asm("4") = table
| dtt
;
576 register unsigned long reg5
asm("5") = address
;
578 asm volatile(".insn rrf,0xb98f0000,%0,%2,%4,0"
580 : "d" (reg3
), "d" (reg4
), "d" (reg5
), "a" (asce
)
585 * pgd/p4d/pud/pmd/pte query functions
587 static inline int pgd_folded(pgd_t pgd
)
589 return (pgd_val(pgd
) & _REGION_ENTRY_TYPE_MASK
) < _REGION_ENTRY_TYPE_R1
;
592 static inline int pgd_present(pgd_t pgd
)
596 return (pgd_val(pgd
) & _REGION_ENTRY_ORIGIN
) != 0UL;
599 static inline int pgd_none(pgd_t pgd
)
603 return (pgd_val(pgd
) & _REGION_ENTRY_INVALID
) != 0UL;
606 static inline int pgd_bad(pgd_t pgd
)
609 * With dynamic page table levels the pgd can be a region table
610 * entry or a segment table entry. Check for the bit that are
611 * invalid for either table entry.
614 ~_SEGMENT_ENTRY_ORIGIN
& ~_REGION_ENTRY_INVALID
&
615 ~_REGION_ENTRY_TYPE_MASK
& ~_REGION_ENTRY_LENGTH
;
616 return (pgd_val(pgd
) & mask
) != 0;
619 static inline int p4d_folded(p4d_t p4d
)
621 return (p4d_val(p4d
) & _REGION_ENTRY_TYPE_MASK
) < _REGION_ENTRY_TYPE_R2
;
624 static inline int p4d_present(p4d_t p4d
)
628 return (p4d_val(p4d
) & _REGION_ENTRY_ORIGIN
) != 0UL;
631 static inline int p4d_none(p4d_t p4d
)
635 return p4d_val(p4d
) == _REGION2_ENTRY_EMPTY
;
638 static inline unsigned long p4d_pfn(p4d_t p4d
)
640 unsigned long origin_mask
;
642 origin_mask
= _REGION_ENTRY_ORIGIN
;
643 return (p4d_val(p4d
) & origin_mask
) >> PAGE_SHIFT
;
646 static inline int pud_folded(pud_t pud
)
648 return (pud_val(pud
) & _REGION_ENTRY_TYPE_MASK
) < _REGION_ENTRY_TYPE_R3
;
651 static inline int pud_present(pud_t pud
)
655 return (pud_val(pud
) & _REGION_ENTRY_ORIGIN
) != 0UL;
658 static inline int pud_none(pud_t pud
)
662 return pud_val(pud
) == _REGION3_ENTRY_EMPTY
;
665 static inline int pud_large(pud_t pud
)
667 if ((pud_val(pud
) & _REGION_ENTRY_TYPE_MASK
) != _REGION_ENTRY_TYPE_R3
)
669 return !!(pud_val(pud
) & _REGION3_ENTRY_LARGE
);
672 static inline unsigned long pud_pfn(pud_t pud
)
674 unsigned long origin_mask
;
676 origin_mask
= _REGION_ENTRY_ORIGIN
;
678 origin_mask
= _REGION3_ENTRY_ORIGIN_LARGE
;
679 return (pud_val(pud
) & origin_mask
) >> PAGE_SHIFT
;
682 static inline int pmd_large(pmd_t pmd
)
684 return (pmd_val(pmd
) & _SEGMENT_ENTRY_LARGE
) != 0;
687 static inline int pmd_bad(pmd_t pmd
)
690 return (pmd_val(pmd
) & ~_SEGMENT_ENTRY_BITS_LARGE
) != 0;
691 return (pmd_val(pmd
) & ~_SEGMENT_ENTRY_BITS
) != 0;
694 static inline int pud_bad(pud_t pud
)
696 if ((pud_val(pud
) & _REGION_ENTRY_TYPE_MASK
) < _REGION_ENTRY_TYPE_R3
)
697 return pmd_bad(__pmd(pud_val(pud
)));
699 return (pud_val(pud
) & ~_REGION_ENTRY_BITS_LARGE
) != 0;
700 return (pud_val(pud
) & ~_REGION_ENTRY_BITS
) != 0;
703 static inline int p4d_bad(p4d_t p4d
)
705 if ((p4d_val(p4d
) & _REGION_ENTRY_TYPE_MASK
) < _REGION_ENTRY_TYPE_R2
)
706 return pud_bad(__pud(p4d_val(p4d
)));
707 return (p4d_val(p4d
) & ~_REGION_ENTRY_BITS
) != 0;
710 static inline int pmd_present(pmd_t pmd
)
712 return pmd_val(pmd
) != _SEGMENT_ENTRY_EMPTY
;
715 static inline int pmd_none(pmd_t pmd
)
717 return pmd_val(pmd
) == _SEGMENT_ENTRY_EMPTY
;
720 static inline unsigned long pmd_pfn(pmd_t pmd
)
722 unsigned long origin_mask
;
724 origin_mask
= _SEGMENT_ENTRY_ORIGIN
;
726 origin_mask
= _SEGMENT_ENTRY_ORIGIN_LARGE
;
727 return (pmd_val(pmd
) & origin_mask
) >> PAGE_SHIFT
;
730 #define pmd_write pmd_write
731 static inline int pmd_write(pmd_t pmd
)
733 return (pmd_val(pmd
) & _SEGMENT_ENTRY_WRITE
) != 0;
736 static inline int pmd_dirty(pmd_t pmd
)
740 dirty
= (pmd_val(pmd
) & _SEGMENT_ENTRY_DIRTY
) != 0;
744 static inline int pmd_young(pmd_t pmd
)
748 young
= (pmd_val(pmd
) & _SEGMENT_ENTRY_YOUNG
) != 0;
752 static inline int pte_present(pte_t pte
)
754 /* Bit pattern: (pte & 0x001) == 0x001 */
755 return (pte_val(pte
) & _PAGE_PRESENT
) != 0;
758 static inline int pte_none(pte_t pte
)
760 /* Bit pattern: pte == 0x400 */
761 return pte_val(pte
) == _PAGE_INVALID
;
764 static inline int pte_swap(pte_t pte
)
766 /* Bit pattern: (pte & 0x201) == 0x200 */
767 return (pte_val(pte
) & (_PAGE_PROTECT
| _PAGE_PRESENT
))
771 static inline int pte_special(pte_t pte
)
773 return (pte_val(pte
) & _PAGE_SPECIAL
);
776 #define __HAVE_ARCH_PTE_SAME
777 static inline int pte_same(pte_t a
, pte_t b
)
779 return pte_val(a
) == pte_val(b
);
782 #ifdef CONFIG_NUMA_BALANCING
783 static inline int pte_protnone(pte_t pte
)
785 return pte_present(pte
) && !(pte_val(pte
) & _PAGE_READ
);
788 static inline int pmd_protnone(pmd_t pmd
)
790 /* pmd_large(pmd) implies pmd_present(pmd) */
791 return pmd_large(pmd
) && !(pmd_val(pmd
) & _SEGMENT_ENTRY_READ
);
795 static inline int pte_soft_dirty(pte_t pte
)
797 return pte_val(pte
) & _PAGE_SOFT_DIRTY
;
799 #define pte_swp_soft_dirty pte_soft_dirty
801 static inline pte_t
pte_mksoft_dirty(pte_t pte
)
803 pte_val(pte
) |= _PAGE_SOFT_DIRTY
;
806 #define pte_swp_mksoft_dirty pte_mksoft_dirty
808 static inline pte_t
pte_clear_soft_dirty(pte_t pte
)
810 pte_val(pte
) &= ~_PAGE_SOFT_DIRTY
;
813 #define pte_swp_clear_soft_dirty pte_clear_soft_dirty
815 static inline int pmd_soft_dirty(pmd_t pmd
)
817 return pmd_val(pmd
) & _SEGMENT_ENTRY_SOFT_DIRTY
;
820 static inline pmd_t
pmd_mksoft_dirty(pmd_t pmd
)
822 pmd_val(pmd
) |= _SEGMENT_ENTRY_SOFT_DIRTY
;
826 static inline pmd_t
pmd_clear_soft_dirty(pmd_t pmd
)
828 pmd_val(pmd
) &= ~_SEGMENT_ENTRY_SOFT_DIRTY
;
833 * query functions pte_write/pte_dirty/pte_young only work if
834 * pte_present() is true. Undefined behaviour if not..
836 static inline int pte_write(pte_t pte
)
838 return (pte_val(pte
) & _PAGE_WRITE
) != 0;
841 static inline int pte_dirty(pte_t pte
)
843 return (pte_val(pte
) & _PAGE_DIRTY
) != 0;
846 static inline int pte_young(pte_t pte
)
848 return (pte_val(pte
) & _PAGE_YOUNG
) != 0;
851 #define __HAVE_ARCH_PTE_UNUSED
852 static inline int pte_unused(pte_t pte
)
854 return pte_val(pte
) & _PAGE_UNUSED
;
858 * pgd/pmd/pte modification functions
861 static inline void pgd_clear(pgd_t
*pgd
)
863 if ((pgd_val(*pgd
) & _REGION_ENTRY_TYPE_MASK
) == _REGION_ENTRY_TYPE_R1
)
864 pgd_val(*pgd
) = _REGION1_ENTRY_EMPTY
;
867 static inline void p4d_clear(p4d_t
*p4d
)
869 if ((p4d_val(*p4d
) & _REGION_ENTRY_TYPE_MASK
) == _REGION_ENTRY_TYPE_R2
)
870 p4d_val(*p4d
) = _REGION2_ENTRY_EMPTY
;
873 static inline void pud_clear(pud_t
*pud
)
875 if ((pud_val(*pud
) & _REGION_ENTRY_TYPE_MASK
) == _REGION_ENTRY_TYPE_R3
)
876 pud_val(*pud
) = _REGION3_ENTRY_EMPTY
;
879 static inline void pmd_clear(pmd_t
*pmdp
)
881 pmd_val(*pmdp
) = _SEGMENT_ENTRY_EMPTY
;
884 static inline void pte_clear(struct mm_struct
*mm
, unsigned long addr
, pte_t
*ptep
)
886 pte_val(*ptep
) = _PAGE_INVALID
;
890 * The following pte modification functions only work if
891 * pte_present() is true. Undefined behaviour if not..
893 static inline pte_t
pte_modify(pte_t pte
, pgprot_t newprot
)
895 pte_val(pte
) &= _PAGE_CHG_MASK
;
896 pte_val(pte
) |= pgprot_val(newprot
);
898 * newprot for PAGE_NONE, PAGE_RO, PAGE_RX, PAGE_RW and PAGE_RWX
899 * has the invalid bit set, clear it again for readable, young pages
901 if ((pte_val(pte
) & _PAGE_YOUNG
) && (pte_val(pte
) & _PAGE_READ
))
902 pte_val(pte
) &= ~_PAGE_INVALID
;
904 * newprot for PAGE_RO, PAGE_RX, PAGE_RW and PAGE_RWX has the page
905 * protection bit set, clear it again for writable, dirty pages
907 if ((pte_val(pte
) & _PAGE_DIRTY
) && (pte_val(pte
) & _PAGE_WRITE
))
908 pte_val(pte
) &= ~_PAGE_PROTECT
;
912 static inline pte_t
pte_wrprotect(pte_t pte
)
914 pte_val(pte
) &= ~_PAGE_WRITE
;
915 pte_val(pte
) |= _PAGE_PROTECT
;
919 static inline pte_t
pte_mkwrite(pte_t pte
)
921 pte_val(pte
) |= _PAGE_WRITE
;
922 if (pte_val(pte
) & _PAGE_DIRTY
)
923 pte_val(pte
) &= ~_PAGE_PROTECT
;
927 static inline pte_t
pte_mkclean(pte_t pte
)
929 pte_val(pte
) &= ~_PAGE_DIRTY
;
930 pte_val(pte
) |= _PAGE_PROTECT
;
934 static inline pte_t
pte_mkdirty(pte_t pte
)
936 pte_val(pte
) |= _PAGE_DIRTY
| _PAGE_SOFT_DIRTY
;
937 if (pte_val(pte
) & _PAGE_WRITE
)
938 pte_val(pte
) &= ~_PAGE_PROTECT
;
942 static inline pte_t
pte_mkold(pte_t pte
)
944 pte_val(pte
) &= ~_PAGE_YOUNG
;
945 pte_val(pte
) |= _PAGE_INVALID
;
949 static inline pte_t
pte_mkyoung(pte_t pte
)
951 pte_val(pte
) |= _PAGE_YOUNG
;
952 if (pte_val(pte
) & _PAGE_READ
)
953 pte_val(pte
) &= ~_PAGE_INVALID
;
957 static inline pte_t
pte_mkspecial(pte_t pte
)
959 pte_val(pte
) |= _PAGE_SPECIAL
;
963 #ifdef CONFIG_HUGETLB_PAGE
964 static inline pte_t
pte_mkhuge(pte_t pte
)
966 pte_val(pte
) |= _PAGE_LARGE
;
971 #define IPTE_GLOBAL 0
974 #define IPTE_NODAT 0x400
975 #define IPTE_GUEST_ASCE 0x800
977 static inline void __ptep_ipte(unsigned long address
, pte_t
*ptep
,
978 unsigned long opt
, unsigned long asce
,
981 unsigned long pto
= (unsigned long) ptep
;
983 if (__builtin_constant_p(opt
) && opt
== 0) {
984 /* Invalidation + TLB flush for the pte */
986 " .insn rrf,0xb2210000,%[r1],%[r2],0,%[m4]"
987 : "+m" (*ptep
) : [r1
] "a" (pto
), [r2
] "a" (address
),
992 /* Invalidate ptes with options + TLB flush of the ptes */
993 opt
= opt
| (asce
& _ASCE_ORIGIN
);
995 " .insn rrf,0xb2210000,%[r1],%[r2],%[r3],%[m4]"
996 : [r2
] "+a" (address
), [r3
] "+a" (opt
)
997 : [r1
] "a" (pto
), [m4
] "i" (local
) : "memory");
1000 static inline void __ptep_ipte_range(unsigned long address
, int nr
,
1001 pte_t
*ptep
, int local
)
1003 unsigned long pto
= (unsigned long) ptep
;
1005 /* Invalidate a range of ptes + TLB flush of the ptes */
1008 " .insn rrf,0xb2210000,%[r1],%[r2],%[r3],%[m4]"
1009 : [r2
] "+a" (address
), [r3
] "+a" (nr
)
1010 : [r1
] "a" (pto
), [m4
] "i" (local
) : "memory");
1011 } while (nr
!= 255);
1015 * This is hard to understand. ptep_get_and_clear and ptep_clear_flush
1016 * both clear the TLB for the unmapped pte. The reason is that
1017 * ptep_get_and_clear is used in common code (e.g. change_pte_range)
1018 * to modify an active pte. The sequence is
1019 * 1) ptep_get_and_clear
1021 * 3) flush_tlb_range
1022 * On s390 the tlb needs to get flushed with the modification of the pte
1023 * if the pte is active. The only way how this can be implemented is to
1024 * have ptep_get_and_clear do the tlb flush. In exchange flush_tlb_range
1027 pte_t
ptep_xchg_direct(struct mm_struct
*, unsigned long, pte_t
*, pte_t
);
1028 pte_t
ptep_xchg_lazy(struct mm_struct
*, unsigned long, pte_t
*, pte_t
);
1030 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
1031 static inline int ptep_test_and_clear_young(struct vm_area_struct
*vma
,
1032 unsigned long addr
, pte_t
*ptep
)
1036 pte
= ptep_xchg_direct(vma
->vm_mm
, addr
, ptep
, pte_mkold(pte
));
1037 return pte_young(pte
);
1040 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
1041 static inline int ptep_clear_flush_young(struct vm_area_struct
*vma
,
1042 unsigned long address
, pte_t
*ptep
)
1044 return ptep_test_and_clear_young(vma
, address
, ptep
);
1047 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
1048 static inline pte_t
ptep_get_and_clear(struct mm_struct
*mm
,
1049 unsigned long addr
, pte_t
*ptep
)
1051 return ptep_xchg_lazy(mm
, addr
, ptep
, __pte(_PAGE_INVALID
));
1054 #define __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
1055 pte_t
ptep_modify_prot_start(struct mm_struct
*, unsigned long, pte_t
*);
1056 void ptep_modify_prot_commit(struct mm_struct
*, unsigned long, pte_t
*, pte_t
);
1058 #define __HAVE_ARCH_PTEP_CLEAR_FLUSH
1059 static inline pte_t
ptep_clear_flush(struct vm_area_struct
*vma
,
1060 unsigned long addr
, pte_t
*ptep
)
1062 return ptep_xchg_direct(vma
->vm_mm
, addr
, ptep
, __pte(_PAGE_INVALID
));
1066 * The batched pte unmap code uses ptep_get_and_clear_full to clear the
1067 * ptes. Here an optimization is possible. tlb_gather_mmu flushes all
1068 * tlbs of an mm if it can guarantee that the ptes of the mm_struct
1069 * cannot be accessed while the batched unmap is running. In this case
1070 * full==1 and a simple pte_clear is enough. See tlb.h.
1072 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
1073 static inline pte_t
ptep_get_and_clear_full(struct mm_struct
*mm
,
1075 pte_t
*ptep
, int full
)
1079 *ptep
= __pte(_PAGE_INVALID
);
1082 return ptep_xchg_lazy(mm
, addr
, ptep
, __pte(_PAGE_INVALID
));
1085 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
1086 static inline void ptep_set_wrprotect(struct mm_struct
*mm
,
1087 unsigned long addr
, pte_t
*ptep
)
1092 ptep_xchg_lazy(mm
, addr
, ptep
, pte_wrprotect(pte
));
1095 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
1096 static inline int ptep_set_access_flags(struct vm_area_struct
*vma
,
1097 unsigned long addr
, pte_t
*ptep
,
1098 pte_t entry
, int dirty
)
1100 if (pte_same(*ptep
, entry
))
1102 ptep_xchg_direct(vma
->vm_mm
, addr
, ptep
, entry
);
1107 * Additional functions to handle KVM guest page tables
1109 void ptep_set_pte_at(struct mm_struct
*mm
, unsigned long addr
,
1110 pte_t
*ptep
, pte_t entry
);
1111 void ptep_set_notify(struct mm_struct
*mm
, unsigned long addr
, pte_t
*ptep
);
1112 void ptep_notify(struct mm_struct
*mm
, unsigned long addr
,
1113 pte_t
*ptep
, unsigned long bits
);
1114 int ptep_force_prot(struct mm_struct
*mm
, unsigned long gaddr
,
1115 pte_t
*ptep
, int prot
, unsigned long bit
);
1116 void ptep_zap_unused(struct mm_struct
*mm
, unsigned long addr
,
1117 pte_t
*ptep
, int reset
);
1118 void ptep_zap_key(struct mm_struct
*mm
, unsigned long addr
, pte_t
*ptep
);
1119 int ptep_shadow_pte(struct mm_struct
*mm
, unsigned long saddr
,
1120 pte_t
*sptep
, pte_t
*tptep
, pte_t pte
);
1121 void ptep_unshadow_pte(struct mm_struct
*mm
, unsigned long saddr
, pte_t
*ptep
);
1123 bool test_and_clear_guest_dirty(struct mm_struct
*mm
, unsigned long address
);
1124 int set_guest_storage_key(struct mm_struct
*mm
, unsigned long addr
,
1125 unsigned char key
, bool nq
);
1126 int cond_set_guest_storage_key(struct mm_struct
*mm
, unsigned long addr
,
1127 unsigned char key
, unsigned char *oldkey
,
1128 bool nq
, bool mr
, bool mc
);
1129 int reset_guest_reference_bit(struct mm_struct
*mm
, unsigned long addr
);
1130 int get_guest_storage_key(struct mm_struct
*mm
, unsigned long addr
,
1131 unsigned char *key
);
1133 int set_pgste_bits(struct mm_struct
*mm
, unsigned long addr
,
1134 unsigned long bits
, unsigned long value
);
1135 int get_pgste(struct mm_struct
*mm
, unsigned long hva
, unsigned long *pgstep
);
1136 int pgste_perform_essa(struct mm_struct
*mm
, unsigned long hva
, int orc
,
1137 unsigned long *oldpte
, unsigned long *oldpgste
);
1140 * Certain architectures need to do special things when PTEs
1141 * within a page table are directly modified. Thus, the following
1142 * hook is made available.
1144 static inline void set_pte_at(struct mm_struct
*mm
, unsigned long addr
,
1145 pte_t
*ptep
, pte_t entry
)
1147 if (pte_present(entry
))
1148 pte_val(entry
) &= ~_PAGE_UNUSED
;
1149 if (mm_has_pgste(mm
))
1150 ptep_set_pte_at(mm
, addr
, ptep
, entry
);
1156 * Conversion functions: convert a page and protection to a page entry,
1157 * and a page entry and page directory to the page they refer to.
1159 static inline pte_t
mk_pte_phys(unsigned long physpage
, pgprot_t pgprot
)
1162 pte_val(__pte
) = physpage
+ pgprot_val(pgprot
);
1163 if (!MACHINE_HAS_NX
)
1164 pte_val(__pte
) &= ~_PAGE_NOEXEC
;
1165 return pte_mkyoung(__pte
);
1168 static inline pte_t
mk_pte(struct page
*page
, pgprot_t pgprot
)
1170 unsigned long physpage
= page_to_phys(page
);
1171 pte_t __pte
= mk_pte_phys(physpage
, pgprot
);
1173 if (pte_write(__pte
) && PageDirty(page
))
1174 __pte
= pte_mkdirty(__pte
);
1178 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
1179 #define p4d_index(address) (((address) >> P4D_SHIFT) & (PTRS_PER_P4D-1))
1180 #define pud_index(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
1181 #define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
1182 #define pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE-1))
1184 #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
1185 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
1187 #define pmd_deref(pmd) (pmd_val(pmd) & _SEGMENT_ENTRY_ORIGIN)
1188 #define pud_deref(pud) (pud_val(pud) & _REGION_ENTRY_ORIGIN)
1189 #define p4d_deref(pud) (p4d_val(pud) & _REGION_ENTRY_ORIGIN)
1190 #define pgd_deref(pgd) (pgd_val(pgd) & _REGION_ENTRY_ORIGIN)
1192 static inline p4d_t
*p4d_offset(pgd_t
*pgd
, unsigned long address
)
1194 p4d_t
*p4d
= (p4d_t
*) pgd
;
1196 if ((pgd_val(*pgd
) & _REGION_ENTRY_TYPE_MASK
) == _REGION_ENTRY_TYPE_R1
)
1197 p4d
= (p4d_t
*) pgd_deref(*pgd
);
1198 return p4d
+ p4d_index(address
);
1201 static inline pud_t
*pud_offset(p4d_t
*p4d
, unsigned long address
)
1203 pud_t
*pud
= (pud_t
*) p4d
;
1205 if ((p4d_val(*p4d
) & _REGION_ENTRY_TYPE_MASK
) == _REGION_ENTRY_TYPE_R2
)
1206 pud
= (pud_t
*) p4d_deref(*p4d
);
1207 return pud
+ pud_index(address
);
1210 static inline pmd_t
*pmd_offset(pud_t
*pud
, unsigned long address
)
1212 pmd_t
*pmd
= (pmd_t
*) pud
;
1214 if ((pud_val(*pud
) & _REGION_ENTRY_TYPE_MASK
) == _REGION_ENTRY_TYPE_R3
)
1215 pmd
= (pmd_t
*) pud_deref(*pud
);
1216 return pmd
+ pmd_index(address
);
1219 #define pfn_pte(pfn,pgprot) mk_pte_phys(__pa((pfn) << PAGE_SHIFT),(pgprot))
1220 #define pte_pfn(x) (pte_val(x) >> PAGE_SHIFT)
1221 #define pte_page(x) pfn_to_page(pte_pfn(x))
1223 #define pmd_page(pmd) pfn_to_page(pmd_pfn(pmd))
1224 #define pud_page(pud) pfn_to_page(pud_pfn(pud))
1225 #define p4d_page(pud) pfn_to_page(p4d_pfn(p4d))
1227 /* Find an entry in the lowest level page table.. */
1228 #define pte_offset(pmd, addr) ((pte_t *) pmd_deref(*(pmd)) + pte_index(addr))
1229 #define pte_offset_kernel(pmd, address) pte_offset(pmd,address)
1230 #define pte_offset_map(pmd, address) pte_offset_kernel(pmd, address)
1231 #define pte_unmap(pte) do { } while (0)
1233 static inline pmd_t
pmd_wrprotect(pmd_t pmd
)
1235 pmd_val(pmd
) &= ~_SEGMENT_ENTRY_WRITE
;
1236 pmd_val(pmd
) |= _SEGMENT_ENTRY_PROTECT
;
1240 static inline pmd_t
pmd_mkwrite(pmd_t pmd
)
1242 pmd_val(pmd
) |= _SEGMENT_ENTRY_WRITE
;
1243 if (pmd_large(pmd
) && !(pmd_val(pmd
) & _SEGMENT_ENTRY_DIRTY
))
1245 pmd_val(pmd
) &= ~_SEGMENT_ENTRY_PROTECT
;
1249 static inline pmd_t
pmd_mkclean(pmd_t pmd
)
1251 if (pmd_large(pmd
)) {
1252 pmd_val(pmd
) &= ~_SEGMENT_ENTRY_DIRTY
;
1253 pmd_val(pmd
) |= _SEGMENT_ENTRY_PROTECT
;
1258 static inline pmd_t
pmd_mkdirty(pmd_t pmd
)
1260 if (pmd_large(pmd
)) {
1261 pmd_val(pmd
) |= _SEGMENT_ENTRY_DIRTY
|
1262 _SEGMENT_ENTRY_SOFT_DIRTY
;
1263 if (pmd_val(pmd
) & _SEGMENT_ENTRY_WRITE
)
1264 pmd_val(pmd
) &= ~_SEGMENT_ENTRY_PROTECT
;
1269 static inline pud_t
pud_wrprotect(pud_t pud
)
1271 pud_val(pud
) &= ~_REGION3_ENTRY_WRITE
;
1272 pud_val(pud
) |= _REGION_ENTRY_PROTECT
;
1276 static inline pud_t
pud_mkwrite(pud_t pud
)
1278 pud_val(pud
) |= _REGION3_ENTRY_WRITE
;
1279 if (pud_large(pud
) && !(pud_val(pud
) & _REGION3_ENTRY_DIRTY
))
1281 pud_val(pud
) &= ~_REGION_ENTRY_PROTECT
;
1285 static inline pud_t
pud_mkclean(pud_t pud
)
1287 if (pud_large(pud
)) {
1288 pud_val(pud
) &= ~_REGION3_ENTRY_DIRTY
;
1289 pud_val(pud
) |= _REGION_ENTRY_PROTECT
;
1294 static inline pud_t
pud_mkdirty(pud_t pud
)
1296 if (pud_large(pud
)) {
1297 pud_val(pud
) |= _REGION3_ENTRY_DIRTY
|
1298 _REGION3_ENTRY_SOFT_DIRTY
;
1299 if (pud_val(pud
) & _REGION3_ENTRY_WRITE
)
1300 pud_val(pud
) &= ~_REGION_ENTRY_PROTECT
;
1305 #if defined(CONFIG_TRANSPARENT_HUGEPAGE) || defined(CONFIG_HUGETLB_PAGE)
1306 static inline unsigned long massage_pgprot_pmd(pgprot_t pgprot
)
1309 * pgprot is PAGE_NONE, PAGE_RO, PAGE_RX, PAGE_RW or PAGE_RWX
1310 * (see __Pxxx / __Sxxx). Convert to segment table entry format.
1312 if (pgprot_val(pgprot
) == pgprot_val(PAGE_NONE
))
1313 return pgprot_val(SEGMENT_NONE
);
1314 if (pgprot_val(pgprot
) == pgprot_val(PAGE_RO
))
1315 return pgprot_val(SEGMENT_RO
);
1316 if (pgprot_val(pgprot
) == pgprot_val(PAGE_RX
))
1317 return pgprot_val(SEGMENT_RX
);
1318 if (pgprot_val(pgprot
) == pgprot_val(PAGE_RW
))
1319 return pgprot_val(SEGMENT_RW
);
1320 return pgprot_val(SEGMENT_RWX
);
1323 static inline pmd_t
pmd_mkyoung(pmd_t pmd
)
1325 if (pmd_large(pmd
)) {
1326 pmd_val(pmd
) |= _SEGMENT_ENTRY_YOUNG
;
1327 if (pmd_val(pmd
) & _SEGMENT_ENTRY_READ
)
1328 pmd_val(pmd
) &= ~_SEGMENT_ENTRY_INVALID
;
1333 static inline pmd_t
pmd_mkold(pmd_t pmd
)
1335 if (pmd_large(pmd
)) {
1336 pmd_val(pmd
) &= ~_SEGMENT_ENTRY_YOUNG
;
1337 pmd_val(pmd
) |= _SEGMENT_ENTRY_INVALID
;
1342 static inline pmd_t
pmd_modify(pmd_t pmd
, pgprot_t newprot
)
1344 if (pmd_large(pmd
)) {
1345 pmd_val(pmd
) &= _SEGMENT_ENTRY_ORIGIN_LARGE
|
1346 _SEGMENT_ENTRY_DIRTY
| _SEGMENT_ENTRY_YOUNG
|
1347 _SEGMENT_ENTRY_LARGE
| _SEGMENT_ENTRY_SOFT_DIRTY
;
1348 pmd_val(pmd
) |= massage_pgprot_pmd(newprot
);
1349 if (!(pmd_val(pmd
) & _SEGMENT_ENTRY_DIRTY
))
1350 pmd_val(pmd
) |= _SEGMENT_ENTRY_PROTECT
;
1351 if (!(pmd_val(pmd
) & _SEGMENT_ENTRY_YOUNG
))
1352 pmd_val(pmd
) |= _SEGMENT_ENTRY_INVALID
;
1355 pmd_val(pmd
) &= _SEGMENT_ENTRY_ORIGIN
;
1356 pmd_val(pmd
) |= massage_pgprot_pmd(newprot
);
1360 static inline pmd_t
mk_pmd_phys(unsigned long physpage
, pgprot_t pgprot
)
1363 pmd_val(__pmd
) = physpage
+ massage_pgprot_pmd(pgprot
);
1367 #endif /* CONFIG_TRANSPARENT_HUGEPAGE || CONFIG_HUGETLB_PAGE */
1369 static inline void __pmdp_csp(pmd_t
*pmdp
)
1371 csp((unsigned int *)pmdp
+ 1, pmd_val(*pmdp
),
1372 pmd_val(*pmdp
) | _SEGMENT_ENTRY_INVALID
);
1375 #define IDTE_GLOBAL 0
1376 #define IDTE_LOCAL 1
1378 #define IDTE_PTOA 0x0800
1379 #define IDTE_NODAT 0x1000
1380 #define IDTE_GUEST_ASCE 0x2000
1382 static inline void __pmdp_idte(unsigned long addr
, pmd_t
*pmdp
,
1383 unsigned long opt
, unsigned long asce
,
1388 sto
= (unsigned long) pmdp
- pmd_index(addr
) * sizeof(pmd_t
);
1389 if (__builtin_constant_p(opt
) && opt
== 0) {
1390 /* flush without guest asce */
1392 " .insn rrf,0xb98e0000,%[r1],%[r2],0,%[m4]"
1394 : [r1
] "a" (sto
), [r2
] "a" ((addr
& HPAGE_MASK
)),
1398 /* flush with guest asce */
1400 " .insn rrf,0xb98e0000,%[r1],%[r2],%[r3],%[m4]"
1402 : [r1
] "a" (sto
), [r2
] "a" ((addr
& HPAGE_MASK
) | opt
),
1403 [r3
] "a" (asce
), [m4
] "i" (local
)
1408 static inline void __pudp_idte(unsigned long addr
, pud_t
*pudp
,
1409 unsigned long opt
, unsigned long asce
,
1414 r3o
= (unsigned long) pudp
- pud_index(addr
) * sizeof(pud_t
);
1415 r3o
|= _ASCE_TYPE_REGION3
;
1416 if (__builtin_constant_p(opt
) && opt
== 0) {
1417 /* flush without guest asce */
1419 " .insn rrf,0xb98e0000,%[r1],%[r2],0,%[m4]"
1421 : [r1
] "a" (r3o
), [r2
] "a" ((addr
& PUD_MASK
)),
1425 /* flush with guest asce */
1427 " .insn rrf,0xb98e0000,%[r1],%[r2],%[r3],%[m4]"
1429 : [r1
] "a" (r3o
), [r2
] "a" ((addr
& PUD_MASK
) | opt
),
1430 [r3
] "a" (asce
), [m4
] "i" (local
)
1435 pmd_t
pmdp_xchg_direct(struct mm_struct
*, unsigned long, pmd_t
*, pmd_t
);
1436 pmd_t
pmdp_xchg_lazy(struct mm_struct
*, unsigned long, pmd_t
*, pmd_t
);
1437 pud_t
pudp_xchg_direct(struct mm_struct
*, unsigned long, pud_t
*, pud_t
);
1439 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
1441 #define __HAVE_ARCH_PGTABLE_DEPOSIT
1442 void pgtable_trans_huge_deposit(struct mm_struct
*mm
, pmd_t
*pmdp
,
1445 #define __HAVE_ARCH_PGTABLE_WITHDRAW
1446 pgtable_t
pgtable_trans_huge_withdraw(struct mm_struct
*mm
, pmd_t
*pmdp
);
1448 #define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
1449 static inline int pmdp_set_access_flags(struct vm_area_struct
*vma
,
1450 unsigned long addr
, pmd_t
*pmdp
,
1451 pmd_t entry
, int dirty
)
1453 VM_BUG_ON(addr
& ~HPAGE_MASK
);
1455 entry
= pmd_mkyoung(entry
);
1457 entry
= pmd_mkdirty(entry
);
1458 if (pmd_val(*pmdp
) == pmd_val(entry
))
1460 pmdp_xchg_direct(vma
->vm_mm
, addr
, pmdp
, entry
);
1464 #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
1465 static inline int pmdp_test_and_clear_young(struct vm_area_struct
*vma
,
1466 unsigned long addr
, pmd_t
*pmdp
)
1470 pmd
= pmdp_xchg_direct(vma
->vm_mm
, addr
, pmdp
, pmd_mkold(pmd
));
1471 return pmd_young(pmd
);
1474 #define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
1475 static inline int pmdp_clear_flush_young(struct vm_area_struct
*vma
,
1476 unsigned long addr
, pmd_t
*pmdp
)
1478 VM_BUG_ON(addr
& ~HPAGE_MASK
);
1479 return pmdp_test_and_clear_young(vma
, addr
, pmdp
);
1482 static inline void set_pmd_at(struct mm_struct
*mm
, unsigned long addr
,
1483 pmd_t
*pmdp
, pmd_t entry
)
1485 if (!MACHINE_HAS_NX
)
1486 pmd_val(entry
) &= ~_SEGMENT_ENTRY_NOEXEC
;
1490 static inline pmd_t
pmd_mkhuge(pmd_t pmd
)
1492 pmd_val(pmd
) |= _SEGMENT_ENTRY_LARGE
;
1493 pmd_val(pmd
) |= _SEGMENT_ENTRY_YOUNG
;
1494 pmd_val(pmd
) |= _SEGMENT_ENTRY_PROTECT
;
1498 #define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
1499 static inline pmd_t
pmdp_huge_get_and_clear(struct mm_struct
*mm
,
1500 unsigned long addr
, pmd_t
*pmdp
)
1502 return pmdp_xchg_direct(mm
, addr
, pmdp
, __pmd(_SEGMENT_ENTRY_EMPTY
));
1505 #define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR_FULL
1506 static inline pmd_t
pmdp_huge_get_and_clear_full(struct mm_struct
*mm
,
1508 pmd_t
*pmdp
, int full
)
1512 *pmdp
= __pmd(_SEGMENT_ENTRY_EMPTY
);
1515 return pmdp_xchg_lazy(mm
, addr
, pmdp
, __pmd(_SEGMENT_ENTRY_EMPTY
));
1518 #define __HAVE_ARCH_PMDP_HUGE_CLEAR_FLUSH
1519 static inline pmd_t
pmdp_huge_clear_flush(struct vm_area_struct
*vma
,
1520 unsigned long addr
, pmd_t
*pmdp
)
1522 return pmdp_huge_get_and_clear(vma
->vm_mm
, addr
, pmdp
);
1525 #define __HAVE_ARCH_PMDP_INVALIDATE
1526 static inline void pmdp_invalidate(struct vm_area_struct
*vma
,
1527 unsigned long addr
, pmd_t
*pmdp
)
1529 pmd_t pmd
= __pmd(pmd_val(*pmdp
) | _SEGMENT_ENTRY_INVALID
);
1531 pmdp_xchg_direct(vma
->vm_mm
, addr
, pmdp
, pmd
);
1534 #define __HAVE_ARCH_PMDP_SET_WRPROTECT
1535 static inline void pmdp_set_wrprotect(struct mm_struct
*mm
,
1536 unsigned long addr
, pmd_t
*pmdp
)
1541 pmd
= pmdp_xchg_lazy(mm
, addr
, pmdp
, pmd_wrprotect(pmd
));
1544 static inline pmd_t
pmdp_collapse_flush(struct vm_area_struct
*vma
,
1545 unsigned long address
,
1548 return pmdp_huge_get_and_clear(vma
->vm_mm
, address
, pmdp
);
1550 #define pmdp_collapse_flush pmdp_collapse_flush
1552 #define pfn_pmd(pfn, pgprot) mk_pmd_phys(__pa((pfn) << PAGE_SHIFT), (pgprot))
1553 #define mk_pmd(page, pgprot) pfn_pmd(page_to_pfn(page), (pgprot))
1555 static inline int pmd_trans_huge(pmd_t pmd
)
1557 return pmd_val(pmd
) & _SEGMENT_ENTRY_LARGE
;
1560 #define has_transparent_hugepage has_transparent_hugepage
1561 static inline int has_transparent_hugepage(void)
1563 return MACHINE_HAS_EDAT1
? 1 : 0;
1565 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
1568 * 64 bit swap entry format:
1569 * A page-table entry has some bits we have to treat in a special way.
1570 * Bits 52 and bit 55 have to be zero, otherwise a specification
1571 * exception will occur instead of a page translation exception. The
1572 * specification exception has the bad habit not to store necessary
1573 * information in the lowcore.
1574 * Bits 54 and 63 are used to indicate the page type.
1575 * A swap pte is indicated by bit pattern (pte & 0x201) == 0x200
1576 * This leaves the bits 0-51 and bits 56-62 to store type and offset.
1577 * We use the 5 bits from 57-61 for the type and the 52 bits from 0-51
1579 * | offset |01100|type |00|
1580 * |0000000000111111111122222222223333333333444444444455|55555|55566|66|
1581 * |0123456789012345678901234567890123456789012345678901|23456|78901|23|
1584 #define __SWP_OFFSET_MASK ((1UL << 52) - 1)
1585 #define __SWP_OFFSET_SHIFT 12
1586 #define __SWP_TYPE_MASK ((1UL << 5) - 1)
1587 #define __SWP_TYPE_SHIFT 2
1589 static inline pte_t
mk_swap_pte(unsigned long type
, unsigned long offset
)
1593 pte_val(pte
) = _PAGE_INVALID
| _PAGE_PROTECT
;
1594 pte_val(pte
) |= (offset
& __SWP_OFFSET_MASK
) << __SWP_OFFSET_SHIFT
;
1595 pte_val(pte
) |= (type
& __SWP_TYPE_MASK
) << __SWP_TYPE_SHIFT
;
1599 static inline unsigned long __swp_type(swp_entry_t entry
)
1601 return (entry
.val
>> __SWP_TYPE_SHIFT
) & __SWP_TYPE_MASK
;
1604 static inline unsigned long __swp_offset(swp_entry_t entry
)
1606 return (entry
.val
>> __SWP_OFFSET_SHIFT
) & __SWP_OFFSET_MASK
;
1609 static inline swp_entry_t
__swp_entry(unsigned long type
, unsigned long offset
)
1611 return (swp_entry_t
) { pte_val(mk_swap_pte(type
, offset
)) };
1614 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
1615 #define __swp_entry_to_pte(x) ((pte_t) { (x).val })
1617 #define kern_addr_valid(addr) (1)
1619 extern int vmem_add_mapping(unsigned long start
, unsigned long size
);
1620 extern int vmem_remove_mapping(unsigned long start
, unsigned long size
);
1621 extern int s390_enable_sie(void);
1622 extern int s390_enable_skey(void);
1623 extern void s390_reset_cmma(struct mm_struct
*mm
);
1625 /* s390 has a private copy of get unmapped area to deal with cache synonyms */
1626 #define HAVE_ARCH_UNMAPPED_AREA
1627 #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
1630 * No page table caches to initialise
1632 static inline void pgtable_cache_init(void) { }
1633 static inline void check_pgt_cache(void) { }
1635 #include <asm-generic/pgtable.h>
1637 #endif /* _S390_PAGE_H */