arch/s390/include/asm/processor.h

   1 /*
   2  *  S390 version
   3  *    Copyright IBM Corp. 1999
   4  *    Author(s): Hartmut Penner (hp@de.ibm.com),
   5  *               Martin Schwidefsky (schwidefsky@de.ibm.com)
   6  *
   7  *  Derived from "include/asm-i386/processor.h"
   8  *    Copyright (C) 1994, Linus Torvalds
   9  */
  10
  11 #ifndef __ASM_S390_PROCESSOR_H
  12 #define __ASM_S390_PROCESSOR_H
  13
  14 #include <linux/const.h>
  15
  16 #define CIF_MCCK_PENDING        0       /* machine check handling is pending */
  17 #define CIF_ASCE                1       /* user asce needs fixup / uaccess */
  18 #define CIF_NOHZ_DELAY          2       /* delay HZ disable for a tick */
  19 #define CIF_FPU                 3       /* restore FPU registers */
  20 #define CIF_IGNORE_IRQ          4       /* ignore interrupt (for udelay) */
  21 #define CIF_ENABLED_WAIT        5       /* in enabled wait state */
  22
  23 #define _CIF_MCCK_PENDING       _BITUL(CIF_MCCK_PENDING)
  24 #define _CIF_ASCE               _BITUL(CIF_ASCE)
  25 #define _CIF_NOHZ_DELAY         _BITUL(CIF_NOHZ_DELAY)
  26 #define _CIF_FPU                _BITUL(CIF_FPU)
  27 #define _CIF_IGNORE_IRQ         _BITUL(CIF_IGNORE_IRQ)
  28 #define _CIF_ENABLED_WAIT       _BITUL(CIF_ENABLED_WAIT)
  29
  30 #ifndef __ASSEMBLY__
  31
  32 #include <linux/linkage.h>
  33 #include <linux/irqflags.h>
  34 #include <asm/cpu.h>
  35 #include <asm/page.h>
  36 #include <asm/ptrace.h>
  37 #include <asm/setup.h>
  38 #include <asm/runtime_instr.h>
  39 #include <asm/fpu/types.h>
  40 #include <asm/fpu/internal.h>
  41
  42 static inline void set_cpu_flag(int flag)
  43 {
  44         S390_lowcore.cpu_flags |= (1UL << flag);
  45 }
  46
  47 static inline void clear_cpu_flag(int flag)
  48 {
  49         S390_lowcore.cpu_flags &= ~(1UL << flag);
  50 }
  51
  52 static inline int test_cpu_flag(int flag)
  53 {
  54         return !!(S390_lowcore.cpu_flags & (1UL << flag));
  55 }
  56
  57 /*
  58  * Test CIF flag of another CPU. The caller needs to ensure that
  59  * CPU hotplug can not happen, e.g. by disabling preemption.
  60  */
  61 static inline int test_cpu_flag_of(int flag, int cpu)
  62 {
  63         struct lowcore *lc = lowcore_ptr[cpu];
  64         return !!(lc->cpu_flags & (1UL << flag));
  65 }
  66
  67 #define arch_needs_cpu() test_cpu_flag(CIF_NOHZ_DELAY)
  68
  69 /*
  70  * Default implementation of macro that returns current
  71  * instruction pointer ("program counter").
  72  */
  73 #define current_text_addr() ({ void *pc; asm("basr %0,0" : "=a" (pc)); pc; })
  74
  75 static inline void get_cpu_id(struct cpuid *ptr)
  76 {
  77         asm volatile("stidp %0" : "=Q" (*ptr));
  78 }
  79
  80 extern void s390_adjust_jiffies(void);
  81 extern const struct seq_operations cpuinfo_op;
  82 extern int sysctl_ieee_emulation_warnings;
  83 extern void execve_tail(void);
  84
  85 /*
  86  * User space process size: 2GB for 31 bit, 4TB or 8PT for 64 bit.
  87  */
  88
  89 #define TASK_SIZE_OF(tsk)       ((tsk)->mm->context.asce_limit)
  90 #define TASK_UNMAPPED_BASE      (test_thread_flag(TIF_31BIT) ? \
  91                                         (1UL << 30) : (1UL << 41))
  92 #define TASK_SIZE               TASK_SIZE_OF(current)
  93 #define TASK_MAX_SIZE           (1UL << 53)
  94
  95 #define STACK_TOP               (1UL << (test_thread_flag(TIF_31BIT) ? 31:42))
  96 #define STACK_TOP_MAX           (1UL << 42)
  97
  98 #define HAVE_ARCH_PICK_MMAP_LAYOUT
  99
 100 typedef struct {
 101         __u32 ar4;
 102 } mm_segment_t;
 103
 104 /*
 105  * Thread structure
 106  */
 107 struct thread_struct {
 108         unsigned int  acrs[NUM_ACRS];
 109         unsigned long ksp;              /* kernel stack pointer             */
 110         mm_segment_t mm_segment;
 111         unsigned long gmap_addr;        /* address of last gmap fault. */
 112         unsigned int gmap_write_flag;   /* gmap fault write indication */
 113         unsigned int gmap_pfault;       /* signal of a pending guest pfault */
 114         struct per_regs per_user;       /* User specified PER registers */
 115         struct per_event per_event;     /* Cause of the last PER trap */
 116         unsigned long per_flags;        /* Flags to control debug behavior */
 117         /* pfault_wait is used to block the process on a pfault event */
 118         unsigned long pfault_wait;
 119         struct list_head list;
 120         /* cpu runtime instrumentation */
 121         struct runtime_instr_cb *ri_cb;
 122         unsigned char trap_tdb[256];    /* Transaction abort diagnose block */
 123         /*
 124          * Warning: 'fpu' is dynamically-sized. It *MUST* be at
 125          * the end.
 126          */
 127         struct fpu fpu;                 /* FP and VX register save area */
 128 };
 129
 130 /* Flag to disable transactions. */
 131 #define PER_FLAG_NO_TE                  1UL
 132 /* Flag to enable random transaction aborts. */
 133 #define PER_FLAG_TE_ABORT_RAND          2UL
 134 /* Flag to specify random transaction abort mode:
 135  * - abort each transaction at a random instruction before TEND if set.
 136  * - abort random transactions at a random instruction if cleared.
 137  */
 138 #define PER_FLAG_TE_ABORT_RAND_TEND     4UL
 139
 140 typedef struct thread_struct thread_struct;
 141
 142 /*
 143  * Stack layout of a C stack frame.
 144  */
 145 #ifndef __PACK_STACK
 146 struct stack_frame {
 147         unsigned long back_chain;
 148         unsigned long empty1[5];
 149         unsigned long gprs[10];
 150         unsigned int  empty2[8];
 151 };
 152 #else
 153 struct stack_frame {
 154         unsigned long empty1[5];
 155         unsigned int  empty2[8];
 156         unsigned long gprs[10];
 157         unsigned long back_chain;
 158 };
 159 #endif
 160
 161 #define ARCH_MIN_TASKALIGN      8
 162
 163 #define INIT_THREAD {                                                   \
 164         .ksp = sizeof(init_stack) + (unsigned long) &init_stack,        \
 165         .fpu.regs = (void *) init_task.thread.fpu.fprs,                 \
 166 }
 167
 168 /*
 169  * Do necessary setup to start up a new thread.
 170  */
 171 #define start_thread(regs, new_psw, new_stackp) do {                    \
 172         regs->psw.mask  = PSW_USER_BITS | PSW_MASK_EA | PSW_MASK_BA;    \
 173         regs->psw.addr  = new_psw;                                      \
 174         regs->gprs[15]  = new_stackp;                                   \
 175         execve_tail();                                                  \
 176 } while (0)
 177
 178 #define start_thread31(regs, new_psw, new_stackp) do {                  \
 179         regs->psw.mask  = PSW_USER_BITS | PSW_MASK_BA;                  \
 180         regs->psw.addr  = new_psw;                                      \
 181         regs->gprs[15]  = new_stackp;                                   \
 182         crst_table_downgrade(current->mm);                              \
 183         execve_tail();                                                  \
 184 } while (0)
 185
 186 /* Forward declaration, a strange C thing */
 187 struct task_struct;
 188 struct mm_struct;
 189 struct seq_file;
 190
 191 typedef int (*dump_trace_func_t)(void *data, unsigned long address);
 192 void dump_trace(dump_trace_func_t func, void *data,
 193                 struct task_struct *task, unsigned long sp);
 194
 195 void show_cacheinfo(struct seq_file *m);
 196
 197 /* Free all resources held by a thread. */
 198 extern void release_thread(struct task_struct *);
 199
 200 /*
 201  * Return saved PC of a blocked thread.
 202  */
 203 extern unsigned long thread_saved_pc(struct task_struct *t);
 204
 205 unsigned long get_wchan(struct task_struct *p);
 206 #define task_pt_regs(tsk) ((struct pt_regs *) \
 207         (task_stack_page(tsk) + THREAD_SIZE) - 1)
 208 #define KSTK_EIP(tsk)   (task_pt_regs(tsk)->psw.addr)
 209 #define KSTK_ESP(tsk)   (task_pt_regs(tsk)->gprs[15])
 210
 211 /* Has task runtime instrumentation enabled ? */
 212 #define is_ri_task(tsk) (!!(tsk)->thread.ri_cb)
 213
 214 static inline unsigned long current_stack_pointer(void)
 215 {
 216         unsigned long sp;
 217
 218         asm volatile("la %0,0(15)" : "=a" (sp));
 219         return sp;
 220 }
 221
 222 static inline unsigned short stap(void)
 223 {
 224         unsigned short cpu_address;
 225
 226         asm volatile("stap %0" : "=m" (cpu_address));
 227         return cpu_address;
 228 }
 229
 230 /*
 231  * Give up the time slice of the virtual PU.
 232  */
 233 void cpu_relax(void);
 234
 235 #define cpu_relax_lowlatency()  barrier()
 236
 237 static inline void psw_set_key(unsigned int key)
 238 {
 239         asm volatile("spka 0(%0)" : : "d" (key));
 240 }
 241
 242 /*
 243  * Set PSW to specified value.
 244  */
 245 static inline void __load_psw(psw_t psw)
 246 {
 247         asm volatile("lpswe %0" : : "Q" (psw) : "cc");
 248 }
 249
 250 /*
 251  * Set PSW mask to specified value, while leaving the
 252  * PSW addr pointing to the next instruction.
 253  */
 254 static inline void __load_psw_mask(unsigned long mask)
 255 {
 256         unsigned long addr;
 257         psw_t psw;
 258
 259         psw.mask = mask;
 260
 261         asm volatile(
 262                 "       larl    %0,1f\n"
 263                 "       stg     %0,%O1+8(%R1)\n"
 264                 "       lpswe   %1\n"
 265                 "1:"
 266                 : "=&d" (addr), "=Q" (psw) : "Q" (psw) : "memory", "cc");
 267 }
 268
 269 /*
 270  * Extract current PSW mask
 271  */
 272 static inline unsigned long __extract_psw(void)
 273 {
 274         unsigned int reg1, reg2;
 275
 276         asm volatile("epsw %0,%1" : "=d" (reg1), "=a" (reg2));
 277         return (((unsigned long) reg1) << 32) | ((unsigned long) reg2);
 278 }
 279
 280 static inline void local_mcck_enable(void)
 281 {
 282         __load_psw_mask(__extract_psw() | PSW_MASK_MCHECK);
 283 }
 284
 285 static inline void local_mcck_disable(void)
 286 {
 287         __load_psw_mask(__extract_psw() & ~PSW_MASK_MCHECK);
 288 }
 289
 290 /*
 291  * Rewind PSW instruction address by specified number of bytes.
 292  */
 293 static inline unsigned long __rewind_psw(psw_t psw, unsigned long ilc)
 294 {
 295         unsigned long mask;
 296
 297         mask = (psw.mask & PSW_MASK_EA) ? -1UL :
 298                (psw.mask & PSW_MASK_BA) ? (1UL << 31) - 1 :
 299                                           (1UL << 24) - 1;
 300         return (psw.addr - ilc) & mask;
 301 }
 302
 303 /*
 304  * Function to stop a processor until the next interrupt occurs
 305  */
 306 void enabled_wait(void);
 307
 308 /*
 309  * Function to drop a processor into disabled wait state
 310  */
 311 static inline void __noreturn disabled_wait(unsigned long code)
 312 {
 313         psw_t psw;
 314
 315         psw.mask = PSW_MASK_BASE | PSW_MASK_WAIT | PSW_MASK_BA | PSW_MASK_EA;
 316         psw.addr = code;
 317         __load_psw(psw);
 318         while (1);
 319 }
 320
 321 /*
 322  * Basic Machine Check/Program Check Handler.
 323  */
 324
 325 extern void s390_base_mcck_handler(void);
 326 extern void s390_base_pgm_handler(void);
 327 extern void s390_base_ext_handler(void);
 328
 329 extern void (*s390_base_mcck_handler_fn)(void);
 330 extern void (*s390_base_pgm_handler_fn)(void);
 331 extern void (*s390_base_ext_handler_fn)(void);
 332
 333 #define ARCH_LOW_ADDRESS_LIMIT  0x7fffffffUL
 334
 335 extern int memcpy_real(void *, void *, size_t);
 336 extern void memcpy_absolute(void *, void *, size_t);
 337
 338 #define mem_assign_absolute(dest, val) {                        \
 339         __typeof__(dest) __tmp = (val);                         \
 340                                                                 \
 341         BUILD_BUG_ON(sizeof(__tmp) != sizeof(val));             \
 342         memcpy_absolute(&(dest), &__tmp, sizeof(__tmp));        \
 343 }
 344
 345 #endif /* __ASSEMBLY__ */
 346
 347 #endif /* __ASM_S390_PROCESSOR_H */