arch/s390/include/asm/processor.h

   1 /*
   2  *  include/asm-s390/processor.h
   3  *
   4  *  S390 version
   5  *    Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
   6  *    Author(s): Hartmut Penner (hp@de.ibm.com),
   7  *               Martin Schwidefsky (schwidefsky@de.ibm.com)
   8  *
   9  *  Derived from "include/asm-i386/processor.h"
  10  *    Copyright (C) 1994, Linus Torvalds
  11  */
  12
  13 #ifndef __ASM_S390_PROCESSOR_H
  14 #define __ASM_S390_PROCESSOR_H
  15
  16 #include <linux/linkage.h>
  17 #include <linux/irqflags.h>
  18 #include <asm/cpu.h>
  19 #include <asm/page.h>
  20 #include <asm/ptrace.h>
  21 #include <asm/setup.h>
  22
  23 #ifdef __KERNEL__
  24 /*
  25  * Default implementation of macro that returns current
  26  * instruction pointer ("program counter").
  27  */
  28 #define current_text_addr() ({ void *pc; asm("basr %0,0" : "=a" (pc)); pc; })
  29
  30 static inline void get_cpu_id(struct cpuid *ptr)
  31 {
  32         asm volatile("stidp %0" : "=Q" (*ptr));
  33 }
  34
  35 extern void s390_adjust_jiffies(void);
  36 extern int get_cpu_capability(unsigned int *);
  37 extern const struct seq_operations cpuinfo_op;
  38 extern int sysctl_ieee_emulation_warnings;
  39
  40 /*
  41  * User space process size: 2GB for 31 bit, 4TB or 8PT for 64 bit.
  42  */
  43 #ifndef __s390x__
  44
  45 #define TASK_SIZE               (1UL << 31)
  46 #define TASK_UNMAPPED_BASE      (1UL << 30)
  47
  48 #else /* __s390x__ */
  49
  50 #define TASK_SIZE_OF(tsk)       ((tsk)->mm->context.asce_limit)
  51 #define TASK_UNMAPPED_BASE      (test_thread_flag(TIF_31BIT) ? \
  52                                         (1UL << 30) : (1UL << 41))
  53 #define TASK_SIZE               TASK_SIZE_OF(current)
  54
  55 #endif /* __s390x__ */
  56
  57 #ifdef __KERNEL__
  58
  59 #ifndef __s390x__
  60 #define STACK_TOP               (1UL << 31)
  61 #define STACK_TOP_MAX           (1UL << 31)
  62 #else /* __s390x__ */
  63 #define STACK_TOP               (1UL << (test_thread_flag(TIF_31BIT) ? 31:42))
  64 #define STACK_TOP_MAX           (1UL << 42)
  65 #endif /* __s390x__ */
  66
  67
  68 #endif
  69
  70 #define HAVE_ARCH_PICK_MMAP_LAYOUT
  71
  72 typedef struct {
  73         __u32 ar4;
  74 } mm_segment_t;
  75
  76 /*
  77  * Thread structure
  78  */
  79 struct thread_struct {
  80         s390_fp_regs fp_regs;
  81         unsigned int  acrs[NUM_ACRS];
  82         unsigned long ksp;              /* kernel stack pointer             */
  83         mm_segment_t mm_segment;
  84         unsigned long gmap_addr;        /* address of last gmap fault. */
  85         struct per_regs per_user;       /* User specified PER registers */
  86         struct per_event per_event;     /* Cause of the last PER trap */
  87         /* pfault_wait is used to block the process on a pfault event */
  88         unsigned long pfault_wait;
  89         struct list_head list;
  90 };
  91
  92 typedef struct thread_struct thread_struct;
  93
  94 /*
  95  * Stack layout of a C stack frame.
  96  */
  97 #ifndef __PACK_STACK
  98 struct stack_frame {
  99         unsigned long back_chain;
 100         unsigned long empty1[5];
 101         unsigned long gprs[10];
 102         unsigned int  empty2[8];
 103 };
 104 #else
 105 struct stack_frame {
 106         unsigned long empty1[5];
 107         unsigned int  empty2[8];
 108         unsigned long gprs[10];
 109         unsigned long back_chain;
 110 };
 111 #endif
 112
 113 #define ARCH_MIN_TASKALIGN      8
 114
 115 #define INIT_THREAD {                                                   \
 116         .ksp = sizeof(init_stack) + (unsigned long) &init_stack,        \
 117 }
 118
 119 /*
 120  * Do necessary setup to start up a new thread.
 121  */
 122 #define start_thread(regs, new_psw, new_stackp) do {                    \
 123         regs->psw.mask  = psw_user_bits | PSW_MASK_EA | PSW_MASK_BA;    \
 124         regs->psw.addr  = new_psw | PSW_ADDR_AMODE;                     \
 125         regs->gprs[15]  = new_stackp;                                   \
 126 } while (0)
 127
 128 #define start_thread31(regs, new_psw, new_stackp) do {                  \
 129         regs->psw.mask  = psw_user_bits | PSW_MASK_BA;                  \
 130         regs->psw.addr  = new_psw | PSW_ADDR_AMODE;                     \
 131         regs->gprs[15]  = new_stackp;                                   \
 132         crst_table_downgrade(current->mm, 1UL << 31);                   \
 133 } while (0)
 134
 135 /* Forward declaration, a strange C thing */
 136 struct task_struct;
 137 struct mm_struct;
 138 struct seq_file;
 139
 140 /* Free all resources held by a thread. */
 141 extern void release_thread(struct task_struct *);
 142 extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
 143
 144 /* Prepare to copy thread state - unlazy all lazy status */
 145 #define prepare_to_copy(tsk)    do { } while (0)
 146
 147 /*
 148  * Return saved PC of a blocked thread.
 149  */
 150 extern unsigned long thread_saved_pc(struct task_struct *t);
 151
 152 extern void show_code(struct pt_regs *regs);
 153
 154 unsigned long get_wchan(struct task_struct *p);
 155 #define task_pt_regs(tsk) ((struct pt_regs *) \
 156         (task_stack_page(tsk) + THREAD_SIZE) - 1)
 157 #define KSTK_EIP(tsk)   (task_pt_regs(tsk)->psw.addr)
 158 #define KSTK_ESP(tsk)   (task_pt_regs(tsk)->gprs[15])
 159
 160 static inline unsigned short stap(void)
 161 {
 162         unsigned short cpu_address;
 163
 164         asm volatile("stap %0" : "=m" (cpu_address));
 165         return cpu_address;
 166 }
 167
 168 /*
 169  * Give up the time slice of the virtual PU.
 170  */
 171 static inline void cpu_relax(void)
 172 {
 173         if (MACHINE_HAS_DIAG44)
 174                 asm volatile("diag 0,0,68");
 175         barrier();
 176 }
 177
 178 static inline void psw_set_key(unsigned int key)
 179 {
 180         asm volatile("spka 0(%0)" : : "d" (key));
 181 }
 182
 183 /*
 184  * Set PSW to specified value.
 185  */
 186 static inline void __load_psw(psw_t psw)
 187 {
 188 #ifndef __s390x__
 189         asm volatile("lpsw  %0" : : "Q" (psw) : "cc");
 190 #else
 191         asm volatile("lpswe %0" : : "Q" (psw) : "cc");
 192 #endif
 193 }
 194
 195 /*
 196  * Set PSW mask to specified value, while leaving the
 197  * PSW addr pointing to the next instruction.
 198  */
 199 static inline void __load_psw_mask (unsigned long mask)
 200 {
 201         unsigned long addr;
 202         psw_t psw;
 203
 204         psw.mask = mask;
 205
 206 #ifndef __s390x__
 207         asm volatile(
 208                 "       basr    %0,0\n"
 209                 "0:     ahi     %0,1f-0b\n"
 210                 "       st      %0,%O1+4(%R1)\n"
 211                 "       lpsw    %1\n"
 212                 "1:"
 213                 : "=&d" (addr), "=Q" (psw) : "Q" (psw) : "memory", "cc");
 214 #else /* __s390x__ */
 215         asm volatile(
 216                 "       larl    %0,1f\n"
 217                 "       stg     %0,%O1+8(%R1)\n"
 218                 "       lpswe   %1\n"
 219                 "1:"
 220                 : "=&d" (addr), "=Q" (psw) : "Q" (psw) : "memory", "cc");
 221 #endif /* __s390x__ */
 222 }
 223
 224 /*
 225  * Rewind PSW instruction address by specified number of bytes.
 226  */
 227 static inline unsigned long __rewind_psw(psw_t psw, unsigned long ilc)
 228 {
 229 #ifndef __s390x__
 230         if (psw.addr & PSW_ADDR_AMODE)
 231                 /* 31 bit mode */
 232                 return (psw.addr - ilc) | PSW_ADDR_AMODE;
 233         /* 24 bit mode */
 234         return (psw.addr - ilc) & ((1UL << 24) - 1);
 235 #else
 236         unsigned long mask;
 237
 238         mask = (psw.mask & PSW_MASK_EA) ? -1UL :
 239                (psw.mask & PSW_MASK_BA) ? (1UL << 31) - 1 :
 240                                           (1UL << 24) - 1;
 241         return (psw.addr - ilc) & mask;
 242 #endif
 243 }
 244
 245 /*
 246  * Function to drop a processor into disabled wait state
 247  */
 248 static inline void __noreturn disabled_wait(unsigned long code)
 249 {
 250         unsigned long ctl_buf;
 251         psw_t dw_psw;
 252
 253         dw_psw.mask = PSW_MASK_BASE | PSW_MASK_WAIT | PSW_MASK_BA | PSW_MASK_EA;
 254         dw_psw.addr = code;
 255         /*
 256          * Store status and then load disabled wait psw,
 257          * the processor is dead afterwards
 258          */
 259 #ifndef __s390x__
 260         asm volatile(
 261                 "       stctl   0,0,0(%2)\n"
 262                 "       ni      0(%2),0xef\n"   /* switch off protection */
 263                 "       lctl    0,0,0(%2)\n"
 264                 "       stpt    0xd8\n"         /* store timer */
 265                 "       stckc   0xe0\n"         /* store clock comparator */
 266                 "       stpx    0x108\n"        /* store prefix register */
 267                 "       stam    0,15,0x120\n"   /* store access registers */
 268                 "       std     0,0x160\n"      /* store f0 */
 269                 "       std     2,0x168\n"      /* store f2 */
 270                 "       std     4,0x170\n"      /* store f4 */
 271                 "       std     6,0x178\n"      /* store f6 */
 272                 "       stm     0,15,0x180\n"   /* store general registers */
 273                 "       stctl   0,15,0x1c0\n"   /* store control registers */
 274                 "       oi      0x1c0,0x10\n"   /* fake protection bit */
 275                 "       lpsw    0(%1)"
 276                 : "=m" (ctl_buf)
 277                 : "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc");
 278 #else /* __s390x__ */
 279         asm volatile(
 280                 "       stctg   0,0,0(%2)\n"
 281                 "       ni      4(%2),0xef\n"   /* switch off protection */
 282                 "       lctlg   0,0,0(%2)\n"
 283                 "       lghi    1,0x1000\n"
 284                 "       stpt    0x328(1)\n"     /* store timer */
 285                 "       stckc   0x330(1)\n"     /* store clock comparator */
 286                 "       stpx    0x318(1)\n"     /* store prefix register */
 287                 "       stam    0,15,0x340(1)\n"/* store access registers */
 288                 "       stfpc   0x31c(1)\n"     /* store fpu control */
 289                 "       std     0,0x200(1)\n"   /* store f0 */
 290                 "       std     1,0x208(1)\n"   /* store f1 */
 291                 "       std     2,0x210(1)\n"   /* store f2 */
 292                 "       std     3,0x218(1)\n"   /* store f3 */
 293                 "       std     4,0x220(1)\n"   /* store f4 */
 294                 "       std     5,0x228(1)\n"   /* store f5 */
 295                 "       std     6,0x230(1)\n"   /* store f6 */
 296                 "       std     7,0x238(1)\n"   /* store f7 */
 297                 "       std     8,0x240(1)\n"   /* store f8 */
 298                 "       std     9,0x248(1)\n"   /* store f9 */
 299                 "       std     10,0x250(1)\n"  /* store f10 */
 300                 "       std     11,0x258(1)\n"  /* store f11 */
 301                 "       std     12,0x260(1)\n"  /* store f12 */
 302                 "       std     13,0x268(1)\n"  /* store f13 */
 303                 "       std     14,0x270(1)\n"  /* store f14 */
 304                 "       std     15,0x278(1)\n"  /* store f15 */
 305                 "       stmg    0,15,0x280(1)\n"/* store general registers */
 306                 "       stctg   0,15,0x380(1)\n"/* store control registers */
 307                 "       oi      0x384(1),0x10\n"/* fake protection bit */
 308                 "       lpswe   0(%1)"
 309                 : "=m" (ctl_buf)
 310                 : "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc", "0", "1");
 311 #endif /* __s390x__ */
 312         while (1);
 313 }
 314
 315 /*
 316  * Use to set psw mask except for the first byte which
 317  * won't be changed by this function.
 318  */
 319 static inline void
 320 __set_psw_mask(unsigned long mask)
 321 {
 322         __load_psw_mask(mask | (arch_local_save_flags() & ~(-1UL >> 8)));
 323 }
 324
 325 #define local_mcck_enable() \
 326         __set_psw_mask(psw_kernel_bits | PSW_MASK_DAT | PSW_MASK_MCHECK)
 327 #define local_mcck_disable() \
 328         __set_psw_mask(psw_kernel_bits | PSW_MASK_DAT)
 329
 330 /*
 331  * Basic Machine Check/Program Check Handler.
 332  */
 333
 334 extern void s390_base_mcck_handler(void);
 335 extern void s390_base_pgm_handler(void);
 336 extern void s390_base_ext_handler(void);
 337
 338 extern void (*s390_base_mcck_handler_fn)(void);
 339 extern void (*s390_base_pgm_handler_fn)(void);
 340 extern void (*s390_base_ext_handler_fn)(void);
 341
 342 #define ARCH_LOW_ADDRESS_LIMIT  0x7fffffffUL
 343
 344 #endif
 345
 346 /*
 347  * Helper macro for exception table entries
 348  */
 349 #ifndef __s390x__
 350 #define EX_TABLE(_fault,_target)                        \
 351         ".section __ex_table,\"a\"\n"                   \
 352         "       .align 4\n"                             \
 353         "       .long  " #_fault "," #_target "\n"      \
 354         ".previous\n"
 355 #else
 356 #define EX_TABLE(_fault,_target)                        \
 357         ".section __ex_table,\"a\"\n"                   \
 358         "       .align 8\n"                             \
 359         "       .quad  " #_fault "," #_target "\n"      \
 360         ".previous\n"
 361 #endif
 362
 363 #endif                                 /* __ASM_S390_PROCESSOR_H           */