1 /* SPDX-License-Identifier: GPL-2.0 */
3 * S390 low-level entry points.
5 * Copyright IBM Corp. 1999, 2012
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 * Hartmut Penner (hp@de.ibm.com),
8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
9 * Heiko Carstens <heiko.carstens@de.ibm.com>
12 #include <linux/init.h>
13 #include <linux/linkage.h>
14 #include <asm/alternative-asm.h>
15 #include <asm/processor.h>
16 #include <asm/cache.h>
17 #include <asm/ctl_reg.h>
18 #include <asm/dwarf.h>
19 #include <asm/errno.h>
20 #include <asm/ptrace.h>
21 #include <asm/thread_info.h>
22 #include <asm/asm-offsets.h>
23 #include <asm/unistd.h>
27 #include <asm/vx-insn.h>
28 #include <asm/setup.h>
30 #include <asm/export.h>
31 #include <asm/nospec-insn.h>
34 __PT_R1 = __PT_GPRS + 8
35 __PT_R2 = __PT_GPRS + 16
36 __PT_R3 = __PT_GPRS + 24
37 __PT_R4 = __PT_GPRS + 32
38 __PT_R5 = __PT_GPRS + 40
39 __PT_R6 = __PT_GPRS + 48
40 __PT_R7 = __PT_GPRS + 56
41 __PT_R8 = __PT_GPRS + 64
42 __PT_R9 = __PT_GPRS + 72
43 __PT_R10 = __PT_GPRS + 80
44 __PT_R11 = __PT_GPRS + 88
45 __PT_R12 = __PT_GPRS + 96
46 __PT_R13 = __PT_GPRS + 104
47 __PT_R14 = __PT_GPRS + 112
48 __PT_R15 = __PT_GPRS + 120
50 STACK_SHIFT = PAGE_SHIFT + THREAD_SIZE_ORDER
51 STACK_SIZE = 1 << STACK_SHIFT
52 STACK_INIT = STACK_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE
54 _TIF_WORK = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
55 _TIF_UPROBE | _TIF_GUARDED_STORAGE | _TIF_PATCH_PENDING | \
57 _TIF_TRACE = (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | _TIF_SECCOMP | \
58 _TIF_SYSCALL_TRACEPOINT)
59 _CIF_WORK = (_CIF_ASCE_PRIMARY | _CIF_ASCE_SECONDARY | _CIF_FPU)
60 _PIF_WORK = (_PIF_PER_TRAP | _PIF_SYSCALL_RESTART)
62 _LPP_OFFSET = __LC_LPP
65 #ifdef CONFIG_TRACE_IRQFLAGS
67 brasl %r14,trace_hardirqs_on_caller
72 #ifdef CONFIG_TRACE_IRQFLAGS
74 brasl %r14,trace_hardirqs_off_caller
78 .macro LOCKDEP_SYS_EXIT
80 tm __PT_PSW+1(%r11),0x01 # returning to user ?
82 brasl %r14,lockdep_sys_exit
86 .macro CHECK_STACK savearea
87 #ifdef CONFIG_CHECK_STACK
88 tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
94 .macro CHECK_VMAP_STACK savearea,oklabel
95 #ifdef CONFIG_VMAP_STACK
97 nill %r14,0x10000 - STACK_SIZE
99 clg %r14,__LC_KERNEL_STACK
101 clg %r14,__LC_ASYNC_STACK
103 clg %r14,__LC_NODAT_STACK
105 clg %r14,__LC_RESTART_STACK
114 .macro SWITCH_ASYNC savearea,timer
115 tmhh %r8,0x0001 # interrupting from user ?
117 #if IS_ENABLED(CONFIG_KVM)
121 lghi %r13,.Lsie_done - .Lsie_gmap
124 lghi %r11,\savearea # inside critical section, do cleanup
125 brasl %r14,.Lcleanup_sie
127 0: larl %r13,.Lpsw_idle_exit
131 mvc __CLOCK_IDLE_EXIT(8,%r2), __LC_INT_CLOCK
132 mvc __TIMER_IDLE_EXIT(8,%r2), __LC_ASYNC_ENTER_TIMER
133 # account system time going idle
134 ni __LC_CPU_FLAGS+7,255-_CIF_ENABLED_WAIT
136 lg %r13,__LC_STEAL_TIMER
137 alg %r13,__CLOCK_IDLE_ENTER(%r2)
138 slg %r13,__LC_LAST_UPDATE_CLOCK
139 stg %r13,__LC_STEAL_TIMER
141 mvc __LC_LAST_UPDATE_CLOCK(8),__CLOCK_IDLE_EXIT(%r2)
143 lg %r13,__LC_SYSTEM_TIMER
144 alg %r13,__LC_LAST_UPDATE_TIMER
145 slg %r13,__TIMER_IDLE_ENTER(%r2)
146 stg %r13,__LC_SYSTEM_TIMER
147 mvc __LC_LAST_UPDATE_TIMER(8),__TIMER_IDLE_EXIT(%r2)
149 nihh %r8,0xfcfd # clear wait state and irq bits
150 1: lg %r14,__LC_ASYNC_STACK # are we already on the target stack?
152 srag %r14,%r14,STACK_SHIFT
154 CHECK_STACK \savearea
155 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
157 2: UPDATE_VTIME %r14,%r15,\timer
158 BPENTER __TI_flags(%r12),_TIF_ISOLATE_BP
159 3: lg %r15,__LC_ASYNC_STACK # load async stack
160 4: la %r11,STACK_FRAME_OVERHEAD(%r15)
163 .macro UPDATE_VTIME w1,w2,enter_timer
164 lg \w1,__LC_EXIT_TIMER
165 lg \w2,__LC_LAST_UPDATE_TIMER
167 slg \w2,__LC_EXIT_TIMER
168 alg \w1,__LC_USER_TIMER
169 alg \w2,__LC_SYSTEM_TIMER
170 stg \w1,__LC_USER_TIMER
171 stg \w2,__LC_SYSTEM_TIMER
172 mvc __LC_LAST_UPDATE_TIMER(8),\enter_timer
175 .macro RESTORE_SM_CLEAR_PER
176 stg %r8,__LC_RETURN_PSW
177 ni __LC_RETURN_PSW,0xbf
182 stosm __SF_EMPTY(%r15),3
185 .macro ENABLE_INTS_TRACE
191 stnsm __SF_EMPTY(%r15),0xfc
194 .macro DISABLE_INTS_TRACE
200 #ifdef CONFIG_HAVE_MARCH_Z9_109_FEATURES
201 .insn s,0xb27c0000,\savearea # store clock fast
203 .insn s,0xb2050000,\savearea # store clock
208 * The TSTMSK macro generates a test-under-mask instruction by
209 * calculating the memory offset for the specified mask value.
210 * Mask value can be any constant. The macro shifts the mask
211 * value to calculate the memory offset for the test-under-mask
214 .macro TSTMSK addr, mask, size=8, bytepos=0
215 .if (\bytepos < \size) && (\mask >> 8)
217 .error "Mask exceeds byte boundary"
219 TSTMSK \addr, "(\mask >> 8)", \size, "(\bytepos + 1)"
223 .error "Mask must not be zero"
225 off = \size - \bytepos - 1
230 ALTERNATIVE "", ".long 0xb2e8c000", 82
234 ALTERNATIVE "", ".long 0xb2e8d000", 82
237 .macro BPENTER tif_ptr,tif_mask
238 ALTERNATIVE "TSTMSK \tif_ptr,\tif_mask; jz .+8; .long 0xb2e8d000", \
242 .macro BPEXIT tif_ptr,tif_mask
243 TSTMSK \tif_ptr,\tif_mask
244 ALTERNATIVE "jz .+8; .long 0xb2e8c000", \
245 "jnz .+8; .long 0xb2e8d000", 82
250 GEN_BR_THUNK %r14,%r11
252 .section .kprobes.text, "ax"
255 * This nop exists only in order to avoid that __switch_to starts at
256 * the beginning of the kprobes text section. In that case we would
257 * have several symbols at the same address. E.g. objdump would take
258 * an arbitrary symbol name when disassembling this code.
259 * With the added nop in between the __switch_to symbol is unique
271 * Scheduler resume function, called by switch_to
272 * gpr2 = (task_struct *) prev
273 * gpr3 = (task_struct *) next
278 stmg %r6,%r15,__SF_GPRS(%r15) # store gprs of prev task
279 lghi %r4,__TASK_stack
280 lghi %r1,__TASK_thread
282 stg %r15,__THREAD_ksp(%r1,%r2) # store kernel stack of prev
283 lg %r15,0(%r4,%r3) # start of kernel stack of next
284 agr %r15,%r5 # end of kernel stack of next
285 stg %r3,__LC_CURRENT # store task struct of next
286 stg %r15,__LC_KERNEL_STACK # store end of kernel stack
287 lg %r15,__THREAD_ksp(%r1,%r3) # load kernel stack of next
289 mvc __LC_CURRENT_PID(4,%r0),0(%r3) # store pid of next
290 lmg %r6,%r15,__SF_GPRS(%r15) # load gprs of next task
291 ALTERNATIVE "", ".insn s,0xb2800000,_LPP_OFFSET", 40
295 #if IS_ENABLED(CONFIG_KVM)
297 * sie64a calling convention:
298 * %r2 pointer to sie control block
299 * %r3 guest register save area
302 stmg %r6,%r14,__SF_GPRS(%r15) # save kernel registers
304 stg %r2,__SF_SIE_CONTROL(%r15) # save control block pointer
305 stg %r3,__SF_SIE_SAVEAREA(%r15) # save guest register save area
306 xc __SF_SIE_REASON(8,%r15),__SF_SIE_REASON(%r15) # reason code = 0
307 mvc __SF_SIE_FLAGS(8,%r15),__TI_flags(%r12) # copy thread flags
308 TSTMSK __LC_CPU_FLAGS,_CIF_FPU # load guest fp/vx registers ?
309 jno .Lsie_load_guest_gprs
310 brasl %r14,load_fpu_regs # load guest fp/vx regs
311 .Lsie_load_guest_gprs:
312 lmg %r0,%r13,0(%r3) # load guest gprs 0-13
313 lg %r14,__LC_GMAP # get gmap pointer
316 lctlg %c1,%c1,__GMAP_ASCE(%r14) # load primary asce
318 lg %r14,__SF_SIE_CONTROL(%r15) # get control block pointer
319 oi __SIE_PROG0C+3(%r14),1 # we are going into SIE now
320 tm __SIE_PROG20+3(%r14),3 # last exit...
322 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
323 jo .Lsie_skip # exit if fp/vx regs changed
324 BPEXIT __SF_SIE_FLAGS(%r15),(_TIF_ISOLATE_BP|_TIF_ISOLATE_BP_GUEST)
328 BPENTER __SF_SIE_FLAGS(%r15),(_TIF_ISOLATE_BP|_TIF_ISOLATE_BP_GUEST)
330 ni __SIE_PROG0C+3(%r14),0xfe # no longer in SIE
331 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
333 # some program checks are suppressing. C code (e.g. do_protection_exception)
334 # will rewind the PSW by the ILC, which is often 4 bytes in case of SIE. There
335 # are some corner cases (e.g. runtime instrumentation) where ILC is unpredictable.
336 # Other instructions between sie64a and .Lsie_done should not cause program
337 # interrupts. So lets use 3 nops as a landing pad for all possible rewinds.
338 # See also .Lcleanup_sie
347 lg %r14,__SF_SIE_SAVEAREA(%r15) # load guest register save area
348 stmg %r0,%r13,0(%r14) # save guest gprs 0-13
349 xgr %r0,%r0 # clear guest registers to
350 xgr %r1,%r1 # prevent speculative use
355 lmg %r6,%r14,__SF_GPRS(%r15) # restore kernel registers
356 lg %r2,__SF_SIE_REASON(%r15) # return exit reason code
360 stg %r14,__SF_SIE_REASON(%r15) # set exit reason code
363 EX_TABLE(.Lrewind_pad6,.Lsie_fault)
364 EX_TABLE(.Lrewind_pad4,.Lsie_fault)
365 EX_TABLE(.Lrewind_pad2,.Lsie_fault)
366 EX_TABLE(sie_exit,.Lsie_fault)
368 EXPORT_SYMBOL(sie64a)
369 EXPORT_SYMBOL(sie_exit)
373 * SVC interrupt handler routine. System calls are synchronous events and
374 * are entered with interrupts disabled.
378 stpt __LC_SYNC_ENTER_TIMER
379 stmg %r8,%r15,__LC_SAVE_AREA_SYNC
382 lghi %r14,_PIF_SYSCALL
384 lghi %r13,__TASK_thread
385 lg %r15,__LC_KERNEL_STACK
386 la %r11,STACK_FRAME_OVERHEAD(%r15) # pointer to pt_regs
387 UPDATE_VTIME %r8,%r9,__LC_SYNC_ENTER_TIMER
388 BPENTER __TI_flags(%r12),_TIF_ISOLATE_BP
389 stmg %r0,%r7,__PT_R0(%r11)
390 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
391 mvc __PT_PSW(16,%r11),__LC_SVC_OLD_PSW
392 mvc __PT_INT_CODE(4,%r11),__LC_SVC_ILC
393 stg %r14,__PT_FLAGS(%r11)
396 # clear user controlled register to prevent speculative use
398 # load address of system call table
399 lg %r10,__THREAD_sysc_table(%r13,%r12)
400 llgh %r8,__PT_INT_CODE+2(%r11)
401 slag %r8,%r8,3 # shift and test for svc 0
403 # svc 0: system call number in %r1
404 llgfr %r1,%r1 # clear high word in r1
405 sth %r1,__PT_INT_CODE+2(%r11)
410 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
411 stg %r2,__PT_ORIG_GPR2(%r11)
412 stg %r7,STACK_FRAME_OVERHEAD(%r15)
413 lg %r9,0(%r8,%r10) # get system call add.
414 TSTMSK __TI_flags(%r12),_TIF_TRACE
416 BASR_EX %r14,%r9 # call sys_xxxx
417 stg %r2,__PT_R2(%r11) # store return value
420 #ifdef CONFIG_DEBUG_RSEQ
422 brasl %r14,rseq_syscall
426 TSTMSK __PT_FLAGS(%r11),_PIF_WORK
428 TSTMSK __TI_flags(%r12),_TIF_WORK
429 jnz .Lsysc_work # check for work
430 TSTMSK __LC_CPU_FLAGS,(_CIF_WORK-_CIF_FPU)
432 BPEXIT __TI_flags(%r12),_TIF_ISOLATE_BP
435 TSTMSK __LC_CPU_FLAGS, _CIF_FPU
437 brasl %r14,load_fpu_regs
439 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11)
441 lmg %r0,%r15,__PT_R0(%r11)
445 # One of the work bits is on. Find out which one.
448 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED
450 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL_RESTART
451 jo .Lsysc_syscall_restart
452 #ifdef CONFIG_UPROBES
453 TSTMSK __TI_flags(%r12),_TIF_UPROBE
454 jo .Lsysc_uprobe_notify
456 TSTMSK __TI_flags(%r12),_TIF_GUARDED_STORAGE
457 jo .Lsysc_guarded_storage
458 TSTMSK __PT_FLAGS(%r11),_PIF_PER_TRAP
460 #ifdef CONFIG_LIVEPATCH
461 TSTMSK __TI_flags(%r12),_TIF_PATCH_PENDING
462 jo .Lsysc_patch_pending # handle live patching just before
463 # signals and possible syscall restart
465 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL_RESTART
466 jo .Lsysc_syscall_restart
467 TSTMSK __TI_flags(%r12),(_TIF_SIGPENDING|_TIF_NOTIFY_SIGNAL)
468 jnz .Lsysc_sigpending
469 TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME
470 jo .Lsysc_notify_resume
471 TSTMSK __LC_CPU_FLAGS,(_CIF_ASCE_PRIMARY|_CIF_ASCE_SECONDARY)
476 # _TIF_NEED_RESCHED is set, call schedule
479 larl %r14,.Lsysc_return
483 # _CIF_ASCE_PRIMARY and/or _CIF_ASCE_SECONDARY set, load user space asce
486 ni __LC_CPU_FLAGS+7,255-_CIF_ASCE_SECONDARY
487 lctlg %c7,%c7,__LC_VDSO_ASCE # load secondary asce
488 TSTMSK __LC_CPU_FLAGS,_CIF_ASCE_PRIMARY
490 #ifndef CONFIG_HAVE_MARCH_Z10_FEATURES
491 tm __LC_STFLE_FAC_LIST+3,0x10 # has MVCOS ?
492 jnz .Lsysc_set_fs_fixup
493 ni __LC_CPU_FLAGS+7,255-_CIF_ASCE_PRIMARY
494 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
498 larl %r14,.Lsysc_return
503 # _TIF_SIGPENDING is set, call do_signal
506 lgr %r2,%r11 # pass pointer to pt_regs
508 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL
511 lghi %r13,__TASK_thread
512 lmg %r2,%r7,__PT_R2(%r11) # load svc arguments
513 lghi %r1,0 # svc 0 returns -ENOSYS
517 # _TIF_NOTIFY_RESUME is set, call do_notify_resume
519 .Lsysc_notify_resume:
520 lgr %r2,%r11 # pass pointer to pt_regs
521 larl %r14,.Lsysc_return
525 # _TIF_UPROBE is set, call uprobe_notify_resume
527 #ifdef CONFIG_UPROBES
528 .Lsysc_uprobe_notify:
529 lgr %r2,%r11 # pass pointer to pt_regs
530 larl %r14,.Lsysc_return
531 jg uprobe_notify_resume
535 # _TIF_GUARDED_STORAGE is set, call guarded_storage_load
537 .Lsysc_guarded_storage:
538 lgr %r2,%r11 # pass pointer to pt_regs
539 larl %r14,.Lsysc_return
542 # _TIF_PATCH_PENDING is set, call klp_update_patch_state
544 #ifdef CONFIG_LIVEPATCH
545 .Lsysc_patch_pending:
546 lg %r2,__LC_CURRENT # pass pointer to task struct
547 larl %r14,.Lsysc_return
548 jg klp_update_patch_state
552 # _PIF_PER_TRAP is set, call do_per_trap
555 ni __PT_FLAGS+7(%r11),255-_PIF_PER_TRAP
556 lgr %r2,%r11 # pass pointer to pt_regs
557 larl %r14,.Lsysc_return
561 # _PIF_SYSCALL_RESTART is set, repeat the current system call
563 .Lsysc_syscall_restart:
564 ni __PT_FLAGS+7(%r11),255-_PIF_SYSCALL_RESTART
565 lmg %r1,%r7,__PT_R1(%r11) # load svc arguments
566 lg %r2,__PT_ORIG_GPR2(%r11)
570 # call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
571 # and after the system call
574 lgr %r2,%r11 # pass pointer to pt_regs
576 llgh %r0,__PT_INT_CODE+2(%r11)
577 stg %r0,__PT_R2(%r11)
578 brasl %r14,do_syscall_trace_enter
584 lmg %r3,%r7,__PT_R3(%r11)
585 stg %r7,STACK_FRAME_OVERHEAD(%r15)
586 lg %r2,__PT_ORIG_GPR2(%r11)
587 BASR_EX %r14,%r9 # call sys_xxx
588 stg %r2,__PT_R2(%r11) # store return value
590 TSTMSK __TI_flags(%r12),_TIF_TRACE
592 lgr %r2,%r11 # pass pointer to pt_regs
593 larl %r14,.Lsysc_return
594 jg do_syscall_trace_exit
598 # a new process exits the kernel with ret_from_fork
601 la %r11,STACK_FRAME_OVERHEAD(%r15)
603 brasl %r14,schedule_tail
604 tm __PT_PSW+1(%r11),0x01 # forking a kernel thread ?
606 # it's a kernel thread
607 lmg %r9,%r10,__PT_R9(%r11) # load gprs
611 ENDPROC(ret_from_fork)
613 ENTRY(kernel_thread_starter)
617 ENDPROC(kernel_thread_starter)
620 * Program check handler routine
623 ENTRY(pgm_check_handler)
624 stpt __LC_SYNC_ENTER_TIMER
626 stmg %r8,%r15,__LC_SAVE_AREA_SYNC
627 lg %r10,__LC_LAST_BREAK
630 /* if __LC_LAST_BREAK is < 4096, it contains one of
631 * the lpswe addresses in lowcore. Set it to 1 (initial state)
632 * to prevent leaking that address to userspace.
635 0: lg %r12,__LC_CURRENT
637 lmg %r8,%r9,__LC_PGM_OLD_PSW
638 tmhh %r8,0x0001 # test problem state bit
639 jnz 3f # -> fault in user space
640 #if IS_ENABLED(CONFIG_KVM)
641 # cleanup critical section for program checks in sie64a
645 lghi %r13,.Lsie_done - .Lsie_gmap
648 lg %r14,__SF_SIE_CONTROL(%r15) # get control block pointer
649 ni __SIE_PROG0C+3(%r14),0xfe # no longer in SIE
650 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
651 larl %r9,sie_exit # skip forward to sie_exit
652 lghi %r11,_PIF_GUEST_FAULT
654 1: tmhh %r8,0x4000 # PER bit set in old PSW ?
655 jnz 2f # -> enabled, can't be a double fault
656 tm __LC_PGM_ILC+3,0x80 # check for per exception
657 jnz .Lpgm_svcper # -> single stepped svc
658 2: CHECK_STACK __LC_SAVE_AREA_SYNC
659 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
660 # CHECK_VMAP_STACK branches to stack_overflow or 5f
661 CHECK_VMAP_STACK __LC_SAVE_AREA_SYNC,5f
662 3: UPDATE_VTIME %r14,%r15,__LC_SYNC_ENTER_TIMER
663 BPENTER __TI_flags(%r12),_TIF_ISOLATE_BP
664 lg %r15,__LC_KERNEL_STACK
666 aghi %r14,__TASK_thread # pointer to thread_struct
667 lghi %r13,__LC_PGM_TDB
668 tm __LC_PGM_ILC+2,0x02 # check for transaction abort
670 mvc __THREAD_trap_tdb(256,%r14),0(%r13)
671 4: stg %r10,__THREAD_last_break(%r14)
673 la %r11,STACK_FRAME_OVERHEAD(%r15)
674 stmg %r0,%r7,__PT_R0(%r11)
675 # clear user controlled registers to prevent speculative use
684 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
685 stmg %r8,%r9,__PT_PSW(%r11)
686 mvc __PT_INT_CODE(4,%r11),__LC_PGM_ILC
687 mvc __PT_INT_PARM_LONG(8,%r11),__LC_TRANS_EXC_CODE
688 stg %r13,__PT_FLAGS(%r11)
689 stg %r10,__PT_ARGS(%r11)
690 tm __LC_PGM_ILC+3,0x80 # check for per exception
692 tmhh %r8,0x0001 # kernel per event ?
694 oi __PT_FLAGS+7(%r11),_PIF_PER_TRAP
695 mvc __THREAD_per_address(8,%r14),__LC_PER_ADDRESS
696 mvc __THREAD_per_cause(2,%r14),__LC_PER_CODE
697 mvc __THREAD_per_paid(1,%r14),__LC_PER_ACCESS_ID
698 6: RESTORE_SM_CLEAR_PER
699 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
700 larl %r1,pgm_check_table
701 llgh %r10,__PT_INT_CODE+2(%r11)
705 lg %r9,0(%r10,%r1) # load address of handler routine
706 lgr %r2,%r11 # pass pointer to pt_regs
707 BASR_EX %r14,%r9 # branch to interrupt-handler
710 tm __PT_PSW+1(%r11),0x01 # returning to user ?
712 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL
717 # PER event in supervisor state, must be kprobes
721 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
722 lgr %r2,%r11 # pass pointer to pt_regs
723 brasl %r14,do_per_trap
727 # single stepped system call
730 mvc __LC_RETURN_PSW(8),__LC_SVC_NEW_PSW
732 stg %r14,__LC_RETURN_PSW+8
733 lghi %r14,_PIF_SYSCALL | _PIF_PER_TRAP
734 lpswe __LC_RETURN_PSW # branch to .Lsysc_per
735 ENDPROC(pgm_check_handler)
738 * IO interrupt handler routine
740 ENTRY(io_int_handler)
742 stpt __LC_ASYNC_ENTER_TIMER
744 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC
746 lmg %r8,%r9,__LC_IO_OLD_PSW
747 SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER
748 stmg %r0,%r7,__PT_R0(%r11)
749 # clear user controlled registers to prevent speculative use
759 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
760 stmg %r8,%r9,__PT_PSW(%r11)
761 mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID
762 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
763 TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ
765 #if IS_ENABLED(CONFIG_TRACE_IRQFLAGS)
771 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
773 lgr %r2,%r11 # pass pointer to pt_regs
774 lghi %r3,IO_INTERRUPT
775 tm __PT_INT_CODE+8(%r11),0x80 # adapter interrupt ?
777 lghi %r3,THIN_INTERRUPT
780 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPAR
784 mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID
788 TSTMSK __TI_flags(%r12),_TIF_WORK
789 jnz .Lio_work # there is work to do (signals etc.)
790 TSTMSK __LC_CPU_FLAGS,_CIF_WORK
793 #if IS_ENABLED(CONFIG_TRACE_IRQFLAGS)
799 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11)
800 tm __PT_PSW+1(%r11),0x01 # returning to user ?
802 BPEXIT __TI_flags(%r12),_TIF_ISOLATE_BP
805 lmg %r0,%r15,__PT_R0(%r11)
810 # There is work todo, find out in which context we have been interrupted:
811 # 1) if we return to user space we can do all _TIF_WORK work
812 # 2) if we return to kernel code and kvm is enabled check if we need to
813 # modify the psw to leave SIE
814 # 3) if we return to kernel code and preemptive scheduling is enabled check
815 # the preemption counter and if it is zero call preempt_schedule_irq
816 # Before any work can be done, a switch to the kernel stack is required.
819 tm __PT_PSW+1(%r11),0x01 # returning to user ?
820 jo .Lio_work_user # yes -> do resched & signal
821 #ifdef CONFIG_PREEMPTION
822 # check for preemptive scheduling
823 icm %r0,15,__LC_PREEMPT_COUNT
824 jnz .Lio_restore # preemption is disabled
825 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED
827 # switch to kernel stack
828 lg %r1,__PT_R15(%r11)
829 aghi %r1,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
830 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
831 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
832 la %r11,STACK_FRAME_OVERHEAD(%r1)
834 brasl %r14,preempt_schedule_irq
841 # Need to do work before returning to userspace, switch to kernel stack
844 lg %r1,__LC_KERNEL_STACK
845 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
846 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
847 la %r11,STACK_FRAME_OVERHEAD(%r1)
851 # One of the work bits is on. Find out which one.
853 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED
855 #ifdef CONFIG_LIVEPATCH
856 TSTMSK __TI_flags(%r12),_TIF_PATCH_PENDING
857 jo .Lio_patch_pending
859 TSTMSK __TI_flags(%r12),(_TIF_SIGPENDING|_TIF_NOTIFY_SIGNAL)
861 TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME
862 jo .Lio_notify_resume
863 TSTMSK __TI_flags(%r12),_TIF_GUARDED_STORAGE
864 jo .Lio_guarded_storage
865 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
867 TSTMSK __LC_CPU_FLAGS,(_CIF_ASCE_PRIMARY|_CIF_ASCE_SECONDARY)
872 # _CIF_ASCE_PRIMARY and/or CIF_ASCE_SECONDARY set, load user space asce
875 ni __LC_CPU_FLAGS+7,255-_CIF_ASCE_SECONDARY
876 lctlg %c7,%c7,__LC_VDSO_ASCE # load secondary asce
877 TSTMSK __LC_CPU_FLAGS,_CIF_ASCE_PRIMARY
879 #ifndef CONFIG_HAVE_MARCH_Z10_FEATURES
880 tm __LC_STFLE_FAC_LIST+3,0x10 # has MVCOS ?
881 jnz .Lio_set_fs_fixup
882 ni __LC_CPU_FLAGS+7,255-_CIF_ASCE_PRIMARY
883 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
887 larl %r14,.Lio_return
891 # CIF_FPU is set, restore floating-point controls and floating-point registers.
894 larl %r14,.Lio_return
898 # _TIF_GUARDED_STORAGE is set, call guarded_storage_load
900 .Lio_guarded_storage:
902 lgr %r2,%r11 # pass pointer to pt_regs
903 brasl %r14,gs_load_bc_cb
908 # _TIF_NEED_RESCHED is set, call schedule
912 brasl %r14,schedule # call scheduler
917 # _TIF_PATCH_PENDING is set, call klp_update_patch_state
919 #ifdef CONFIG_LIVEPATCH
921 lg %r2,__LC_CURRENT # pass pointer to task struct
922 larl %r14,.Lio_return
923 jg klp_update_patch_state
927 # _TIF_SIGPENDING or is set, call do_signal
931 lgr %r2,%r11 # pass pointer to pt_regs
937 # _TIF_NOTIFY_RESUME or is set, call do_notify_resume
941 lgr %r2,%r11 # pass pointer to pt_regs
942 brasl %r14,do_notify_resume
945 ENDPROC(io_int_handler)
948 * External interrupt handler routine
950 ENTRY(ext_int_handler)
952 stpt __LC_ASYNC_ENTER_TIMER
954 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC
956 lmg %r8,%r9,__LC_EXT_OLD_PSW
957 SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER
958 stmg %r0,%r7,__PT_R0(%r11)
959 # clear user controlled registers to prevent speculative use
969 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
970 stmg %r8,%r9,__PT_PSW(%r11)
971 lghi %r1,__LC_EXT_PARAMS2
972 mvc __PT_INT_CODE(4,%r11),__LC_EXT_CPU_ADDR
973 mvc __PT_INT_PARM(4,%r11),__LC_EXT_PARAMS
974 mvc __PT_INT_PARM_LONG(8,%r11),0(%r1)
975 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
976 TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ
978 #if IS_ENABLED(CONFIG_TRACE_IRQFLAGS)
984 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
985 lgr %r2,%r11 # pass pointer to pt_regs
986 lghi %r3,EXT_INTERRUPT
989 ENDPROC(ext_int_handler)
995 stg %r3,__SF_EMPTY(%r15)
996 larl %r1,.Lpsw_idle_exit
997 stg %r1,__SF_EMPTY+8(%r15)
998 larl %r1,smp_cpu_mtid
1001 jz .Lpsw_idle_stcctm
1002 .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+16(%r15)
1004 oi __LC_CPU_FLAGS+7,_CIF_ENABLED_WAIT
1006 STCK __CLOCK_IDLE_ENTER(%r2)
1007 stpt __TIMER_IDLE_ENTER(%r2)
1008 lpswe __SF_EMPTY(%r15)
1014 * Store floating-point controls and floating-point or vector register
1015 * depending whether the vector facility is available. A critical section
1016 * cleanup assures that the registers are stored even if interrupted for
1017 * some other work. The CIF_FPU flag is set to trigger a lazy restore
1018 * of the register contents at return from io or a system call.
1020 ENTRY(save_fpu_regs)
1021 stnsm __SF_EMPTY(%r15),0xfc
1023 aghi %r2,__TASK_thread
1024 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
1025 jo .Lsave_fpu_regs_exit
1026 stfpc __THREAD_FPU_fpc(%r2)
1027 lg %r3,__THREAD_FPU_regs(%r2)
1028 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX
1029 jz .Lsave_fpu_regs_fp # no -> store FP regs
1030 VSTM %v0,%v15,0,%r3 # vstm 0,15,0(3)
1031 VSTM %v16,%v31,256,%r3 # vstm 16,31,256(3)
1032 j .Lsave_fpu_regs_done # -> set CIF_FPU flag
1050 .Lsave_fpu_regs_done:
1051 oi __LC_CPU_FLAGS+7,_CIF_FPU
1052 .Lsave_fpu_regs_exit:
1053 ssm __SF_EMPTY(%r15)
1055 .Lsave_fpu_regs_end:
1056 ENDPROC(save_fpu_regs)
1057 EXPORT_SYMBOL(save_fpu_regs)
1060 * Load floating-point controls and floating-point or vector registers.
1061 * A critical section cleanup assures that the register contents are
1062 * loaded even if interrupted for some other work.
1064 * There are special calling conventions to fit into sysc and io return work:
1065 * %r15: <kernel stack>
1066 * The function requires:
1071 aghi %r4,__TASK_thread
1072 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
1073 jno .Lload_fpu_regs_exit
1074 lfpc __THREAD_FPU_fpc(%r4)
1075 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX
1076 lg %r4,__THREAD_FPU_regs(%r4) # %r4 <- reg save area
1077 jz .Lload_fpu_regs_fp # -> no VX, load FP regs
1079 VLM %v16,%v31,256,%r4
1080 j .Lload_fpu_regs_done
1098 .Lload_fpu_regs_done:
1099 ni __LC_CPU_FLAGS+7,255-_CIF_FPU
1100 .Lload_fpu_regs_exit:
1102 .Lload_fpu_regs_end:
1103 ENDPROC(load_fpu_regs)
1106 * Machine check handler routines
1108 ENTRY(mcck_int_handler)
1109 STCK __LC_MCCK_CLOCK
1111 la %r1,4095 # validate r1
1112 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # validate cpu timer
1113 sckc __LC_CLOCK_COMPARATOR # validate comparator
1114 lam %a0,%a15,__LC_AREGS_SAVE_AREA-4095(%r1) # validate acrs
1115 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# validate gprs
1116 lg %r12,__LC_CURRENT
1117 lmg %r8,%r9,__LC_MCK_OLD_PSW
1118 TSTMSK __LC_MCCK_CODE,MCCK_CODE_SYSTEM_DAMAGE
1119 jo .Lmcck_panic # yes -> rest of mcck code invalid
1120 TSTMSK __LC_MCCK_CODE,MCCK_CODE_CR_VALID
1121 jno .Lmcck_panic # control registers invalid -> panic
1123 lctlg %c0,%c15,__LC_CREGS_SAVE_AREA-4095(%r14) # validate ctl regs
1125 lg %r11,__LC_MCESAD-4095(%r14) # extended machine check save area
1126 nill %r11,0xfc00 # MCESA_ORIGIN_MASK
1127 TSTMSK __LC_CREGS_SAVE_AREA+16-4095(%r14),CR2_GUARDED_STORAGE
1129 TSTMSK __LC_MCCK_CODE,MCCK_CODE_GS_VALID
1131 .insn rxy,0xe3000000004d,0,__MCESA_GS_SAVE_AREA(%r11) # LGSC
1132 0: l %r14,__LC_FP_CREG_SAVE_AREA-4095(%r14)
1133 TSTMSK __LC_MCCK_CODE,MCCK_CODE_FC_VALID
1137 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX
1139 lghi %r14,__LC_FPREGS_SAVE_AREA
1157 0: VLM %v0,%v15,0,%r11
1158 VLM %v16,%v31,256,%r11
1159 1: lghi %r14,__LC_CPU_TIMER_SAVE_AREA
1160 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
1161 TSTMSK __LC_MCCK_CODE,MCCK_CODE_CPU_TIMER_VALID
1163 la %r14,__LC_SYNC_ENTER_TIMER
1164 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
1166 la %r14,__LC_ASYNC_ENTER_TIMER
1167 0: clc 0(8,%r14),__LC_EXIT_TIMER
1169 la %r14,__LC_EXIT_TIMER
1170 1: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
1172 la %r14,__LC_LAST_UPDATE_TIMER
1174 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
1175 3: TSTMSK __LC_MCCK_CODE,MCCK_CODE_PSW_MWP_VALID
1177 tmhh %r8,0x0001 # interrupting from user ?
1179 TSTMSK __LC_MCCK_CODE,MCCK_CODE_PSW_IA_VALID
1181 4: ssm __LC_PGM_NEW_PSW # turn dat on, keep irqs off
1182 SWITCH_ASYNC __LC_GPREGS_SAVE_AREA+64,__LC_MCCK_ENTER_TIMER
1184 lghi %r14,__LC_GPREGS_SAVE_AREA+64
1185 stmg %r0,%r7,__PT_R0(%r11)
1186 # clear user controlled registers to prevent speculative use
1196 mvc __PT_R8(64,%r11),0(%r14)
1197 stmg %r8,%r9,__PT_PSW(%r11)
1198 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
1199 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
1200 lgr %r2,%r11 # pass pointer to pt_regs
1201 brasl %r14,s390_do_machine_check
1204 lg %r1,__LC_KERNEL_STACK # switch to kernel stack
1205 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
1206 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
1207 la %r11,STACK_FRAME_OVERHEAD(%r1)
1210 brasl %r14,s390_handle_mcck
1213 lmg %r0,%r10,__PT_R0(%r11)
1214 mvc __LC_RETURN_MCCK_PSW(16),__PT_PSW(%r11) # move return PSW
1215 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
1217 BPEXIT __TI_flags(%r12),_TIF_ISOLATE_BP
1218 stpt __LC_EXIT_TIMER
1219 0: lmg %r11,%r15,__PT_R11(%r11)
1220 b __LC_RETURN_MCCK_LPSWE
1223 lg %r15,__LC_NODAT_STACK
1224 la %r11,STACK_FRAME_OVERHEAD(%r15)
1226 ENDPROC(mcck_int_handler)
1229 # PSW restart interrupt handler
1231 ENTRY(restart_int_handler)
1232 ALTERNATIVE "", ".insn s,0xb2800000,_LPP_OFFSET", 40
1233 stg %r15,__LC_SAVE_AREA_RESTART
1234 lg %r15,__LC_RESTART_STACK
1235 xc STACK_FRAME_OVERHEAD(__PT_SIZE,%r15),STACK_FRAME_OVERHEAD(%r15)
1236 stmg %r0,%r14,STACK_FRAME_OVERHEAD+__PT_R0(%r15)
1237 mvc STACK_FRAME_OVERHEAD+__PT_R15(8,%r15),__LC_SAVE_AREA_RESTART
1238 mvc STACK_FRAME_OVERHEAD+__PT_PSW(16,%r15),__LC_RST_OLD_PSW
1239 xc 0(STACK_FRAME_OVERHEAD,%r15),0(%r15)
1240 lg %r1,__LC_RESTART_FN # load fn, parm & source cpu
1241 lg %r2,__LC_RESTART_DATA
1242 lg %r3,__LC_RESTART_SOURCE
1243 ltgr %r3,%r3 # test source cpu address
1244 jm 1f # negative -> skip source stop
1245 0: sigp %r4,%r3,SIGP_SENSE # sigp sense to source cpu
1246 brc 10,0b # wait for status stored
1247 1: basr %r14,%r1 # call function
1248 stap __SF_EMPTY(%r15) # store cpu address
1249 llgh %r3,__SF_EMPTY(%r15)
1250 2: sigp %r4,%r3,SIGP_STOP # sigp stop to current cpu
1253 ENDPROC(restart_int_handler)
1255 .section .kprobes.text, "ax"
1257 #if defined(CONFIG_CHECK_STACK) || defined(CONFIG_VMAP_STACK)
1259 * The synchronous or the asynchronous stack overflowed. We are dead.
1260 * No need to properly save the registers, we are going to panic anyway.
1261 * Setup a pt_regs so that show_trace can provide a good call trace.
1263 ENTRY(stack_overflow)
1264 lg %r15,__LC_NODAT_STACK # change to panic stack
1265 la %r11,STACK_FRAME_OVERHEAD(%r15)
1266 stmg %r0,%r7,__PT_R0(%r11)
1267 stmg %r8,%r9,__PT_PSW(%r11)
1268 mvc __PT_R8(64,%r11),0(%r14)
1269 stg %r10,__PT_ORIG_GPR2(%r11) # store last break to orig_gpr2
1270 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
1271 lgr %r2,%r11 # pass pointer to pt_regs
1272 jg kernel_stack_overflow
1273 ENDPROC(stack_overflow)
1276 #if IS_ENABLED(CONFIG_KVM)
1278 cghi %r11,__LC_SAVE_AREA_ASYNC #Is this in normal interrupt?
1280 larl %r13,.Lsie_entry
1282 larl %r13,.Lsie_skip
1285 oi __LC_CPU_FLAGS+7, _CIF_MCCK_GUEST
1286 1: BPENTER __SF_SIE_FLAGS(%r15),(_TIF_ISOLATE_BP|_TIF_ISOLATE_BP_GUEST)
1287 lg %r9,__SF_SIE_CONTROL(%r15) # get control block pointer
1288 ni __SIE_PROG0C+3(%r9),0xfe # no longer in SIE
1289 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
1290 larl %r9,sie_exit # skip forward to sie_exit
1294 .section .rodata, "a"
1295 #define SYSCALL(esame,emu) .quad __s390x_ ## esame
1296 .globl sys_call_table
1298 #include "asm/syscall_table.h"
1301 #ifdef CONFIG_COMPAT
1303 #define SYSCALL(esame,emu) .quad __s390_ ## emu
1304 .globl sys_call_table_emu
1306 #include "asm/syscall_table.h"