1 /* SPDX-License-Identifier: GPL-2.0 */
3 * S390 low-level entry points.
5 * Copyright IBM Corp. 1999, 2012
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 * Hartmut Penner (hp@de.ibm.com),
8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
9 * Heiko Carstens <heiko.carstens@de.ibm.com>
12 #include <linux/init.h>
13 #include <linux/linkage.h>
14 #include <asm/alternative-asm.h>
15 #include <asm/processor.h>
16 #include <asm/cache.h>
17 #include <asm/ctl_reg.h>
18 #include <asm/dwarf.h>
19 #include <asm/errno.h>
20 #include <asm/ptrace.h>
21 #include <asm/thread_info.h>
22 #include <asm/asm-offsets.h>
23 #include <asm/unistd.h>
27 #include <asm/vx-insn.h>
28 #include <asm/setup.h>
30 #include <asm/export.h>
31 #include <asm/nospec-insn.h>
34 __PT_R1 = __PT_GPRS + 8
35 __PT_R2 = __PT_GPRS + 16
36 __PT_R3 = __PT_GPRS + 24
37 __PT_R4 = __PT_GPRS + 32
38 __PT_R5 = __PT_GPRS + 40
39 __PT_R6 = __PT_GPRS + 48
40 __PT_R7 = __PT_GPRS + 56
41 __PT_R8 = __PT_GPRS + 64
42 __PT_R9 = __PT_GPRS + 72
43 __PT_R10 = __PT_GPRS + 80
44 __PT_R11 = __PT_GPRS + 88
45 __PT_R12 = __PT_GPRS + 96
46 __PT_R13 = __PT_GPRS + 104
47 __PT_R14 = __PT_GPRS + 112
48 __PT_R15 = __PT_GPRS + 120
50 STACK_SHIFT = PAGE_SHIFT + THREAD_SIZE_ORDER
51 STACK_SIZE = 1 << STACK_SHIFT
52 STACK_INIT = STACK_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE
54 _TIF_WORK = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
55 _TIF_UPROBE | _TIF_GUARDED_STORAGE | _TIF_PATCH_PENDING | \
57 _TIF_TRACE = (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | _TIF_SECCOMP | \
58 _TIF_SYSCALL_TRACEPOINT)
59 _CIF_WORK = (_CIF_FPU)
60 _PIF_WORK = (_PIF_PER_TRAP | _PIF_SYSCALL_RESTART)
62 _LPP_OFFSET = __LC_LPP
65 #ifdef CONFIG_TRACE_IRQFLAGS
67 brasl %r14,trace_hardirqs_on_caller
72 #ifdef CONFIG_TRACE_IRQFLAGS
74 brasl %r14,trace_hardirqs_off_caller
78 .macro LOCKDEP_SYS_EXIT
80 tm __PT_PSW+1(%r11),0x01 # returning to user ?
82 brasl %r14,lockdep_sys_exit
86 .macro CHECK_STACK savearea
87 #ifdef CONFIG_CHECK_STACK
88 tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
94 .macro DEBUG_USER_ASCE
95 #ifdef CONFIG_DEBUG_USER_ASCE
96 brasl %r14,debug_user_asce
100 .macro CHECK_VMAP_STACK savearea,oklabel
101 #ifdef CONFIG_VMAP_STACK
103 nill %r14,0x10000 - STACK_SIZE
105 clg %r14,__LC_KERNEL_STACK
107 clg %r14,__LC_ASYNC_STACK
109 clg %r14,__LC_NODAT_STACK
111 clg %r14,__LC_RESTART_STACK
120 .macro SWITCH_ASYNC savearea,timer,clock
121 tmhh %r8,0x0001 # interrupting from user ?
123 #if IS_ENABLED(CONFIG_KVM)
127 lghi %r13,.Lsie_done - .Lsie_gmap
130 lghi %r11,\savearea # inside critical section, do cleanup
131 brasl %r14,.Lcleanup_sie
133 0: larl %r13,.Lpsw_idle_exit
137 larl %r1,smp_cpu_mtid
140 jz 2f # no SMT, skip mt_cycles calculation
141 .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+80(%r15)
143 ag %r3,__LC_PERCPU_OFFSET
144 la %r4,__SF_EMPTY+16(%r15)
153 2: mvc __CLOCK_IDLE_EXIT(8,%r2), \clock
154 mvc __TIMER_IDLE_EXIT(8,%r2), \timer
155 # account system time going idle
156 ni __LC_CPU_FLAGS+7,255-_CIF_ENABLED_WAIT
158 lg %r13,__LC_STEAL_TIMER
159 alg %r13,__CLOCK_IDLE_ENTER(%r2)
160 slg %r13,__LC_LAST_UPDATE_CLOCK
161 stg %r13,__LC_STEAL_TIMER
163 mvc __LC_LAST_UPDATE_CLOCK(8),__CLOCK_IDLE_EXIT(%r2)
165 lg %r13,__LC_SYSTEM_TIMER
166 alg %r13,__LC_LAST_UPDATE_TIMER
167 slg %r13,__TIMER_IDLE_ENTER(%r2)
168 stg %r13,__LC_SYSTEM_TIMER
169 mvc __LC_LAST_UPDATE_TIMER(8),__TIMER_IDLE_EXIT(%r2)
171 nihh %r8,0xfcfd # clear wait state and irq bits
172 3: lg %r14,__LC_ASYNC_STACK # are we already on the target stack?
174 srag %r14,%r14,STACK_SHIFT
176 CHECK_STACK \savearea
177 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
179 4: UPDATE_VTIME %r14,%r15,\timer
180 BPENTER __TI_flags(%r12),_TIF_ISOLATE_BP
181 5: lg %r15,__LC_ASYNC_STACK # load async stack
182 6: la %r11,STACK_FRAME_OVERHEAD(%r15)
185 .macro UPDATE_VTIME w1,w2,enter_timer
186 lg \w1,__LC_EXIT_TIMER
187 lg \w2,__LC_LAST_UPDATE_TIMER
189 slg \w2,__LC_EXIT_TIMER
190 alg \w1,__LC_USER_TIMER
191 alg \w2,__LC_SYSTEM_TIMER
192 stg \w1,__LC_USER_TIMER
193 stg \w2,__LC_SYSTEM_TIMER
194 mvc __LC_LAST_UPDATE_TIMER(8),\enter_timer
197 .macro RESTORE_SM_CLEAR_PER
198 stg %r8,__LC_RETURN_PSW
199 ni __LC_RETURN_PSW,0xbf
204 stosm __SF_EMPTY(%r15),3
207 .macro ENABLE_INTS_TRACE
213 stnsm __SF_EMPTY(%r15),0xfc
216 .macro DISABLE_INTS_TRACE
222 #ifdef CONFIG_HAVE_MARCH_Z9_109_FEATURES
223 .insn s,0xb27c0000,\savearea # store clock fast
225 .insn s,0xb2050000,\savearea # store clock
230 * The TSTMSK macro generates a test-under-mask instruction by
231 * calculating the memory offset for the specified mask value.
232 * Mask value can be any constant. The macro shifts the mask
233 * value to calculate the memory offset for the test-under-mask
236 .macro TSTMSK addr, mask, size=8, bytepos=0
237 .if (\bytepos < \size) && (\mask >> 8)
239 .error "Mask exceeds byte boundary"
241 TSTMSK \addr, "(\mask >> 8)", \size, "(\bytepos + 1)"
245 .error "Mask must not be zero"
247 off = \size - \bytepos - 1
252 ALTERNATIVE "", ".long 0xb2e8c000", 82
256 ALTERNATIVE "", ".long 0xb2e8d000", 82
259 .macro BPENTER tif_ptr,tif_mask
260 ALTERNATIVE "TSTMSK \tif_ptr,\tif_mask; jz .+8; .long 0xb2e8d000", \
264 .macro BPEXIT tif_ptr,tif_mask
265 TSTMSK \tif_ptr,\tif_mask
266 ALTERNATIVE "jz .+8; .long 0xb2e8c000", \
267 "jnz .+8; .long 0xb2e8d000", 82
272 GEN_BR_THUNK %r14,%r11
274 .section .kprobes.text, "ax"
277 * This nop exists only in order to avoid that __switch_to starts at
278 * the beginning of the kprobes text section. In that case we would
279 * have several symbols at the same address. E.g. objdump would take
280 * an arbitrary symbol name when disassembling this code.
281 * With the added nop in between the __switch_to symbol is unique
293 * Scheduler resume function, called by switch_to
294 * gpr2 = (task_struct *) prev
295 * gpr3 = (task_struct *) next
300 stmg %r6,%r15,__SF_GPRS(%r15) # store gprs of prev task
301 lghi %r4,__TASK_stack
302 lghi %r1,__TASK_thread
304 stg %r15,__THREAD_ksp(%r1,%r2) # store kernel stack of prev
305 lg %r15,0(%r4,%r3) # start of kernel stack of next
306 agr %r15,%r5 # end of kernel stack of next
307 stg %r3,__LC_CURRENT # store task struct of next
308 stg %r15,__LC_KERNEL_STACK # store end of kernel stack
309 lg %r15,__THREAD_ksp(%r1,%r3) # load kernel stack of next
311 mvc __LC_CURRENT_PID(4,%r0),0(%r3) # store pid of next
312 lmg %r6,%r15,__SF_GPRS(%r15) # load gprs of next task
313 ALTERNATIVE "", ".insn s,0xb2800000,_LPP_OFFSET", 40
317 #if IS_ENABLED(CONFIG_KVM)
319 * sie64a calling convention:
320 * %r2 pointer to sie control block
321 * %r3 guest register save area
324 stmg %r6,%r14,__SF_GPRS(%r15) # save kernel registers
326 stg %r2,__SF_SIE_CONTROL(%r15) # save control block pointer
327 stg %r3,__SF_SIE_SAVEAREA(%r15) # save guest register save area
328 xc __SF_SIE_REASON(8,%r15),__SF_SIE_REASON(%r15) # reason code = 0
329 mvc __SF_SIE_FLAGS(8,%r15),__TI_flags(%r12) # copy thread flags
330 TSTMSK __LC_CPU_FLAGS,_CIF_FPU # load guest fp/vx registers ?
331 jno .Lsie_load_guest_gprs
332 brasl %r14,load_fpu_regs # load guest fp/vx regs
333 .Lsie_load_guest_gprs:
334 lmg %r0,%r13,0(%r3) # load guest gprs 0-13
335 lg %r14,__LC_GMAP # get gmap pointer
338 lctlg %c1,%c1,__GMAP_ASCE(%r14) # load primary asce
340 lg %r14,__SF_SIE_CONTROL(%r15) # get control block pointer
341 oi __SIE_PROG0C+3(%r14),1 # we are going into SIE now
342 tm __SIE_PROG20+3(%r14),3 # last exit...
344 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
345 jo .Lsie_skip # exit if fp/vx regs changed
346 BPEXIT __SF_SIE_FLAGS(%r15),(_TIF_ISOLATE_BP|_TIF_ISOLATE_BP_GUEST)
350 BPENTER __SF_SIE_FLAGS(%r15),(_TIF_ISOLATE_BP|_TIF_ISOLATE_BP_GUEST)
352 ni __SIE_PROG0C+3(%r14),0xfe # no longer in SIE
353 lctlg %c1,%c1,__LC_KERNEL_ASCE # load primary asce
355 # some program checks are suppressing. C code (e.g. do_protection_exception)
356 # will rewind the PSW by the ILC, which is often 4 bytes in case of SIE. There
357 # are some corner cases (e.g. runtime instrumentation) where ILC is unpredictable.
358 # Other instructions between sie64a and .Lsie_done should not cause program
359 # interrupts. So lets use 3 nops as a landing pad for all possible rewinds.
360 # See also .Lcleanup_sie
369 lg %r14,__SF_SIE_SAVEAREA(%r15) # load guest register save area
370 stmg %r0,%r13,0(%r14) # save guest gprs 0-13
371 xgr %r0,%r0 # clear guest registers to
372 xgr %r1,%r1 # prevent speculative use
377 lmg %r6,%r14,__SF_GPRS(%r15) # restore kernel registers
378 lg %r2,__SF_SIE_REASON(%r15) # return exit reason code
382 stg %r14,__SF_SIE_REASON(%r15) # set exit reason code
385 EX_TABLE(.Lrewind_pad6,.Lsie_fault)
386 EX_TABLE(.Lrewind_pad4,.Lsie_fault)
387 EX_TABLE(.Lrewind_pad2,.Lsie_fault)
388 EX_TABLE(sie_exit,.Lsie_fault)
390 EXPORT_SYMBOL(sie64a)
391 EXPORT_SYMBOL(sie_exit)
395 * SVC interrupt handler routine. System calls are synchronous events and
396 * are entered with interrupts disabled.
400 stpt __LC_SYNC_ENTER_TIMER
401 stmg %r8,%r15,__LC_SAVE_AREA_SYNC
404 lghi %r14,_PIF_SYSCALL
406 lctlg %c1,%c1,__LC_KERNEL_ASCE
407 lghi %r13,__TASK_thread
408 lg %r15,__LC_KERNEL_STACK
409 la %r11,STACK_FRAME_OVERHEAD(%r15) # pointer to pt_regs
410 UPDATE_VTIME %r8,%r9,__LC_SYNC_ENTER_TIMER
411 BPENTER __TI_flags(%r12),_TIF_ISOLATE_BP
412 stmg %r0,%r7,__PT_R0(%r11)
413 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
414 mvc __PT_PSW(16,%r11),__LC_SVC_OLD_PSW
415 mvc __PT_INT_CODE(4,%r11),__LC_SVC_ILC
416 stg %r14,__PT_FLAGS(%r11)
419 # clear user controlled register to prevent speculative use
421 # load address of system call table
422 lg %r10,__THREAD_sysc_table(%r13,%r12)
423 llgh %r8,__PT_INT_CODE+2(%r11)
424 slag %r8,%r8,3 # shift and test for svc 0
426 # svc 0: system call number in %r1
427 llgfr %r1,%r1 # clear high word in r1
428 sth %r1,__PT_INT_CODE+2(%r11)
433 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
434 stg %r2,__PT_ORIG_GPR2(%r11)
435 stg %r7,STACK_FRAME_OVERHEAD(%r15)
436 lg %r9,0(%r8,%r10) # get system call add.
437 TSTMSK __TI_flags(%r12),_TIF_TRACE
439 BASR_EX %r14,%r9 # call sys_xxxx
440 stg %r2,__PT_R2(%r11) # store return value
443 #ifdef CONFIG_DEBUG_RSEQ
445 brasl %r14,rseq_syscall
450 TSTMSK __PT_FLAGS(%r11),_PIF_WORK
452 TSTMSK __TI_flags(%r12),_TIF_WORK
453 jnz .Lsysc_work # check for work
455 lctlg %c1,%c1,__LC_USER_ASCE
456 BPEXIT __TI_flags(%r12),_TIF_ISOLATE_BP
457 TSTMSK __LC_CPU_FLAGS, _CIF_FPU
459 brasl %r14,load_fpu_regs
461 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11)
463 lmg %r0,%r15,__PT_R0(%r11)
467 # One of the work bits is on. Find out which one.
471 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED
473 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL_RESTART
474 jo .Lsysc_syscall_restart
475 #ifdef CONFIG_UPROBES
476 TSTMSK __TI_flags(%r12),_TIF_UPROBE
477 jo .Lsysc_uprobe_notify
479 TSTMSK __TI_flags(%r12),_TIF_GUARDED_STORAGE
480 jo .Lsysc_guarded_storage
481 TSTMSK __PT_FLAGS(%r11),_PIF_PER_TRAP
483 #ifdef CONFIG_LIVEPATCH
484 TSTMSK __TI_flags(%r12),_TIF_PATCH_PENDING
485 jo .Lsysc_patch_pending # handle live patching just before
486 # signals and possible syscall restart
488 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL_RESTART
489 jo .Lsysc_syscall_restart
490 TSTMSK __TI_flags(%r12),(_TIF_SIGPENDING|_TIF_NOTIFY_SIGNAL)
491 jnz .Lsysc_sigpending
492 TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME
493 jo .Lsysc_notify_resume
497 # _TIF_NEED_RESCHED is set, call schedule
500 larl %r14,.Lsysc_return
504 # _TIF_SIGPENDING is set, call do_signal
507 lgr %r2,%r11 # pass pointer to pt_regs
509 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL
512 lghi %r13,__TASK_thread
513 lmg %r2,%r7,__PT_R2(%r11) # load svc arguments
514 lghi %r1,0 # svc 0 returns -ENOSYS
518 # _TIF_NOTIFY_RESUME is set, call do_notify_resume
520 .Lsysc_notify_resume:
521 lgr %r2,%r11 # pass pointer to pt_regs
522 larl %r14,.Lsysc_return
526 # _TIF_UPROBE is set, call uprobe_notify_resume
528 #ifdef CONFIG_UPROBES
529 .Lsysc_uprobe_notify:
530 lgr %r2,%r11 # pass pointer to pt_regs
531 larl %r14,.Lsysc_return
532 jg uprobe_notify_resume
536 # _TIF_GUARDED_STORAGE is set, call guarded_storage_load
538 .Lsysc_guarded_storage:
539 lgr %r2,%r11 # pass pointer to pt_regs
540 larl %r14,.Lsysc_return
543 # _TIF_PATCH_PENDING is set, call klp_update_patch_state
545 #ifdef CONFIG_LIVEPATCH
546 .Lsysc_patch_pending:
547 lg %r2,__LC_CURRENT # pass pointer to task struct
548 larl %r14,.Lsysc_return
549 jg klp_update_patch_state
553 # _PIF_PER_TRAP is set, call do_per_trap
556 ni __PT_FLAGS+7(%r11),255-_PIF_PER_TRAP
557 lgr %r2,%r11 # pass pointer to pt_regs
558 larl %r14,.Lsysc_return
562 # _PIF_SYSCALL_RESTART is set, repeat the current system call
564 .Lsysc_syscall_restart:
565 ni __PT_FLAGS+7(%r11),255-_PIF_SYSCALL_RESTART
566 lmg %r1,%r7,__PT_R1(%r11) # load svc arguments
567 lg %r2,__PT_ORIG_GPR2(%r11)
571 # call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
572 # and after the system call
575 lgr %r2,%r11 # pass pointer to pt_regs
577 llgh %r0,__PT_INT_CODE+2(%r11)
578 stg %r0,__PT_R2(%r11)
579 brasl %r14,do_syscall_trace_enter
585 lmg %r3,%r7,__PT_R3(%r11)
586 stg %r7,STACK_FRAME_OVERHEAD(%r15)
587 lg %r2,__PT_ORIG_GPR2(%r11)
588 BASR_EX %r14,%r9 # call sys_xxx
589 stg %r2,__PT_R2(%r11) # store return value
591 TSTMSK __TI_flags(%r12),_TIF_TRACE
593 lgr %r2,%r11 # pass pointer to pt_regs
594 larl %r14,.Lsysc_return
595 jg do_syscall_trace_exit
599 # a new process exits the kernel with ret_from_fork
602 la %r11,STACK_FRAME_OVERHEAD(%r15)
604 brasl %r14,schedule_tail
605 tm __PT_PSW+1(%r11),0x01 # forking a kernel thread ?
607 # it's a kernel thread
608 lmg %r9,%r10,__PT_R9(%r11) # load gprs
612 ENDPROC(ret_from_fork)
614 ENTRY(kernel_thread_starter)
618 ENDPROC(kernel_thread_starter)
621 * Program check handler routine
624 ENTRY(pgm_check_handler)
625 stpt __LC_SYNC_ENTER_TIMER
627 stmg %r8,%r15,__LC_SAVE_AREA_SYNC
628 lg %r10,__LC_LAST_BREAK
631 /* if __LC_LAST_BREAK is < 4096, it contains one of
632 * the lpswe addresses in lowcore. Set it to 1 (initial state)
633 * to prevent leaking that address to userspace.
636 0: lg %r12,__LC_CURRENT
638 lmg %r8,%r9,__LC_PGM_OLD_PSW
639 tmhh %r8,0x0001 # coming from user space?
641 lctlg %c1,%c1,__LC_KERNEL_ASCE
644 #if IS_ENABLED(CONFIG_KVM)
645 # cleanup critical section for program checks in sie64a
649 lghi %r13,.Lsie_done - .Lsie_gmap
652 lg %r14,__SF_SIE_CONTROL(%r15) # get control block pointer
653 ni __SIE_PROG0C+3(%r14),0xfe # no longer in SIE
654 lctlg %c1,%c1,__LC_KERNEL_ASCE # load primary asce
655 larl %r9,sie_exit # skip forward to sie_exit
656 lghi %r11,_PIF_GUEST_FAULT
658 1: tmhh %r8,0x4000 # PER bit set in old PSW ?
659 jnz 2f # -> enabled, can't be a double fault
660 tm __LC_PGM_ILC+3,0x80 # check for per exception
661 jnz .Lpgm_svcper # -> single stepped svc
662 2: CHECK_STACK __LC_SAVE_AREA_SYNC
663 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
664 # CHECK_VMAP_STACK branches to stack_overflow or 5f
665 CHECK_VMAP_STACK __LC_SAVE_AREA_SYNC,5f
666 3: UPDATE_VTIME %r14,%r15,__LC_SYNC_ENTER_TIMER
667 BPENTER __TI_flags(%r12),_TIF_ISOLATE_BP
668 lg %r15,__LC_KERNEL_STACK
670 aghi %r14,__TASK_thread # pointer to thread_struct
671 lghi %r13,__LC_PGM_TDB
672 tm __LC_PGM_ILC+2,0x02 # check for transaction abort
674 mvc __THREAD_trap_tdb(256,%r14),0(%r13)
675 4: stg %r10,__THREAD_last_break(%r14)
677 la %r11,STACK_FRAME_OVERHEAD(%r15)
678 stmg %r0,%r7,__PT_R0(%r11)
679 # clear user controlled registers to prevent speculative use
688 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
689 stmg %r8,%r9,__PT_PSW(%r11)
690 mvc __PT_INT_CODE(4,%r11),__LC_PGM_ILC
691 mvc __PT_INT_PARM_LONG(8,%r11),__LC_TRANS_EXC_CODE
692 stg %r13,__PT_FLAGS(%r11)
693 stg %r10,__PT_ARGS(%r11)
694 tm __LC_PGM_ILC+3,0x80 # check for per exception
696 tmhh %r8,0x0001 # kernel per event ?
698 oi __PT_FLAGS+7(%r11),_PIF_PER_TRAP
699 mvc __THREAD_per_address(8,%r14),__LC_PER_ADDRESS
700 mvc __THREAD_per_cause(2,%r14),__LC_PER_CODE
701 mvc __THREAD_per_paid(1,%r14),__LC_PER_ACCESS_ID
702 6: RESTORE_SM_CLEAR_PER
703 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
704 larl %r1,pgm_check_table
705 llgh %r10,__PT_INT_CODE+2(%r11)
709 lg %r9,0(%r10,%r1) # load address of handler routine
710 lgr %r2,%r11 # pass pointer to pt_regs
711 BASR_EX %r14,%r9 # branch to interrupt-handler
714 tm __PT_PSW+1(%r11),0x01 # returning to user ?
716 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL
721 TSTMSK __LC_CPU_FLAGS, _CIF_FPU
723 brasl %r14,load_fpu_regs
725 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11)
727 lmg %r0,%r15,__PT_R0(%r11)
731 # PER event in supervisor state, must be kprobes
735 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
736 lgr %r2,%r11 # pass pointer to pt_regs
737 brasl %r14,do_per_trap
741 # single stepped system call
744 mvc __LC_RETURN_PSW(8),__LC_SVC_NEW_PSW
746 stg %r14,__LC_RETURN_PSW+8
747 lghi %r14,_PIF_SYSCALL | _PIF_PER_TRAP
748 lpswe __LC_RETURN_PSW # branch to .Lsysc_per
749 ENDPROC(pgm_check_handler)
752 * IO interrupt handler routine
754 ENTRY(io_int_handler)
756 stpt __LC_ASYNC_ENTER_TIMER
758 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC
760 lmg %r8,%r9,__LC_IO_OLD_PSW
761 SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER,__LC_INT_CLOCK
762 stmg %r0,%r7,__PT_R0(%r11)
763 # clear user controlled registers to prevent speculative use
773 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
774 stmg %r8,%r9,__PT_PSW(%r11)
775 tm __PT_PSW+1(%r11),0x01 # coming from user space?
777 lctlg %c1,%c1,__LC_KERNEL_ASCE
779 mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID
780 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
781 TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ
784 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
786 lgr %r2,%r11 # pass pointer to pt_regs
787 lghi %r3,IO_INTERRUPT
788 tm __PT_INT_CODE+8(%r11),0x80 # adapter interrupt ?
790 lghi %r3,THIN_INTERRUPT
793 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPAR
797 mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID
801 TSTMSK __TI_flags(%r12),_TIF_WORK
802 jnz .Lio_work # there is work to do (signals etc.)
803 TSTMSK __LC_CPU_FLAGS,_CIF_WORK
807 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11)
808 tm __PT_PSW+1(%r11),0x01 # returning to user ?
811 lctlg %c1,%c1,__LC_USER_ASCE
812 BPEXIT __TI_flags(%r12),_TIF_ISOLATE_BP
815 lmg %r0,%r15,__PT_R0(%r11)
820 # There is work todo, find out in which context we have been interrupted:
821 # 1) if we return to user space we can do all _TIF_WORK work
822 # 2) if we return to kernel code and kvm is enabled check if we need to
823 # modify the psw to leave SIE
824 # 3) if we return to kernel code and preemptive scheduling is enabled check
825 # the preemption counter and if it is zero call preempt_schedule_irq
826 # Before any work can be done, a switch to the kernel stack is required.
829 tm __PT_PSW+1(%r11),0x01 # returning to user ?
830 jo .Lio_work_user # yes -> do resched & signal
831 #ifdef CONFIG_PREEMPTION
832 # check for preemptive scheduling
833 icm %r0,15,__LC_PREEMPT_COUNT
834 jnz .Lio_restore # preemption is disabled
835 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED
837 # switch to kernel stack
838 lg %r1,__PT_R15(%r11)
839 aghi %r1,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
840 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
841 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
842 la %r11,STACK_FRAME_OVERHEAD(%r1)
844 brasl %r14,preempt_schedule_irq
851 # Need to do work before returning to userspace, switch to kernel stack
854 lg %r1,__LC_KERNEL_STACK
855 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
856 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
857 la %r11,STACK_FRAME_OVERHEAD(%r1)
861 # One of the work bits is on. Find out which one.
863 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED
865 #ifdef CONFIG_LIVEPATCH
866 TSTMSK __TI_flags(%r12),_TIF_PATCH_PENDING
867 jo .Lio_patch_pending
869 TSTMSK __TI_flags(%r12),(_TIF_SIGPENDING|_TIF_NOTIFY_SIGNAL)
871 TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME
872 jo .Lio_notify_resume
873 TSTMSK __TI_flags(%r12),_TIF_GUARDED_STORAGE
874 jo .Lio_guarded_storage
875 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
880 # CIF_FPU is set, restore floating-point controls and floating-point registers.
883 larl %r14,.Lio_return
887 # _TIF_GUARDED_STORAGE is set, call guarded_storage_load
889 .Lio_guarded_storage:
891 lgr %r2,%r11 # pass pointer to pt_regs
892 brasl %r14,gs_load_bc_cb
897 # _TIF_NEED_RESCHED is set, call schedule
901 brasl %r14,schedule # call scheduler
906 # _TIF_PATCH_PENDING is set, call klp_update_patch_state
908 #ifdef CONFIG_LIVEPATCH
910 lg %r2,__LC_CURRENT # pass pointer to task struct
911 larl %r14,.Lio_return
912 jg klp_update_patch_state
916 # _TIF_SIGPENDING or is set, call do_signal
920 lgr %r2,%r11 # pass pointer to pt_regs
926 # _TIF_NOTIFY_RESUME or is set, call do_notify_resume
930 lgr %r2,%r11 # pass pointer to pt_regs
931 brasl %r14,do_notify_resume
934 ENDPROC(io_int_handler)
937 * External interrupt handler routine
939 ENTRY(ext_int_handler)
941 stpt __LC_ASYNC_ENTER_TIMER
943 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC
945 lmg %r8,%r9,__LC_EXT_OLD_PSW
946 SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER,__LC_INT_CLOCK
947 stmg %r0,%r7,__PT_R0(%r11)
948 # clear user controlled registers to prevent speculative use
958 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
959 stmg %r8,%r9,__PT_PSW(%r11)
960 tm __PT_PSW+1(%r11),0x01 # coming from user space?
962 lctlg %c1,%c1,__LC_KERNEL_ASCE
964 lghi %r1,__LC_EXT_PARAMS2
965 mvc __PT_INT_CODE(4,%r11),__LC_EXT_CPU_ADDR
966 mvc __PT_INT_PARM(4,%r11),__LC_EXT_PARAMS
967 mvc __PT_INT_PARM_LONG(8,%r11),0(%r1)
968 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
969 TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ
972 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
973 lgr %r2,%r11 # pass pointer to pt_regs
974 lghi %r3,EXT_INTERRUPT
977 ENDPROC(ext_int_handler)
983 stg %r3,__SF_EMPTY(%r15)
984 larl %r1,.Lpsw_idle_exit
985 stg %r1,__SF_EMPTY+8(%r15)
986 larl %r1,smp_cpu_mtid
990 .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+16(%r15)
992 oi __LC_CPU_FLAGS+7,_CIF_ENABLED_WAIT
994 STCK __CLOCK_IDLE_ENTER(%r2)
995 stpt __TIMER_IDLE_ENTER(%r2)
996 lpswe __SF_EMPTY(%r15)
1002 * Store floating-point controls and floating-point or vector register
1003 * depending whether the vector facility is available. A critical section
1004 * cleanup assures that the registers are stored even if interrupted for
1005 * some other work. The CIF_FPU flag is set to trigger a lazy restore
1006 * of the register contents at return from io or a system call.
1008 ENTRY(save_fpu_regs)
1009 stnsm __SF_EMPTY(%r15),0xfc
1011 aghi %r2,__TASK_thread
1012 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
1013 jo .Lsave_fpu_regs_exit
1014 stfpc __THREAD_FPU_fpc(%r2)
1015 lg %r3,__THREAD_FPU_regs(%r2)
1016 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX
1017 jz .Lsave_fpu_regs_fp # no -> store FP regs
1018 VSTM %v0,%v15,0,%r3 # vstm 0,15,0(3)
1019 VSTM %v16,%v31,256,%r3 # vstm 16,31,256(3)
1020 j .Lsave_fpu_regs_done # -> set CIF_FPU flag
1038 .Lsave_fpu_regs_done:
1039 oi __LC_CPU_FLAGS+7,_CIF_FPU
1040 .Lsave_fpu_regs_exit:
1041 ssm __SF_EMPTY(%r15)
1043 .Lsave_fpu_regs_end:
1044 ENDPROC(save_fpu_regs)
1045 EXPORT_SYMBOL(save_fpu_regs)
1048 * Load floating-point controls and floating-point or vector registers.
1049 * A critical section cleanup assures that the register contents are
1050 * loaded even if interrupted for some other work.
1052 * There are special calling conventions to fit into sysc and io return work:
1053 * %r15: <kernel stack>
1054 * The function requires:
1058 stnsm __SF_EMPTY(%r15),0xfc
1060 aghi %r4,__TASK_thread
1061 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
1062 jno .Lload_fpu_regs_exit
1063 lfpc __THREAD_FPU_fpc(%r4)
1064 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX
1065 lg %r4,__THREAD_FPU_regs(%r4) # %r4 <- reg save area
1066 jz .Lload_fpu_regs_fp # -> no VX, load FP regs
1068 VLM %v16,%v31,256,%r4
1069 j .Lload_fpu_regs_done
1087 .Lload_fpu_regs_done:
1088 ni __LC_CPU_FLAGS+7,255-_CIF_FPU
1089 .Lload_fpu_regs_exit:
1090 ssm __SF_EMPTY(%r15)
1092 .Lload_fpu_regs_end:
1093 ENDPROC(load_fpu_regs)
1096 * Machine check handler routines
1098 ENTRY(mcck_int_handler)
1099 STCK __LC_MCCK_CLOCK
1101 la %r1,4095 # validate r1
1102 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # validate cpu timer
1103 sckc __LC_CLOCK_COMPARATOR # validate comparator
1104 lam %a0,%a15,__LC_AREGS_SAVE_AREA-4095(%r1) # validate acrs
1105 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# validate gprs
1106 lg %r12,__LC_CURRENT
1107 lmg %r8,%r9,__LC_MCK_OLD_PSW
1108 TSTMSK __LC_MCCK_CODE,MCCK_CODE_SYSTEM_DAMAGE
1109 jo .Lmcck_panic # yes -> rest of mcck code invalid
1110 TSTMSK __LC_MCCK_CODE,MCCK_CODE_CR_VALID
1111 jno .Lmcck_panic # control registers invalid -> panic
1113 lctlg %c0,%c15,__LC_CREGS_SAVE_AREA-4095(%r14) # validate ctl regs
1115 lg %r11,__LC_MCESAD-4095(%r14) # extended machine check save area
1116 nill %r11,0xfc00 # MCESA_ORIGIN_MASK
1117 TSTMSK __LC_CREGS_SAVE_AREA+16-4095(%r14),CR2_GUARDED_STORAGE
1119 TSTMSK __LC_MCCK_CODE,MCCK_CODE_GS_VALID
1121 .insn rxy,0xe3000000004d,0,__MCESA_GS_SAVE_AREA(%r11) # LGSC
1122 0: l %r14,__LC_FP_CREG_SAVE_AREA-4095(%r14)
1123 TSTMSK __LC_MCCK_CODE,MCCK_CODE_FC_VALID
1127 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX
1129 lghi %r14,__LC_FPREGS_SAVE_AREA
1147 0: VLM %v0,%v15,0,%r11
1148 VLM %v16,%v31,256,%r11
1149 1: lghi %r14,__LC_CPU_TIMER_SAVE_AREA
1150 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
1151 TSTMSK __LC_MCCK_CODE,MCCK_CODE_CPU_TIMER_VALID
1153 la %r14,__LC_SYNC_ENTER_TIMER
1154 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
1156 la %r14,__LC_ASYNC_ENTER_TIMER
1157 0: clc 0(8,%r14),__LC_EXIT_TIMER
1159 la %r14,__LC_EXIT_TIMER
1160 1: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
1162 la %r14,__LC_LAST_UPDATE_TIMER
1164 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
1165 3: TSTMSK __LC_MCCK_CODE,MCCK_CODE_PSW_MWP_VALID
1167 tmhh %r8,0x0001 # interrupting from user ?
1169 TSTMSK __LC_MCCK_CODE,MCCK_CODE_PSW_IA_VALID
1171 4: ssm __LC_PGM_NEW_PSW # turn dat on, keep irqs off
1172 SWITCH_ASYNC __LC_GPREGS_SAVE_AREA+64,__LC_MCCK_ENTER_TIMER,__LC_MCCK_CLOCK
1174 lghi %r14,__LC_GPREGS_SAVE_AREA+64
1175 stmg %r0,%r7,__PT_R0(%r11)
1176 # clear user controlled registers to prevent speculative use
1186 mvc __PT_R8(64,%r11),0(%r14)
1187 stmg %r8,%r9,__PT_PSW(%r11)
1189 mvc __PT_CR1(8,%r11),__LC_CREGS_SAVE_AREA-4095+8(%r14)
1190 lctlg %c1,%c1,__LC_KERNEL_ASCE
1191 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
1192 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
1193 lgr %r2,%r11 # pass pointer to pt_regs
1194 brasl %r14,s390_do_machine_check
1197 lg %r1,__LC_KERNEL_STACK # switch to kernel stack
1198 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
1199 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
1200 la %r11,STACK_FRAME_OVERHEAD(%r1)
1203 brasl %r14,s390_handle_mcck
1206 lctlg %c1,%c1,__PT_CR1(%r11)
1207 lmg %r0,%r10,__PT_R0(%r11)
1208 mvc __LC_RETURN_MCCK_PSW(16),__PT_PSW(%r11) # move return PSW
1209 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
1211 BPEXIT __TI_flags(%r12),_TIF_ISOLATE_BP
1212 stpt __LC_EXIT_TIMER
1213 0: lmg %r11,%r15,__PT_R11(%r11)
1214 b __LC_RETURN_MCCK_LPSWE
1217 lg %r15,__LC_NODAT_STACK
1218 la %r11,STACK_FRAME_OVERHEAD(%r15)
1220 ENDPROC(mcck_int_handler)
1223 # PSW restart interrupt handler
1225 ENTRY(restart_int_handler)
1226 ALTERNATIVE "", ".insn s,0xb2800000,_LPP_OFFSET", 40
1227 stg %r15,__LC_SAVE_AREA_RESTART
1228 lg %r15,__LC_RESTART_STACK
1229 xc STACK_FRAME_OVERHEAD(__PT_SIZE,%r15),STACK_FRAME_OVERHEAD(%r15)
1230 stmg %r0,%r14,STACK_FRAME_OVERHEAD+__PT_R0(%r15)
1231 mvc STACK_FRAME_OVERHEAD+__PT_R15(8,%r15),__LC_SAVE_AREA_RESTART
1232 mvc STACK_FRAME_OVERHEAD+__PT_PSW(16,%r15),__LC_RST_OLD_PSW
1233 xc 0(STACK_FRAME_OVERHEAD,%r15),0(%r15)
1234 lg %r1,__LC_RESTART_FN # load fn, parm & source cpu
1235 lg %r2,__LC_RESTART_DATA
1236 lg %r3,__LC_RESTART_SOURCE
1237 ltgr %r3,%r3 # test source cpu address
1238 jm 1f # negative -> skip source stop
1239 0: sigp %r4,%r3,SIGP_SENSE # sigp sense to source cpu
1240 brc 10,0b # wait for status stored
1241 1: basr %r14,%r1 # call function
1242 stap __SF_EMPTY(%r15) # store cpu address
1243 llgh %r3,__SF_EMPTY(%r15)
1244 2: sigp %r4,%r3,SIGP_STOP # sigp stop to current cpu
1247 ENDPROC(restart_int_handler)
1249 .section .kprobes.text, "ax"
1251 #if defined(CONFIG_CHECK_STACK) || defined(CONFIG_VMAP_STACK)
1253 * The synchronous or the asynchronous stack overflowed. We are dead.
1254 * No need to properly save the registers, we are going to panic anyway.
1255 * Setup a pt_regs so that show_trace can provide a good call trace.
1257 ENTRY(stack_overflow)
1258 lg %r15,__LC_NODAT_STACK # change to panic stack
1259 la %r11,STACK_FRAME_OVERHEAD(%r15)
1260 stmg %r0,%r7,__PT_R0(%r11)
1261 stmg %r8,%r9,__PT_PSW(%r11)
1262 mvc __PT_R8(64,%r11),0(%r14)
1263 stg %r10,__PT_ORIG_GPR2(%r11) # store last break to orig_gpr2
1264 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
1265 lgr %r2,%r11 # pass pointer to pt_regs
1266 jg kernel_stack_overflow
1267 ENDPROC(stack_overflow)
1270 #if IS_ENABLED(CONFIG_KVM)
1272 cghi %r11,__LC_SAVE_AREA_ASYNC #Is this in normal interrupt?
1274 larl %r13,.Lsie_entry
1276 larl %r13,.Lsie_skip
1279 oi __LC_CPU_FLAGS+7, _CIF_MCCK_GUEST
1280 1: BPENTER __SF_SIE_FLAGS(%r15),(_TIF_ISOLATE_BP|_TIF_ISOLATE_BP_GUEST)
1281 lg %r9,__SF_SIE_CONTROL(%r15) # get control block pointer
1282 ni __SIE_PROG0C+3(%r9),0xfe # no longer in SIE
1283 lctlg %c1,%c1,__LC_KERNEL_ASCE
1284 larl %r9,sie_exit # skip forward to sie_exit
1288 .section .rodata, "a"
1289 #define SYSCALL(esame,emu) .quad __s390x_ ## esame
1290 .globl sys_call_table
1292 #include "asm/syscall_table.h"
1295 #ifdef CONFIG_COMPAT
1297 #define SYSCALL(esame,emu) .quad __s390_ ## emu
1298 .globl sys_call_table_emu
1300 #include "asm/syscall_table.h"