]> git.proxmox.com Git - mirror_ubuntu-eoan-kernel.git/blob - arch/s390/kernel/entry.S
RealView: Select CPU_V6 for MACH_REALVIEW_PB11MP
[mirror_ubuntu-eoan-kernel.git] / arch / s390 / kernel / entry.S
1 /*
2 * arch/s390/kernel/entry.S
3 * S390 low-level entry points.
4 *
5 * Copyright (C) IBM Corp. 1999,2006
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 * Hartmut Penner (hp@de.ibm.com),
8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
9 * Heiko Carstens <heiko.carstens@de.ibm.com>
10 */
11
12 #include <linux/sys.h>
13 #include <linux/linkage.h>
14 #include <linux/init.h>
15 #include <asm/cache.h>
16 #include <asm/lowcore.h>
17 #include <asm/errno.h>
18 #include <asm/ptrace.h>
19 #include <asm/thread_info.h>
20 #include <asm/asm-offsets.h>
21 #include <asm/unistd.h>
22 #include <asm/page.h>
23
24 /*
25 * Stack layout for the system_call stack entry.
26 * The first few entries are identical to the user_regs_struct.
27 */
28 SP_PTREGS = STACK_FRAME_OVERHEAD
29 SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS
30 SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW
31 SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS
32 SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 4
33 SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8
34 SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 12
35 SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16
36 SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 20
37 SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24
38 SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 28
39 SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32
40 SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 36
41 SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40
42 SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 44
43 SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48
44 SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 52
45 SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56
46 SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 60
47 SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2
48 SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC
49 SP_TRAP = STACK_FRAME_OVERHEAD + __PT_TRAP
50 SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE
51
52 _TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
53 _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP )
54 _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
55 _TIF_MCCK_PENDING)
56
57 STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
58 STACK_SIZE = 1 << STACK_SHIFT
59
60 #define BASED(name) name-system_call(%r13)
61
62 #ifdef CONFIG_TRACE_IRQFLAGS
63 .macro TRACE_IRQS_ON
64 l %r1,BASED(.Ltrace_irq_on)
65 basr %r14,%r1
66 .endm
67
68 .macro TRACE_IRQS_OFF
69 l %r1,BASED(.Ltrace_irq_off)
70 basr %r14,%r1
71 .endm
72
73 .macro TRACE_IRQS_CHECK
74 tm SP_PSW(%r15),0x03 # irqs enabled?
75 jz 0f
76 l %r1,BASED(.Ltrace_irq_on)
77 basr %r14,%r1
78 j 1f
79 0: l %r1,BASED(.Ltrace_irq_off)
80 basr %r14,%r1
81 1:
82 .endm
83 #else
84 #define TRACE_IRQS_ON
85 #define TRACE_IRQS_OFF
86 #define TRACE_IRQS_CHECK
87 #endif
88
89 #ifdef CONFIG_LOCKDEP
90 .macro LOCKDEP_SYS_EXIT
91 tm SP_PSW+1(%r15),0x01 # returning to user ?
92 jz 0f
93 l %r1,BASED(.Llockdep_sys_exit)
94 basr %r14,%r1
95 0:
96 .endm
97 #else
98 #define LOCKDEP_SYS_EXIT
99 #endif
100
101 /*
102 * Register usage in interrupt handlers:
103 * R9 - pointer to current task structure
104 * R13 - pointer to literal pool
105 * R14 - return register for function calls
106 * R15 - kernel stack pointer
107 */
108
109 .macro STORE_TIMER lc_offset
110 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
111 stpt \lc_offset
112 #endif
113 .endm
114
115 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
116 .macro UPDATE_VTIME lc_from,lc_to,lc_sum
117 lm %r10,%r11,\lc_from
118 sl %r10,\lc_to
119 sl %r11,\lc_to+4
120 bc 3,BASED(0f)
121 sl %r10,BASED(.Lc_1)
122 0: al %r10,\lc_sum
123 al %r11,\lc_sum+4
124 bc 12,BASED(1f)
125 al %r10,BASED(.Lc_1)
126 1: stm %r10,%r11,\lc_sum
127 .endm
128 #endif
129
130 .macro SAVE_ALL_BASE savearea
131 stm %r12,%r15,\savearea
132 l %r13,__LC_SVC_NEW_PSW+4 # load &system_call to %r13
133 .endm
134
135 .macro SAVE_ALL_SVC psworg,savearea
136 la %r12,\psworg
137 l %r15,__LC_KERNEL_STACK # problem state -> load ksp
138 .endm
139
140 .macro SAVE_ALL_SYNC psworg,savearea
141 la %r12,\psworg
142 tm \psworg+1,0x01 # test problem state bit
143 bz BASED(2f) # skip stack setup save
144 l %r15,__LC_KERNEL_STACK # problem state -> load ksp
145 #ifdef CONFIG_CHECK_STACK
146 b BASED(3f)
147 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
148 bz BASED(stack_overflow)
149 3:
150 #endif
151 2:
152 .endm
153
154 .macro SAVE_ALL_ASYNC psworg,savearea
155 la %r12,\psworg
156 tm \psworg+1,0x01 # test problem state bit
157 bnz BASED(1f) # from user -> load async stack
158 clc \psworg+4(4),BASED(.Lcritical_end)
159 bhe BASED(0f)
160 clc \psworg+4(4),BASED(.Lcritical_start)
161 bl BASED(0f)
162 l %r14,BASED(.Lcleanup_critical)
163 basr %r14,%r14
164 tm 1(%r12),0x01 # retest problem state after cleanup
165 bnz BASED(1f)
166 0: l %r14,__LC_ASYNC_STACK # are we already on the async stack ?
167 slr %r14,%r15
168 sra %r14,STACK_SHIFT
169 be BASED(2f)
170 1: l %r15,__LC_ASYNC_STACK
171 #ifdef CONFIG_CHECK_STACK
172 b BASED(3f)
173 2: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
174 bz BASED(stack_overflow)
175 3:
176 #endif
177 2:
178 .endm
179
180 .macro CREATE_STACK_FRAME psworg,savearea
181 s %r15,BASED(.Lc_spsize) # make room for registers & psw
182 mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack
183 la %r12,\psworg
184 st %r2,SP_ORIG_R2(%r15) # store original content of gpr 2
185 icm %r12,12,__LC_SVC_ILC
186 stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
187 st %r12,SP_ILC(%r15)
188 mvc SP_R12(16,%r15),\savearea # move %r12-%r15 to stack
189 la %r12,0
190 st %r12,__SF_BACKCHAIN(%r15) # clear back chain
191 .endm
192
193 .macro RESTORE_ALL psworg,sync
194 mvc \psworg(8),SP_PSW(%r15) # move user PSW to lowcore
195 .if !\sync
196 ni \psworg+1,0xfd # clear wait state bit
197 .endif
198 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user
199 STORE_TIMER __LC_EXIT_TIMER
200 lpsw \psworg # back to caller
201 .endm
202
203 /*
204 * Scheduler resume function, called by switch_to
205 * gpr2 = (task_struct *) prev
206 * gpr3 = (task_struct *) next
207 * Returns:
208 * gpr2 = prev
209 */
210 .globl __switch_to
211 __switch_to:
212 basr %r1,0
213 __switch_to_base:
214 tm __THREAD_per(%r3),0xe8 # new process is using per ?
215 bz __switch_to_noper-__switch_to_base(%r1) # if not we're fine
216 stctl %c9,%c11,__SF_EMPTY(%r15) # We are using per stuff
217 clc __THREAD_per(12,%r3),__SF_EMPTY(%r15)
218 be __switch_to_noper-__switch_to_base(%r1) # we got away w/o bashing TLB's
219 lctl %c9,%c11,__THREAD_per(%r3) # Nope we didn't
220 __switch_to_noper:
221 l %r4,__THREAD_info(%r2) # get thread_info of prev
222 tm __TI_flags+3(%r4),_TIF_MCCK_PENDING # machine check pending?
223 bz __switch_to_no_mcck-__switch_to_base(%r1)
224 ni __TI_flags+3(%r4),255-_TIF_MCCK_PENDING # clear flag in prev
225 l %r4,__THREAD_info(%r3) # get thread_info of next
226 oi __TI_flags+3(%r4),_TIF_MCCK_PENDING # set it in next
227 __switch_to_no_mcck:
228 stm %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task
229 st %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp
230 l %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp
231 lm %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task
232 st %r3,__LC_CURRENT # __LC_CURRENT = current task struct
233 lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
234 l %r3,__THREAD_info(%r3) # load thread_info from task struct
235 st %r3,__LC_THREAD_INFO
236 ahi %r3,STACK_SIZE
237 st %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack
238 br %r14
239
240 __critical_start:
241 /*
242 * SVC interrupt handler routine. System calls are synchronous events and
243 * are executed with interrupts enabled.
244 */
245
246 .globl system_call
247 system_call:
248 STORE_TIMER __LC_SYNC_ENTER_TIMER
249 sysc_saveall:
250 SAVE_ALL_BASE __LC_SAVE_AREA
251 SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
252 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
253 lh %r7,0x8a # get svc number from lowcore
254 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
255 sysc_vtime:
256 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
257 sysc_stime:
258 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
259 sysc_update:
260 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
261 #endif
262 sysc_do_svc:
263 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
264 sla %r7,2 # *4 and test for svc 0
265 bnz BASED(sysc_nr_ok) # svc number > 0
266 # svc 0: system call number in %r1
267 cl %r1,BASED(.Lnr_syscalls)
268 bnl BASED(sysc_nr_ok)
269 lr %r7,%r1 # copy svc number to %r7
270 sla %r7,2 # *4
271 sysc_nr_ok:
272 mvc SP_ARGS(4,%r15),SP_R7(%r15)
273 sysc_do_restart:
274 l %r8,BASED(.Lsysc_table)
275 tm __TI_flags+3(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
276 l %r8,0(%r7,%r8) # get system call addr.
277 bnz BASED(sysc_tracesys)
278 basr %r14,%r8 # call sys_xxxx
279 st %r2,SP_R2(%r15) # store return value (change R2 on stack)
280
281 sysc_return:
282 tm __TI_flags+3(%r9),_TIF_WORK_SVC
283 bnz BASED(sysc_work) # there is work to do (signals etc.)
284 sysc_restore:
285 #ifdef CONFIG_TRACE_IRQFLAGS
286 la %r1,BASED(sysc_restore_trace_psw)
287 lpsw 0(%r1)
288 sysc_restore_trace:
289 TRACE_IRQS_CHECK
290 LOCKDEP_SYS_EXIT
291 #endif
292 sysc_leave:
293 RESTORE_ALL __LC_RETURN_PSW,1
294 sysc_done:
295
296 #ifdef CONFIG_TRACE_IRQFLAGS
297 .align 8
298 .globl sysc_restore_trace_psw
299 sysc_restore_trace_psw:
300 .long 0, sysc_restore_trace + 0x80000000
301 #endif
302
303 #
304 # recheck if there is more work to do
305 #
306 sysc_work_loop:
307 tm __TI_flags+3(%r9),_TIF_WORK_SVC
308 bz BASED(sysc_restore) # there is no work to do
309 #
310 # One of the work bits is on. Find out which one.
311 #
312 sysc_work:
313 tm SP_PSW+1(%r15),0x01 # returning to user ?
314 bno BASED(sysc_restore)
315 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING
316 bo BASED(sysc_mcck_pending)
317 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
318 bo BASED(sysc_reschedule)
319 tm __TI_flags+3(%r9),_TIF_SIGPENDING
320 bnz BASED(sysc_sigpending)
321 tm __TI_flags+3(%r9),_TIF_NOTIFY_RESUME
322 bnz BASED(sysc_notify_resume)
323 tm __TI_flags+3(%r9),_TIF_RESTART_SVC
324 bo BASED(sysc_restart)
325 tm __TI_flags+3(%r9),_TIF_SINGLE_STEP
326 bo BASED(sysc_singlestep)
327 b BASED(sysc_restore)
328 sysc_work_done:
329
330 #
331 # _TIF_NEED_RESCHED is set, call schedule
332 #
333 sysc_reschedule:
334 l %r1,BASED(.Lschedule)
335 la %r14,BASED(sysc_work_loop)
336 br %r1 # call scheduler
337
338 #
339 # _TIF_MCCK_PENDING is set, call handler
340 #
341 sysc_mcck_pending:
342 l %r1,BASED(.Ls390_handle_mcck)
343 la %r14,BASED(sysc_work_loop)
344 br %r1 # TIF bit will be cleared by handler
345
346 #
347 # _TIF_SIGPENDING is set, call do_signal
348 #
349 sysc_sigpending:
350 ni __TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
351 la %r2,SP_PTREGS(%r15) # load pt_regs
352 l %r1,BASED(.Ldo_signal)
353 basr %r14,%r1 # call do_signal
354 tm __TI_flags+3(%r9),_TIF_RESTART_SVC
355 bo BASED(sysc_restart)
356 tm __TI_flags+3(%r9),_TIF_SINGLE_STEP
357 bo BASED(sysc_singlestep)
358 b BASED(sysc_work_loop)
359
360 #
361 # _TIF_NOTIFY_RESUME is set, call do_notify_resume
362 #
363 sysc_notify_resume:
364 la %r2,SP_PTREGS(%r15) # load pt_regs
365 l %r1,BASED(.Ldo_notify_resume)
366 la %r14,BASED(sysc_work_loop)
367 br %r1 # call do_notify_resume
368
369
370 #
371 # _TIF_RESTART_SVC is set, set up registers and restart svc
372 #
373 sysc_restart:
374 ni __TI_flags+3(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC
375 l %r7,SP_R2(%r15) # load new svc number
376 sla %r7,2
377 mvc SP_R2(4,%r15),SP_ORIG_R2(%r15) # restore first argument
378 lm %r2,%r6,SP_R2(%r15) # load svc arguments
379 b BASED(sysc_do_restart) # restart svc
380
381 #
382 # _TIF_SINGLE_STEP is set, call do_single_step
383 #
384 sysc_singlestep:
385 ni __TI_flags+3(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
386 mvi SP_TRAP+1(%r15),0x28 # set trap indication to pgm check
387 la %r2,SP_PTREGS(%r15) # address of register-save area
388 l %r1,BASED(.Lhandle_per) # load adr. of per handler
389 la %r14,BASED(sysc_return) # load adr. of system return
390 br %r1 # branch to do_single_step
391
392 #
393 # call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
394 # and after the system call
395 #
396 sysc_tracesys:
397 l %r1,BASED(.Ltrace_entry)
398 la %r2,SP_PTREGS(%r15) # load pt_regs
399 la %r3,0
400 srl %r7,2
401 st %r7,SP_R2(%r15)
402 basr %r14,%r1
403 cl %r2,BASED(.Lnr_syscalls)
404 bnl BASED(sysc_tracenogo)
405 l %r8,BASED(.Lsysc_table)
406 lr %r7,%r2
407 sll %r7,2 # *4
408 l %r8,0(%r7,%r8)
409 sysc_tracego:
410 lm %r3,%r6,SP_R3(%r15)
411 l %r2,SP_ORIG_R2(%r15)
412 basr %r14,%r8 # call sys_xxx
413 st %r2,SP_R2(%r15) # store return value
414 sysc_tracenogo:
415 tm __TI_flags+3(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
416 bz BASED(sysc_return)
417 l %r1,BASED(.Ltrace_exit)
418 la %r2,SP_PTREGS(%r15) # load pt_regs
419 la %r14,BASED(sysc_return)
420 br %r1
421
422 #
423 # a new process exits the kernel with ret_from_fork
424 #
425 .globl ret_from_fork
426 ret_from_fork:
427 l %r13,__LC_SVC_NEW_PSW+4
428 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
429 tm SP_PSW+1(%r15),0x01 # forking a kernel thread ?
430 bo BASED(0f)
431 st %r15,SP_R15(%r15) # store stack pointer for new kthread
432 0: l %r1,BASED(.Lschedtail)
433 basr %r14,%r1
434 TRACE_IRQS_ON
435 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
436 b BASED(sysc_return)
437
438 #
439 # kernel_execve function needs to deal with pt_regs that is not
440 # at the usual place
441 #
442 .globl kernel_execve
443 kernel_execve:
444 stm %r12,%r15,48(%r15)
445 lr %r14,%r15
446 l %r13,__LC_SVC_NEW_PSW+4
447 s %r15,BASED(.Lc_spsize)
448 st %r14,__SF_BACKCHAIN(%r15)
449 la %r12,SP_PTREGS(%r15)
450 xc 0(__PT_SIZE,%r12),0(%r12)
451 l %r1,BASED(.Ldo_execve)
452 lr %r5,%r12
453 basr %r14,%r1
454 ltr %r2,%r2
455 be BASED(0f)
456 a %r15,BASED(.Lc_spsize)
457 lm %r12,%r15,48(%r15)
458 br %r14
459 # execve succeeded.
460 0: stnsm __SF_EMPTY(%r15),0xfc # disable interrupts
461 l %r15,__LC_KERNEL_STACK # load ksp
462 s %r15,BASED(.Lc_spsize) # make room for registers & psw
463 l %r9,__LC_THREAD_INFO
464 mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs
465 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15)
466 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
467 l %r1,BASED(.Lexecve_tail)
468 basr %r14,%r1
469 b BASED(sysc_return)
470
471 /*
472 * Program check handler routine
473 */
474
475 .globl pgm_check_handler
476 pgm_check_handler:
477 /*
478 * First we need to check for a special case:
479 * Single stepping an instruction that disables the PER event mask will
480 * cause a PER event AFTER the mask has been set. Example: SVC or LPSW.
481 * For a single stepped SVC the program check handler gets control after
482 * the SVC new PSW has been loaded. But we want to execute the SVC first and
483 * then handle the PER event. Therefore we update the SVC old PSW to point
484 * to the pgm_check_handler and branch to the SVC handler after we checked
485 * if we have to load the kernel stack register.
486 * For every other possible cause for PER event without the PER mask set
487 * we just ignore the PER event (FIXME: is there anything we have to do
488 * for LPSW?).
489 */
490 STORE_TIMER __LC_SYNC_ENTER_TIMER
491 SAVE_ALL_BASE __LC_SAVE_AREA
492 tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
493 bnz BASED(pgm_per) # got per exception -> special case
494 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
495 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
496 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
497 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
498 bz BASED(pgm_no_vtime)
499 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
500 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
501 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
502 pgm_no_vtime:
503 #endif
504 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
505 TRACE_IRQS_OFF
506 l %r3,__LC_PGM_ILC # load program interruption code
507 la %r8,0x7f
508 nr %r8,%r3
509 pgm_do_call:
510 l %r7,BASED(.Ljump_table)
511 sll %r8,2
512 l %r7,0(%r8,%r7) # load address of handler routine
513 la %r2,SP_PTREGS(%r15) # address of register-save area
514 la %r14,BASED(sysc_return)
515 br %r7 # branch to interrupt-handler
516
517 #
518 # handle per exception
519 #
520 pgm_per:
521 tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on
522 bnz BASED(pgm_per_std) # ok, normal per event from user space
523 # ok its one of the special cases, now we need to find out which one
524 clc __LC_PGM_OLD_PSW(8),__LC_SVC_NEW_PSW
525 be BASED(pgm_svcper)
526 # no interesting special case, ignore PER event
527 lm %r12,%r15,__LC_SAVE_AREA
528 lpsw 0x28
529
530 #
531 # Normal per exception
532 #
533 pgm_per_std:
534 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
535 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
536 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
537 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
538 bz BASED(pgm_no_vtime2)
539 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
540 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
541 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
542 pgm_no_vtime2:
543 #endif
544 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
545 TRACE_IRQS_OFF
546 l %r1,__TI_task(%r9)
547 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
548 mvc __THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS
549 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
550 oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
551 tm SP_PSW+1(%r15),0x01 # kernel per event ?
552 bz BASED(kernel_per)
553 l %r3,__LC_PGM_ILC # load program interruption code
554 la %r8,0x7f
555 nr %r8,%r3 # clear per-event-bit and ilc
556 be BASED(sysc_return) # only per or per+check ?
557 b BASED(pgm_do_call)
558
559 #
560 # it was a single stepped SVC that is causing all the trouble
561 #
562 pgm_svcper:
563 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
564 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
565 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
566 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
567 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
568 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
569 #endif
570 lh %r7,0x8a # get svc number from lowcore
571 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
572 TRACE_IRQS_OFF
573 l %r1,__TI_task(%r9)
574 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
575 mvc __THREAD_per+__PER_address(4,%r1),__LC_PER_ADDRESS
576 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
577 oi __TI_flags+3(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
578 TRACE_IRQS_ON
579 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
580 b BASED(sysc_do_svc)
581
582 #
583 # per was called from kernel, must be kprobes
584 #
585 kernel_per:
586 mvi SP_TRAP+1(%r15),0x28 # set trap indication to pgm check
587 la %r2,SP_PTREGS(%r15) # address of register-save area
588 l %r1,BASED(.Lhandle_per) # load adr. of per handler
589 la %r14,BASED(sysc_restore)# load adr. of system return
590 br %r1 # branch to do_single_step
591
592 /*
593 * IO interrupt handler routine
594 */
595
596 .globl io_int_handler
597 io_int_handler:
598 STORE_TIMER __LC_ASYNC_ENTER_TIMER
599 stck __LC_INT_CLOCK
600 SAVE_ALL_BASE __LC_SAVE_AREA+16
601 SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+16
602 CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+16
603 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
604 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
605 bz BASED(io_no_vtime)
606 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
607 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
608 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
609 io_no_vtime:
610 #endif
611 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
612 TRACE_IRQS_OFF
613 l %r1,BASED(.Ldo_IRQ) # load address of do_IRQ
614 la %r2,SP_PTREGS(%r15) # address of register-save area
615 basr %r14,%r1 # branch to standard irq handler
616 io_return:
617 tm __TI_flags+3(%r9),_TIF_WORK_INT
618 bnz BASED(io_work) # there is work to do (signals etc.)
619 io_restore:
620 #ifdef CONFIG_TRACE_IRQFLAGS
621 la %r1,BASED(io_restore_trace_psw)
622 lpsw 0(%r1)
623 io_restore_trace:
624 TRACE_IRQS_CHECK
625 LOCKDEP_SYS_EXIT
626 #endif
627 io_leave:
628 RESTORE_ALL __LC_RETURN_PSW,0
629 io_done:
630
631 #ifdef CONFIG_TRACE_IRQFLAGS
632 .align 8
633 .globl io_restore_trace_psw
634 io_restore_trace_psw:
635 .long 0, io_restore_trace + 0x80000000
636 #endif
637
638 #
639 # switch to kernel stack, then check the TIF bits
640 #
641 io_work:
642 tm SP_PSW+1(%r15),0x01 # returning to user ?
643 #ifndef CONFIG_PREEMPT
644 bno BASED(io_restore) # no-> skip resched & signal
645 #else
646 bnz BASED(io_work_user) # no -> check for preemptive scheduling
647 # check for preemptive scheduling
648 icm %r0,15,__TI_precount(%r9)
649 bnz BASED(io_restore) # preemption disabled
650 l %r1,SP_R15(%r15)
651 s %r1,BASED(.Lc_spsize)
652 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
653 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
654 lr %r15,%r1
655 io_resume_loop:
656 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
657 bno BASED(io_restore)
658 l %r1,BASED(.Lpreempt_schedule_irq)
659 la %r14,BASED(io_resume_loop)
660 br %r1 # call schedule
661 #endif
662
663 io_work_user:
664 l %r1,__LC_KERNEL_STACK
665 s %r1,BASED(.Lc_spsize)
666 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
667 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
668 lr %r15,%r1
669 #
670 # One of the work bits is on. Find out which one.
671 # Checked are: _TIF_SIGPENDING, _TIF_NEED_RESCHED
672 # and _TIF_MCCK_PENDING
673 #
674 io_work_loop:
675 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING
676 bo BASED(io_mcck_pending)
677 tm __TI_flags+3(%r9),_TIF_NEED_RESCHED
678 bo BASED(io_reschedule)
679 tm __TI_flags+3(%r9),_TIF_SIGPENDING
680 bnz BASED(io_sigpending)
681 tm __TI_flags+3(%r9),_TIF_NOTIFY_RESUME
682 bnz BASED(io_notify_resume)
683 b BASED(io_restore)
684 io_work_done:
685
686 #
687 # _TIF_MCCK_PENDING is set, call handler
688 #
689 io_mcck_pending:
690 l %r1,BASED(.Ls390_handle_mcck)
691 basr %r14,%r1 # TIF bit will be cleared by handler
692 b BASED(io_work_loop)
693
694 #
695 # _TIF_NEED_RESCHED is set, call schedule
696 #
697 io_reschedule:
698 TRACE_IRQS_ON
699 l %r1,BASED(.Lschedule)
700 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
701 basr %r14,%r1 # call scheduler
702 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
703 TRACE_IRQS_OFF
704 tm __TI_flags+3(%r9),_TIF_WORK_INT
705 bz BASED(io_restore) # there is no work to do
706 b BASED(io_work_loop)
707
708 #
709 # _TIF_SIGPENDING is set, call do_signal
710 #
711 io_sigpending:
712 TRACE_IRQS_ON
713 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
714 la %r2,SP_PTREGS(%r15) # load pt_regs
715 l %r1,BASED(.Ldo_signal)
716 basr %r14,%r1 # call do_signal
717 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
718 TRACE_IRQS_OFF
719 b BASED(io_work_loop)
720
721 #
722 # _TIF_SIGPENDING is set, call do_signal
723 #
724 io_notify_resume:
725 TRACE_IRQS_ON
726 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
727 la %r2,SP_PTREGS(%r15) # load pt_regs
728 l %r1,BASED(.Ldo_notify_resume)
729 basr %r14,%r1 # call do_signal
730 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
731 TRACE_IRQS_OFF
732 b BASED(io_work_loop)
733
734 /*
735 * External interrupt handler routine
736 */
737
738 .globl ext_int_handler
739 ext_int_handler:
740 STORE_TIMER __LC_ASYNC_ENTER_TIMER
741 stck __LC_INT_CLOCK
742 SAVE_ALL_BASE __LC_SAVE_AREA+16
743 SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16
744 CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+16
745 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
746 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
747 bz BASED(ext_no_vtime)
748 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
749 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
750 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
751 ext_no_vtime:
752 #endif
753 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
754 TRACE_IRQS_OFF
755 la %r2,SP_PTREGS(%r15) # address of register-save area
756 lh %r3,__LC_EXT_INT_CODE # get interruption code
757 l %r1,BASED(.Ldo_extint)
758 basr %r14,%r1
759 b BASED(io_return)
760
761 __critical_end:
762
763 /*
764 * Machine check handler routines
765 */
766
767 .globl mcck_int_handler
768 mcck_int_handler:
769 spt __LC_CPU_TIMER_SAVE_AREA # revalidate cpu timer
770 lm %r0,%r15,__LC_GPREGS_SAVE_AREA # revalidate gprs
771 SAVE_ALL_BASE __LC_SAVE_AREA+32
772 la %r12,__LC_MCK_OLD_PSW
773 tm __LC_MCCK_CODE,0x80 # system damage?
774 bo BASED(mcck_int_main) # yes -> rest of mcck code invalid
775 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
776 mvc __LC_SAVE_AREA+52(8),__LC_ASYNC_ENTER_TIMER
777 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA
778 tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid?
779 bo BASED(1f)
780 la %r14,__LC_SYNC_ENTER_TIMER
781 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
782 bl BASED(0f)
783 la %r14,__LC_ASYNC_ENTER_TIMER
784 0: clc 0(8,%r14),__LC_EXIT_TIMER
785 bl BASED(0f)
786 la %r14,__LC_EXIT_TIMER
787 0: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
788 bl BASED(0f)
789 la %r14,__LC_LAST_UPDATE_TIMER
790 0: spt 0(%r14)
791 mvc __LC_ASYNC_ENTER_TIMER(8),0(%r14)
792 1:
793 #endif
794 tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
795 bno BASED(mcck_int_main) # no -> skip cleanup critical
796 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit
797 bnz BASED(mcck_int_main) # from user -> load async stack
798 clc __LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_end)
799 bhe BASED(mcck_int_main)
800 clc __LC_MCK_OLD_PSW+4(4),BASED(.Lcritical_start)
801 bl BASED(mcck_int_main)
802 l %r14,BASED(.Lcleanup_critical)
803 basr %r14,%r14
804 mcck_int_main:
805 l %r14,__LC_PANIC_STACK # are we already on the panic stack?
806 slr %r14,%r15
807 sra %r14,PAGE_SHIFT
808 be BASED(0f)
809 l %r15,__LC_PANIC_STACK # load panic stack
810 0: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+32
811 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
812 tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid?
813 bno BASED(mcck_no_vtime) # no -> skip cleanup critical
814 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
815 bz BASED(mcck_no_vtime)
816 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
817 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
818 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
819 mcck_no_vtime:
820 #endif
821 l %r9,__LC_THREAD_INFO # load pointer to thread_info struct
822 la %r2,SP_PTREGS(%r15) # load pt_regs
823 l %r1,BASED(.Ls390_mcck)
824 basr %r14,%r1 # call machine check handler
825 tm SP_PSW+1(%r15),0x01 # returning to user ?
826 bno BASED(mcck_return)
827 l %r1,__LC_KERNEL_STACK # switch to kernel stack
828 s %r1,BASED(.Lc_spsize)
829 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
830 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1) # clear back chain
831 lr %r15,%r1
832 stosm __SF_EMPTY(%r15),0x04 # turn dat on
833 tm __TI_flags+3(%r9),_TIF_MCCK_PENDING
834 bno BASED(mcck_return)
835 TRACE_IRQS_OFF
836 l %r1,BASED(.Ls390_handle_mcck)
837 basr %r14,%r1 # call machine check handler
838 TRACE_IRQS_ON
839 mcck_return:
840 mvc __LC_RETURN_MCCK_PSW(8),SP_PSW(%r15) # move return PSW
841 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
842 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
843 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_SAVE_AREA+52
844 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
845 bno BASED(0f)
846 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15
847 stpt __LC_EXIT_TIMER
848 lpsw __LC_RETURN_MCCK_PSW # back to caller
849 0:
850 #endif
851 lm %r0,%r15,SP_R0(%r15) # load gprs 0-15
852 lpsw __LC_RETURN_MCCK_PSW # back to caller
853
854 RESTORE_ALL __LC_RETURN_MCCK_PSW,0
855
856 /*
857 * Restart interruption handler, kick starter for additional CPUs
858 */
859 #ifdef CONFIG_SMP
860 __CPUINIT
861 .globl restart_int_handler
862 restart_int_handler:
863 l %r15,__LC_SAVE_AREA+60 # load ksp
864 lctl %c0,%c15,__LC_CREGS_SAVE_AREA # get new ctl regs
865 lam %a0,%a15,__LC_AREGS_SAVE_AREA
866 lm %r6,%r15,__SF_GPRS(%r15) # load registers from clone
867 stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on
868 basr %r14,0
869 l %r14,restart_addr-.(%r14)
870 br %r14 # branch to start_secondary
871 restart_addr:
872 .long start_secondary
873 .previous
874 #else
875 /*
876 * If we do not run with SMP enabled, let the new CPU crash ...
877 */
878 .globl restart_int_handler
879 restart_int_handler:
880 basr %r1,0
881 restart_base:
882 lpsw restart_crash-restart_base(%r1)
883 .align 8
884 restart_crash:
885 .long 0x000a0000,0x00000000
886 restart_go:
887 #endif
888
889 #ifdef CONFIG_CHECK_STACK
890 /*
891 * The synchronous or the asynchronous stack overflowed. We are dead.
892 * No need to properly save the registers, we are going to panic anyway.
893 * Setup a pt_regs so that show_trace can provide a good call trace.
894 */
895 stack_overflow:
896 l %r15,__LC_PANIC_STACK # change to panic stack
897 sl %r15,BASED(.Lc_spsize)
898 mvc SP_PSW(8,%r15),0(%r12) # move user PSW to stack
899 stm %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
900 la %r1,__LC_SAVE_AREA
901 ch %r12,BASED(.L0x020) # old psw addr == __LC_SVC_OLD_PSW ?
902 be BASED(0f)
903 ch %r12,BASED(.L0x028) # old psw addr == __LC_PGM_OLD_PSW ?
904 be BASED(0f)
905 la %r1,__LC_SAVE_AREA+16
906 0: mvc SP_R12(16,%r15),0(%r1) # move %r12-%r15 to stack
907 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # clear back chain
908 l %r1,BASED(1f) # branch to kernel_stack_overflow
909 la %r2,SP_PTREGS(%r15) # load pt_regs
910 br %r1
911 1: .long kernel_stack_overflow
912 #endif
913
914 cleanup_table_system_call:
915 .long system_call + 0x80000000, sysc_do_svc + 0x80000000
916 cleanup_table_sysc_return:
917 .long sysc_return + 0x80000000, sysc_leave + 0x80000000
918 cleanup_table_sysc_leave:
919 .long sysc_leave + 0x80000000, sysc_done + 0x80000000
920 cleanup_table_sysc_work_loop:
921 .long sysc_work_loop + 0x80000000, sysc_work_done + 0x80000000
922 cleanup_table_io_return:
923 .long io_return + 0x80000000, io_leave + 0x80000000
924 cleanup_table_io_leave:
925 .long io_leave + 0x80000000, io_done + 0x80000000
926 cleanup_table_io_work_loop:
927 .long io_work_loop + 0x80000000, io_work_done + 0x80000000
928
929 cleanup_critical:
930 clc 4(4,%r12),BASED(cleanup_table_system_call)
931 bl BASED(0f)
932 clc 4(4,%r12),BASED(cleanup_table_system_call+4)
933 bl BASED(cleanup_system_call)
934 0:
935 clc 4(4,%r12),BASED(cleanup_table_sysc_return)
936 bl BASED(0f)
937 clc 4(4,%r12),BASED(cleanup_table_sysc_return+4)
938 bl BASED(cleanup_sysc_return)
939 0:
940 clc 4(4,%r12),BASED(cleanup_table_sysc_leave)
941 bl BASED(0f)
942 clc 4(4,%r12),BASED(cleanup_table_sysc_leave+4)
943 bl BASED(cleanup_sysc_leave)
944 0:
945 clc 4(4,%r12),BASED(cleanup_table_sysc_work_loop)
946 bl BASED(0f)
947 clc 4(4,%r12),BASED(cleanup_table_sysc_work_loop+4)
948 bl BASED(cleanup_sysc_return)
949 0:
950 clc 4(4,%r12),BASED(cleanup_table_io_return)
951 bl BASED(0f)
952 clc 4(4,%r12),BASED(cleanup_table_io_return+4)
953 bl BASED(cleanup_io_return)
954 0:
955 clc 4(4,%r12),BASED(cleanup_table_io_leave)
956 bl BASED(0f)
957 clc 4(4,%r12),BASED(cleanup_table_io_leave+4)
958 bl BASED(cleanup_io_leave)
959 0:
960 clc 4(4,%r12),BASED(cleanup_table_io_work_loop)
961 bl BASED(0f)
962 clc 4(4,%r12),BASED(cleanup_table_io_work_loop+4)
963 bl BASED(cleanup_io_return)
964 0:
965 br %r14
966
967 cleanup_system_call:
968 mvc __LC_RETURN_PSW(8),0(%r12)
969 c %r12,BASED(.Lmck_old_psw)
970 be BASED(0f)
971 la %r12,__LC_SAVE_AREA+16
972 b BASED(1f)
973 0: la %r12,__LC_SAVE_AREA+32
974 1:
975 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
976 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+4)
977 bh BASED(0f)
978 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
979 0: clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+8)
980 bhe BASED(cleanup_vtime)
981 #endif
982 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn)
983 bh BASED(0f)
984 mvc __LC_SAVE_AREA(16),0(%r12)
985 0: st %r13,4(%r12)
986 st %r12,__LC_SAVE_AREA+48 # argh
987 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
988 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
989 l %r12,__LC_SAVE_AREA+48 # argh
990 st %r15,12(%r12)
991 lh %r7,0x8a
992 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
993 cleanup_vtime:
994 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+12)
995 bhe BASED(cleanup_stime)
996 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
997 cleanup_stime:
998 clc __LC_RETURN_PSW+4(4),BASED(cleanup_system_call_insn+16)
999 bh BASED(cleanup_update)
1000 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
1001 cleanup_update:
1002 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
1003 #endif
1004 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_system_call+4)
1005 la %r12,__LC_RETURN_PSW
1006 br %r14
1007 cleanup_system_call_insn:
1008 .long sysc_saveall + 0x80000000
1009 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
1010 .long system_call + 0x80000000
1011 .long sysc_vtime + 0x80000000
1012 .long sysc_stime + 0x80000000
1013 .long sysc_update + 0x80000000
1014 #endif
1015
1016 cleanup_sysc_return:
1017 mvc __LC_RETURN_PSW(4),0(%r12)
1018 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_sysc_return)
1019 la %r12,__LC_RETURN_PSW
1020 br %r14
1021
1022 cleanup_sysc_leave:
1023 clc 4(4,%r12),BASED(cleanup_sysc_leave_insn)
1024 be BASED(2f)
1025 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
1026 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
1027 clc 4(4,%r12),BASED(cleanup_sysc_leave_insn+4)
1028 be BASED(2f)
1029 #endif
1030 mvc __LC_RETURN_PSW(8),SP_PSW(%r15)
1031 c %r12,BASED(.Lmck_old_psw)
1032 bne BASED(0f)
1033 mvc __LC_SAVE_AREA+32(16),SP_R12(%r15)
1034 b BASED(1f)
1035 0: mvc __LC_SAVE_AREA+16(16),SP_R12(%r15)
1036 1: lm %r0,%r11,SP_R0(%r15)
1037 l %r15,SP_R15(%r15)
1038 2: la %r12,__LC_RETURN_PSW
1039 br %r14
1040 cleanup_sysc_leave_insn:
1041 .long sysc_done - 4 + 0x80000000
1042 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
1043 .long sysc_done - 8 + 0x80000000
1044 #endif
1045
1046 cleanup_io_return:
1047 mvc __LC_RETURN_PSW(4),0(%r12)
1048 mvc __LC_RETURN_PSW+4(4),BASED(cleanup_table_io_work_loop)
1049 la %r12,__LC_RETURN_PSW
1050 br %r14
1051
1052 cleanup_io_leave:
1053 clc 4(4,%r12),BASED(cleanup_io_leave_insn)
1054 be BASED(2f)
1055 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
1056 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
1057 clc 4(4,%r12),BASED(cleanup_io_leave_insn+4)
1058 be BASED(2f)
1059 #endif
1060 mvc __LC_RETURN_PSW(8),SP_PSW(%r15)
1061 c %r12,BASED(.Lmck_old_psw)
1062 bne BASED(0f)
1063 mvc __LC_SAVE_AREA+32(16),SP_R12(%r15)
1064 b BASED(1f)
1065 0: mvc __LC_SAVE_AREA+16(16),SP_R12(%r15)
1066 1: lm %r0,%r11,SP_R0(%r15)
1067 l %r15,SP_R15(%r15)
1068 2: la %r12,__LC_RETURN_PSW
1069 br %r14
1070 cleanup_io_leave_insn:
1071 .long io_done - 4 + 0x80000000
1072 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
1073 .long io_done - 8 + 0x80000000
1074 #endif
1075
1076 /*
1077 * Integer constants
1078 */
1079 .align 4
1080 .Lc_spsize: .long SP_SIZE
1081 .Lc_overhead: .long STACK_FRAME_OVERHEAD
1082 .Lnr_syscalls: .long NR_syscalls
1083 .L0x018: .short 0x018
1084 .L0x020: .short 0x020
1085 .L0x028: .short 0x028
1086 .L0x030: .short 0x030
1087 .L0x038: .short 0x038
1088 .Lc_1: .long 1
1089
1090 /*
1091 * Symbol constants
1092 */
1093 .Ls390_mcck: .long s390_do_machine_check
1094 .Ls390_handle_mcck:
1095 .long s390_handle_mcck
1096 .Lmck_old_psw: .long __LC_MCK_OLD_PSW
1097 .Ldo_IRQ: .long do_IRQ
1098 .Ldo_extint: .long do_extint
1099 .Ldo_signal: .long do_signal
1100 .Ldo_notify_resume:
1101 .long do_notify_resume
1102 .Lhandle_per: .long do_single_step
1103 .Ldo_execve: .long do_execve
1104 .Lexecve_tail: .long execve_tail
1105 .Ljump_table: .long pgm_check_table
1106 .Lschedule: .long schedule
1107 #ifdef CONFIG_PREEMPT
1108 .Lpreempt_schedule_irq:
1109 .long preempt_schedule_irq
1110 #endif
1111 .Ltrace_entry: .long do_syscall_trace_enter
1112 .Ltrace_exit: .long do_syscall_trace_exit
1113 .Lschedtail: .long schedule_tail
1114 .Lsysc_table: .long sys_call_table
1115 #ifdef CONFIG_TRACE_IRQFLAGS
1116 .Ltrace_irq_on: .long trace_hardirqs_on
1117 .Ltrace_irq_off:
1118 .long trace_hardirqs_off
1119 .Llockdep_sys_exit:
1120 .long lockdep_sys_exit
1121 #endif
1122 .Lcritical_start:
1123 .long __critical_start + 0x80000000
1124 .Lcritical_end:
1125 .long __critical_end + 0x80000000
1126 .Lcleanup_critical:
1127 .long cleanup_critical
1128
1129 .section .rodata, "a"
1130 #define SYSCALL(esa,esame,emu) .long esa
1131 sys_call_table:
1132 #include "syscalls.S"
1133 #undef SYSCALL