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[mirror_ubuntu-bionic-kernel.git] / arch / s390 / kernel / entry.S
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * S390 low-level entry points.
4 *
5 * Copyright IBM Corp. 1999, 2012
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 * Hartmut Penner (hp@de.ibm.com),
8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
9 * Heiko Carstens <heiko.carstens@de.ibm.com>
10 */
11
12 #include <linux/init.h>
13 #include <linux/linkage.h>
14 #include <asm/processor.h>
15 #include <asm/cache.h>
16 #include <asm/ctl_reg.h>
17 #include <asm/errno.h>
18 #include <asm/ptrace.h>
19 #include <asm/thread_info.h>
20 #include <asm/asm-offsets.h>
21 #include <asm/unistd.h>
22 #include <asm/page.h>
23 #include <asm/sigp.h>
24 #include <asm/irq.h>
25 #include <asm/vx-insn.h>
26 #include <asm/setup.h>
27 #include <asm/nmi.h>
28 #include <asm/export.h>
29
30 __PT_R0 = __PT_GPRS
31 __PT_R1 = __PT_GPRS + 8
32 __PT_R2 = __PT_GPRS + 16
33 __PT_R3 = __PT_GPRS + 24
34 __PT_R4 = __PT_GPRS + 32
35 __PT_R5 = __PT_GPRS + 40
36 __PT_R6 = __PT_GPRS + 48
37 __PT_R7 = __PT_GPRS + 56
38 __PT_R8 = __PT_GPRS + 64
39 __PT_R9 = __PT_GPRS + 72
40 __PT_R10 = __PT_GPRS + 80
41 __PT_R11 = __PT_GPRS + 88
42 __PT_R12 = __PT_GPRS + 96
43 __PT_R13 = __PT_GPRS + 104
44 __PT_R14 = __PT_GPRS + 112
45 __PT_R15 = __PT_GPRS + 120
46
47 STACK_SHIFT = PAGE_SHIFT + THREAD_SIZE_ORDER
48 STACK_SIZE = 1 << STACK_SHIFT
49 STACK_INIT = STACK_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE
50
51 _TIF_WORK = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
52 _TIF_UPROBE | _TIF_GUARDED_STORAGE | _TIF_PATCH_PENDING)
53 _TIF_TRACE = (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | _TIF_SECCOMP | \
54 _TIF_SYSCALL_TRACEPOINT)
55 _CIF_WORK = (_CIF_MCCK_PENDING | _CIF_ASCE_PRIMARY | \
56 _CIF_ASCE_SECONDARY | _CIF_FPU)
57 _PIF_WORK = (_PIF_PER_TRAP | _PIF_SYSCALL_RESTART)
58
59 #define BASED(name) name-cleanup_critical(%r13)
60
61 .macro TRACE_IRQS_ON
62 #ifdef CONFIG_TRACE_IRQFLAGS
63 basr %r2,%r0
64 brasl %r14,trace_hardirqs_on_caller
65 #endif
66 .endm
67
68 .macro TRACE_IRQS_OFF
69 #ifdef CONFIG_TRACE_IRQFLAGS
70 basr %r2,%r0
71 brasl %r14,trace_hardirqs_off_caller
72 #endif
73 .endm
74
75 .macro LOCKDEP_SYS_EXIT
76 #ifdef CONFIG_LOCKDEP
77 tm __PT_PSW+1(%r11),0x01 # returning to user ?
78 jz .+10
79 brasl %r14,lockdep_sys_exit
80 #endif
81 .endm
82
83 .macro CHECK_STACK stacksize,savearea
84 #ifdef CONFIG_CHECK_STACK
85 tml %r15,\stacksize - CONFIG_STACK_GUARD
86 lghi %r14,\savearea
87 jz stack_overflow
88 #endif
89 .endm
90
91 .macro SWITCH_ASYNC savearea,timer
92 tmhh %r8,0x0001 # interrupting from user ?
93 jnz 1f
94 lgr %r14,%r9
95 slg %r14,BASED(.Lcritical_start)
96 clg %r14,BASED(.Lcritical_length)
97 jhe 0f
98 lghi %r11,\savearea # inside critical section, do cleanup
99 brasl %r14,cleanup_critical
100 tmhh %r8,0x0001 # retest problem state after cleanup
101 jnz 1f
102 0: lg %r14,__LC_ASYNC_STACK # are we already on the async stack?
103 slgr %r14,%r15
104 srag %r14,%r14,STACK_SHIFT
105 jnz 2f
106 CHECK_STACK 1<<STACK_SHIFT,\savearea
107 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
108 j 3f
109 1: UPDATE_VTIME %r14,%r15,\timer
110 2: lg %r15,__LC_ASYNC_STACK # load async stack
111 3: la %r11,STACK_FRAME_OVERHEAD(%r15)
112 .endm
113
114 .macro UPDATE_VTIME w1,w2,enter_timer
115 lg \w1,__LC_EXIT_TIMER
116 lg \w2,__LC_LAST_UPDATE_TIMER
117 slg \w1,\enter_timer
118 slg \w2,__LC_EXIT_TIMER
119 alg \w1,__LC_USER_TIMER
120 alg \w2,__LC_SYSTEM_TIMER
121 stg \w1,__LC_USER_TIMER
122 stg \w2,__LC_SYSTEM_TIMER
123 mvc __LC_LAST_UPDATE_TIMER(8),\enter_timer
124 .endm
125
126 .macro REENABLE_IRQS
127 stg %r8,__LC_RETURN_PSW
128 ni __LC_RETURN_PSW,0xbf
129 ssm __LC_RETURN_PSW
130 .endm
131
132 .macro STCK savearea
133 #ifdef CONFIG_HAVE_MARCH_Z9_109_FEATURES
134 .insn s,0xb27c0000,\savearea # store clock fast
135 #else
136 .insn s,0xb2050000,\savearea # store clock
137 #endif
138 .endm
139
140 /*
141 * The TSTMSK macro generates a test-under-mask instruction by
142 * calculating the memory offset for the specified mask value.
143 * Mask value can be any constant. The macro shifts the mask
144 * value to calculate the memory offset for the test-under-mask
145 * instruction.
146 */
147 .macro TSTMSK addr, mask, size=8, bytepos=0
148 .if (\bytepos < \size) && (\mask >> 8)
149 .if (\mask & 0xff)
150 .error "Mask exceeds byte boundary"
151 .endif
152 TSTMSK \addr, "(\mask >> 8)", \size, "(\bytepos + 1)"
153 .exitm
154 .endif
155 .ifeq \mask
156 .error "Mask must not be zero"
157 .endif
158 off = \size - \bytepos - 1
159 tm off+\addr, \mask
160 .endm
161
162 .section .kprobes.text, "ax"
163 .Ldummy:
164 /*
165 * This nop exists only in order to avoid that __switch_to starts at
166 * the beginning of the kprobes text section. In that case we would
167 * have several symbols at the same address. E.g. objdump would take
168 * an arbitrary symbol name when disassembling this code.
169 * With the added nop in between the __switch_to symbol is unique
170 * again.
171 */
172 nop 0
173
174 /*
175 * Scheduler resume function, called by switch_to
176 * gpr2 = (task_struct *) prev
177 * gpr3 = (task_struct *) next
178 * Returns:
179 * gpr2 = prev
180 */
181 ENTRY(__switch_to)
182 stmg %r6,%r15,__SF_GPRS(%r15) # store gprs of prev task
183 lgr %r1,%r2
184 aghi %r1,__TASK_thread # thread_struct of prev task
185 lg %r5,__TASK_stack(%r3) # start of kernel stack of next
186 stg %r15,__THREAD_ksp(%r1) # store kernel stack of prev
187 lgr %r1,%r3
188 aghi %r1,__TASK_thread # thread_struct of next task
189 lgr %r15,%r5
190 aghi %r15,STACK_INIT # end of kernel stack of next
191 stg %r3,__LC_CURRENT # store task struct of next
192 stg %r15,__LC_KERNEL_STACK # store end of kernel stack
193 lg %r15,__THREAD_ksp(%r1) # load kernel stack of next
194 mvc __LC_CURRENT_PID(4,%r0),__TASK_pid(%r3) # store pid of next
195 lmg %r6,%r15,__SF_GPRS(%r15) # load gprs of next task
196 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP
197 bzr %r14
198 .insn s,0xb2800000,__LC_LPP # set program parameter
199 br %r14
200
201 .L__critical_start:
202
203 #if IS_ENABLED(CONFIG_KVM)
204 /*
205 * sie64a calling convention:
206 * %r2 pointer to sie control block
207 * %r3 guest register save area
208 */
209 ENTRY(sie64a)
210 stmg %r6,%r14,__SF_GPRS(%r15) # save kernel registers
211 stg %r2,__SF_EMPTY(%r15) # save control block pointer
212 stg %r3,__SF_EMPTY+8(%r15) # save guest register save area
213 xc __SF_EMPTY+16(8,%r15),__SF_EMPTY+16(%r15) # reason code = 0
214 TSTMSK __LC_CPU_FLAGS,_CIF_FPU # load guest fp/vx registers ?
215 jno .Lsie_load_guest_gprs
216 brasl %r14,load_fpu_regs # load guest fp/vx regs
217 .Lsie_load_guest_gprs:
218 lmg %r0,%r13,0(%r3) # load guest gprs 0-13
219 lg %r14,__LC_GMAP # get gmap pointer
220 ltgr %r14,%r14
221 jz .Lsie_gmap
222 lctlg %c1,%c1,__GMAP_ASCE(%r14) # load primary asce
223 .Lsie_gmap:
224 lg %r14,__SF_EMPTY(%r15) # get control block pointer
225 oi __SIE_PROG0C+3(%r14),1 # we are going into SIE now
226 tm __SIE_PROG20+3(%r14),3 # last exit...
227 jnz .Lsie_skip
228 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
229 jo .Lsie_skip # exit if fp/vx regs changed
230 .Lsie_entry:
231 sie 0(%r14)
232 .Lsie_skip:
233 ni __SIE_PROG0C+3(%r14),0xfe # no longer in SIE
234 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
235 .Lsie_done:
236 # some program checks are suppressing. C code (e.g. do_protection_exception)
237 # will rewind the PSW by the ILC, which is often 4 bytes in case of SIE. There
238 # are some corner cases (e.g. runtime instrumentation) where ILC is unpredictable.
239 # Other instructions between sie64a and .Lsie_done should not cause program
240 # interrupts. So lets use 3 nops as a landing pad for all possible rewinds.
241 # See also .Lcleanup_sie
242 .Lrewind_pad6:
243 nopr 7
244 .Lrewind_pad4:
245 nopr 7
246 .Lrewind_pad2:
247 nopr 7
248 .globl sie_exit
249 sie_exit:
250 lg %r14,__SF_EMPTY+8(%r15) # load guest register save area
251 stmg %r0,%r13,0(%r14) # save guest gprs 0-13
252 lmg %r6,%r14,__SF_GPRS(%r15) # restore kernel registers
253 lg %r2,__SF_EMPTY+16(%r15) # return exit reason code
254 br %r14
255 .Lsie_fault:
256 lghi %r14,-EFAULT
257 stg %r14,__SF_EMPTY+16(%r15) # set exit reason code
258 j sie_exit
259
260 EX_TABLE(.Lrewind_pad6,.Lsie_fault)
261 EX_TABLE(.Lrewind_pad4,.Lsie_fault)
262 EX_TABLE(.Lrewind_pad2,.Lsie_fault)
263 EX_TABLE(sie_exit,.Lsie_fault)
264 EXPORT_SYMBOL(sie64a)
265 EXPORT_SYMBOL(sie_exit)
266 #endif
267
268 /*
269 * SVC interrupt handler routine. System calls are synchronous events and
270 * are executed with interrupts enabled.
271 */
272
273 ENTRY(system_call)
274 stpt __LC_SYNC_ENTER_TIMER
275 .Lsysc_stmg:
276 stmg %r8,%r15,__LC_SAVE_AREA_SYNC
277 lg %r12,__LC_CURRENT
278 lghi %r13,__TASK_thread
279 lghi %r14,_PIF_SYSCALL
280 .Lsysc_per:
281 lg %r15,__LC_KERNEL_STACK
282 la %r11,STACK_FRAME_OVERHEAD(%r15) # pointer to pt_regs
283 .Lsysc_vtime:
284 UPDATE_VTIME %r8,%r9,__LC_SYNC_ENTER_TIMER
285 stmg %r0,%r7,__PT_R0(%r11)
286 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
287 mvc __PT_PSW(16,%r11),__LC_SVC_OLD_PSW
288 mvc __PT_INT_CODE(4,%r11),__LC_SVC_ILC
289 stg %r14,__PT_FLAGS(%r11)
290 .Lsysc_do_svc:
291 # load address of system call table
292 lg %r10,__THREAD_sysc_table(%r13,%r12)
293 llgh %r8,__PT_INT_CODE+2(%r11)
294 slag %r8,%r8,2 # shift and test for svc 0
295 jnz .Lsysc_nr_ok
296 # svc 0: system call number in %r1
297 llgfr %r1,%r1 # clear high word in r1
298 cghi %r1,NR_syscalls
299 jnl .Lsysc_nr_ok
300 sth %r1,__PT_INT_CODE+2(%r11)
301 slag %r8,%r1,2
302 .Lsysc_nr_ok:
303 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
304 stg %r2,__PT_ORIG_GPR2(%r11)
305 stg %r7,STACK_FRAME_OVERHEAD(%r15)
306 lgf %r9,0(%r8,%r10) # get system call add.
307 TSTMSK __TI_flags(%r12),_TIF_TRACE
308 jnz .Lsysc_tracesys
309 basr %r14,%r9 # call sys_xxxx
310 stg %r2,__PT_R2(%r11) # store return value
311
312 .Lsysc_return:
313 LOCKDEP_SYS_EXIT
314 .Lsysc_tif:
315 TSTMSK __PT_FLAGS(%r11),_PIF_WORK
316 jnz .Lsysc_work
317 TSTMSK __TI_flags(%r12),_TIF_WORK
318 jnz .Lsysc_work # check for work
319 TSTMSK __LC_CPU_FLAGS,_CIF_WORK
320 jnz .Lsysc_work
321 .Lsysc_restore:
322 lg %r14,__LC_VDSO_PER_CPU
323 lmg %r0,%r10,__PT_R0(%r11)
324 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11)
325 .Lsysc_exit_timer:
326 stpt __LC_EXIT_TIMER
327 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
328 lmg %r11,%r15,__PT_R11(%r11)
329 lpswe __LC_RETURN_PSW
330 .Lsysc_done:
331
332 #
333 # One of the work bits is on. Find out which one.
334 #
335 .Lsysc_work:
336 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING
337 jo .Lsysc_mcck_pending
338 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED
339 jo .Lsysc_reschedule
340 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL_RESTART
341 jo .Lsysc_syscall_restart
342 #ifdef CONFIG_UPROBES
343 TSTMSK __TI_flags(%r12),_TIF_UPROBE
344 jo .Lsysc_uprobe_notify
345 #endif
346 TSTMSK __TI_flags(%r12),_TIF_GUARDED_STORAGE
347 jo .Lsysc_guarded_storage
348 TSTMSK __PT_FLAGS(%r11),_PIF_PER_TRAP
349 jo .Lsysc_singlestep
350 #ifdef CONFIG_LIVEPATCH
351 TSTMSK __TI_flags(%r12),_TIF_PATCH_PENDING
352 jo .Lsysc_patch_pending # handle live patching just before
353 # signals and possible syscall restart
354 #endif
355 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL_RESTART
356 jo .Lsysc_syscall_restart
357 TSTMSK __TI_flags(%r12),_TIF_SIGPENDING
358 jo .Lsysc_sigpending
359 TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME
360 jo .Lsysc_notify_resume
361 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
362 jo .Lsysc_vxrs
363 TSTMSK __LC_CPU_FLAGS,(_CIF_ASCE_PRIMARY|_CIF_ASCE_SECONDARY)
364 jnz .Lsysc_asce
365 j .Lsysc_return # beware of critical section cleanup
366
367 #
368 # _TIF_NEED_RESCHED is set, call schedule
369 #
370 .Lsysc_reschedule:
371 larl %r14,.Lsysc_return
372 jg schedule
373
374 #
375 # _CIF_MCCK_PENDING is set, call handler
376 #
377 .Lsysc_mcck_pending:
378 larl %r14,.Lsysc_return
379 jg s390_handle_mcck # TIF bit will be cleared by handler
380
381 #
382 # _CIF_ASCE_PRIMARY and/or CIF_ASCE_SECONDARY set, load user space asce
383 #
384 .Lsysc_asce:
385 ni __LC_CPU_FLAGS+7,255-_CIF_ASCE_PRIMARY
386 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
387 TSTMSK __LC_CPU_FLAGS,_CIF_ASCE_SECONDARY
388 jz .Lsysc_return
389 larl %r14,.Lsysc_return
390 jg set_fs_fixup
391
392 #
393 # CIF_FPU is set, restore floating-point controls and floating-point registers.
394 #
395 .Lsysc_vxrs:
396 larl %r14,.Lsysc_return
397 jg load_fpu_regs
398
399 #
400 # _TIF_SIGPENDING is set, call do_signal
401 #
402 .Lsysc_sigpending:
403 lgr %r2,%r11 # pass pointer to pt_regs
404 brasl %r14,do_signal
405 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL
406 jno .Lsysc_return
407 .Lsysc_do_syscall:
408 lghi %r13,__TASK_thread
409 lmg %r2,%r7,__PT_R2(%r11) # load svc arguments
410 lghi %r1,0 # svc 0 returns -ENOSYS
411 j .Lsysc_do_svc
412
413 #
414 # _TIF_NOTIFY_RESUME is set, call do_notify_resume
415 #
416 .Lsysc_notify_resume:
417 lgr %r2,%r11 # pass pointer to pt_regs
418 larl %r14,.Lsysc_return
419 jg do_notify_resume
420
421 #
422 # _TIF_UPROBE is set, call uprobe_notify_resume
423 #
424 #ifdef CONFIG_UPROBES
425 .Lsysc_uprobe_notify:
426 lgr %r2,%r11 # pass pointer to pt_regs
427 larl %r14,.Lsysc_return
428 jg uprobe_notify_resume
429 #endif
430
431 #
432 # _TIF_GUARDED_STORAGE is set, call guarded_storage_load
433 #
434 .Lsysc_guarded_storage:
435 lgr %r2,%r11 # pass pointer to pt_regs
436 larl %r14,.Lsysc_return
437 jg gs_load_bc_cb
438 #
439 # _TIF_PATCH_PENDING is set, call klp_update_patch_state
440 #
441 #ifdef CONFIG_LIVEPATCH
442 .Lsysc_patch_pending:
443 lg %r2,__LC_CURRENT # pass pointer to task struct
444 larl %r14,.Lsysc_return
445 jg klp_update_patch_state
446 #endif
447
448 #
449 # _PIF_PER_TRAP is set, call do_per_trap
450 #
451 .Lsysc_singlestep:
452 ni __PT_FLAGS+7(%r11),255-_PIF_PER_TRAP
453 lgr %r2,%r11 # pass pointer to pt_regs
454 larl %r14,.Lsysc_return
455 jg do_per_trap
456
457 #
458 # _PIF_SYSCALL_RESTART is set, repeat the current system call
459 #
460 .Lsysc_syscall_restart:
461 ni __PT_FLAGS+7(%r11),255-_PIF_SYSCALL_RESTART
462 lmg %r1,%r7,__PT_R1(%r11) # load svc arguments
463 lg %r2,__PT_ORIG_GPR2(%r11)
464 j .Lsysc_do_svc
465
466 #
467 # call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
468 # and after the system call
469 #
470 .Lsysc_tracesys:
471 lgr %r2,%r11 # pass pointer to pt_regs
472 la %r3,0
473 llgh %r0,__PT_INT_CODE+2(%r11)
474 stg %r0,__PT_R2(%r11)
475 brasl %r14,do_syscall_trace_enter
476 lghi %r0,NR_syscalls
477 clgr %r0,%r2
478 jnh .Lsysc_tracenogo
479 sllg %r8,%r2,2
480 lgf %r9,0(%r8,%r10)
481 .Lsysc_tracego:
482 lmg %r3,%r7,__PT_R3(%r11)
483 stg %r7,STACK_FRAME_OVERHEAD(%r15)
484 lg %r2,__PT_ORIG_GPR2(%r11)
485 basr %r14,%r9 # call sys_xxx
486 stg %r2,__PT_R2(%r11) # store return value
487 .Lsysc_tracenogo:
488 TSTMSK __TI_flags(%r12),_TIF_TRACE
489 jz .Lsysc_return
490 lgr %r2,%r11 # pass pointer to pt_regs
491 larl %r14,.Lsysc_return
492 jg do_syscall_trace_exit
493
494 #
495 # a new process exits the kernel with ret_from_fork
496 #
497 ENTRY(ret_from_fork)
498 la %r11,STACK_FRAME_OVERHEAD(%r15)
499 lg %r12,__LC_CURRENT
500 brasl %r14,schedule_tail
501 TRACE_IRQS_ON
502 ssm __LC_SVC_NEW_PSW # reenable interrupts
503 tm __PT_PSW+1(%r11),0x01 # forking a kernel thread ?
504 jne .Lsysc_tracenogo
505 # it's a kernel thread
506 lmg %r9,%r10,__PT_R9(%r11) # load gprs
507 ENTRY(kernel_thread_starter)
508 la %r2,0(%r10)
509 basr %r14,%r9
510 j .Lsysc_tracenogo
511
512 /*
513 * Program check handler routine
514 */
515
516 ENTRY(pgm_check_handler)
517 stpt __LC_SYNC_ENTER_TIMER
518 stmg %r8,%r15,__LC_SAVE_AREA_SYNC
519 lg %r10,__LC_LAST_BREAK
520 lg %r12,__LC_CURRENT
521 lghi %r11,0
522 larl %r13,cleanup_critical
523 lmg %r8,%r9,__LC_PGM_OLD_PSW
524 tmhh %r8,0x0001 # test problem state bit
525 jnz 2f # -> fault in user space
526 #if IS_ENABLED(CONFIG_KVM)
527 # cleanup critical section for program checks in sie64a
528 lgr %r14,%r9
529 slg %r14,BASED(.Lsie_critical_start)
530 clg %r14,BASED(.Lsie_critical_length)
531 jhe 0f
532 lg %r14,__SF_EMPTY(%r15) # get control block pointer
533 ni __SIE_PROG0C+3(%r14),0xfe # no longer in SIE
534 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
535 larl %r9,sie_exit # skip forward to sie_exit
536 lghi %r11,_PIF_GUEST_FAULT
537 #endif
538 0: tmhh %r8,0x4000 # PER bit set in old PSW ?
539 jnz 1f # -> enabled, can't be a double fault
540 tm __LC_PGM_ILC+3,0x80 # check for per exception
541 jnz .Lpgm_svcper # -> single stepped svc
542 1: CHECK_STACK STACK_SIZE,__LC_SAVE_AREA_SYNC
543 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
544 j 4f
545 2: UPDATE_VTIME %r14,%r15,__LC_SYNC_ENTER_TIMER
546 lg %r15,__LC_KERNEL_STACK
547 lgr %r14,%r12
548 aghi %r14,__TASK_thread # pointer to thread_struct
549 lghi %r13,__LC_PGM_TDB
550 tm __LC_PGM_ILC+2,0x02 # check for transaction abort
551 jz 3f
552 mvc __THREAD_trap_tdb(256,%r14),0(%r13)
553 3: stg %r10,__THREAD_last_break(%r14)
554 4: lgr %r13,%r11
555 la %r11,STACK_FRAME_OVERHEAD(%r15)
556 stmg %r0,%r7,__PT_R0(%r11)
557 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
558 stmg %r8,%r9,__PT_PSW(%r11)
559 mvc __PT_INT_CODE(4,%r11),__LC_PGM_ILC
560 mvc __PT_INT_PARM_LONG(8,%r11),__LC_TRANS_EXC_CODE
561 stg %r13,__PT_FLAGS(%r11)
562 stg %r10,__PT_ARGS(%r11)
563 tm __LC_PGM_ILC+3,0x80 # check for per exception
564 jz 5f
565 tmhh %r8,0x0001 # kernel per event ?
566 jz .Lpgm_kprobe
567 oi __PT_FLAGS+7(%r11),_PIF_PER_TRAP
568 mvc __THREAD_per_address(8,%r14),__LC_PER_ADDRESS
569 mvc __THREAD_per_cause(2,%r14),__LC_PER_CODE
570 mvc __THREAD_per_paid(1,%r14),__LC_PER_ACCESS_ID
571 5: REENABLE_IRQS
572 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
573 larl %r1,pgm_check_table
574 llgh %r10,__PT_INT_CODE+2(%r11)
575 nill %r10,0x007f
576 sll %r10,2
577 je .Lpgm_return
578 lgf %r1,0(%r10,%r1) # load address of handler routine
579 lgr %r2,%r11 # pass pointer to pt_regs
580 basr %r14,%r1 # branch to interrupt-handler
581 .Lpgm_return:
582 LOCKDEP_SYS_EXIT
583 tm __PT_PSW+1(%r11),0x01 # returning to user ?
584 jno .Lsysc_restore
585 TSTMSK __PT_FLAGS(%r11),_PIF_SYSCALL
586 jo .Lsysc_do_syscall
587 j .Lsysc_tif
588
589 #
590 # PER event in supervisor state, must be kprobes
591 #
592 .Lpgm_kprobe:
593 REENABLE_IRQS
594 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
595 lgr %r2,%r11 # pass pointer to pt_regs
596 brasl %r14,do_per_trap
597 j .Lpgm_return
598
599 #
600 # single stepped system call
601 #
602 .Lpgm_svcper:
603 mvc __LC_RETURN_PSW(8),__LC_SVC_NEW_PSW
604 lghi %r13,__TASK_thread
605 larl %r14,.Lsysc_per
606 stg %r14,__LC_RETURN_PSW+8
607 lghi %r14,_PIF_SYSCALL | _PIF_PER_TRAP
608 lpswe __LC_RETURN_PSW # branch to .Lsysc_per and enable irqs
609
610 /*
611 * IO interrupt handler routine
612 */
613 ENTRY(io_int_handler)
614 STCK __LC_INT_CLOCK
615 stpt __LC_ASYNC_ENTER_TIMER
616 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC
617 lg %r12,__LC_CURRENT
618 larl %r13,cleanup_critical
619 lmg %r8,%r9,__LC_IO_OLD_PSW
620 SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER
621 stmg %r0,%r7,__PT_R0(%r11)
622 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
623 stmg %r8,%r9,__PT_PSW(%r11)
624 mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID
625 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
626 TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ
627 jo .Lio_restore
628 TRACE_IRQS_OFF
629 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
630 .Lio_loop:
631 lgr %r2,%r11 # pass pointer to pt_regs
632 lghi %r3,IO_INTERRUPT
633 tm __PT_INT_CODE+8(%r11),0x80 # adapter interrupt ?
634 jz .Lio_call
635 lghi %r3,THIN_INTERRUPT
636 .Lio_call:
637 brasl %r14,do_IRQ
638 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPAR
639 jz .Lio_return
640 tpi 0
641 jz .Lio_return
642 mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID
643 j .Lio_loop
644 .Lio_return:
645 LOCKDEP_SYS_EXIT
646 TRACE_IRQS_ON
647 .Lio_tif:
648 TSTMSK __TI_flags(%r12),_TIF_WORK
649 jnz .Lio_work # there is work to do (signals etc.)
650 TSTMSK __LC_CPU_FLAGS,_CIF_WORK
651 jnz .Lio_work
652 .Lio_restore:
653 lg %r14,__LC_VDSO_PER_CPU
654 lmg %r0,%r10,__PT_R0(%r11)
655 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11)
656 .Lio_exit_timer:
657 stpt __LC_EXIT_TIMER
658 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
659 lmg %r11,%r15,__PT_R11(%r11)
660 lpswe __LC_RETURN_PSW
661 .Lio_done:
662
663 #
664 # There is work todo, find out in which context we have been interrupted:
665 # 1) if we return to user space we can do all _TIF_WORK work
666 # 2) if we return to kernel code and kvm is enabled check if we need to
667 # modify the psw to leave SIE
668 # 3) if we return to kernel code and preemptive scheduling is enabled check
669 # the preemption counter and if it is zero call preempt_schedule_irq
670 # Before any work can be done, a switch to the kernel stack is required.
671 #
672 .Lio_work:
673 tm __PT_PSW+1(%r11),0x01 # returning to user ?
674 jo .Lio_work_user # yes -> do resched & signal
675 #ifdef CONFIG_PREEMPT
676 # check for preemptive scheduling
677 icm %r0,15,__LC_PREEMPT_COUNT
678 jnz .Lio_restore # preemption is disabled
679 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED
680 jno .Lio_restore
681 # switch to kernel stack
682 lg %r1,__PT_R15(%r11)
683 aghi %r1,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
684 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
685 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
686 la %r11,STACK_FRAME_OVERHEAD(%r1)
687 lgr %r15,%r1
688 # TRACE_IRQS_ON already done at .Lio_return, call
689 # TRACE_IRQS_OFF to keep things symmetrical
690 TRACE_IRQS_OFF
691 brasl %r14,preempt_schedule_irq
692 j .Lio_return
693 #else
694 j .Lio_restore
695 #endif
696
697 #
698 # Need to do work before returning to userspace, switch to kernel stack
699 #
700 .Lio_work_user:
701 lg %r1,__LC_KERNEL_STACK
702 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
703 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
704 la %r11,STACK_FRAME_OVERHEAD(%r1)
705 lgr %r15,%r1
706
707 #
708 # One of the work bits is on. Find out which one.
709 #
710 .Lio_work_tif:
711 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING
712 jo .Lio_mcck_pending
713 TSTMSK __TI_flags(%r12),_TIF_NEED_RESCHED
714 jo .Lio_reschedule
715 #ifdef CONFIG_LIVEPATCH
716 TSTMSK __TI_flags(%r12),_TIF_PATCH_PENDING
717 jo .Lio_patch_pending
718 #endif
719 TSTMSK __TI_flags(%r12),_TIF_SIGPENDING
720 jo .Lio_sigpending
721 TSTMSK __TI_flags(%r12),_TIF_NOTIFY_RESUME
722 jo .Lio_notify_resume
723 TSTMSK __TI_flags(%r12),_TIF_GUARDED_STORAGE
724 jo .Lio_guarded_storage
725 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
726 jo .Lio_vxrs
727 TSTMSK __LC_CPU_FLAGS,(_CIF_ASCE_PRIMARY|_CIF_ASCE_SECONDARY)
728 jnz .Lio_asce
729 j .Lio_return # beware of critical section cleanup
730
731 #
732 # _CIF_MCCK_PENDING is set, call handler
733 #
734 .Lio_mcck_pending:
735 # TRACE_IRQS_ON already done at .Lio_return
736 brasl %r14,s390_handle_mcck # TIF bit will be cleared by handler
737 TRACE_IRQS_OFF
738 j .Lio_return
739
740 #
741 # _CIF_ASCE_PRIMARY and/or CIF_ASCE_SECONDARY set, load user space asce
742 #
743 .Lio_asce:
744 ni __LC_CPU_FLAGS+7,255-_CIF_ASCE_PRIMARY
745 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
746 TSTMSK __LC_CPU_FLAGS,_CIF_ASCE_SECONDARY
747 jz .Lio_return
748 larl %r14,.Lio_return
749 jg set_fs_fixup
750
751 #
752 # CIF_FPU is set, restore floating-point controls and floating-point registers.
753 #
754 .Lio_vxrs:
755 larl %r14,.Lio_return
756 jg load_fpu_regs
757
758 #
759 # _TIF_GUARDED_STORAGE is set, call guarded_storage_load
760 #
761 .Lio_guarded_storage:
762 # TRACE_IRQS_ON already done at .Lio_return
763 ssm __LC_SVC_NEW_PSW # reenable interrupts
764 lgr %r2,%r11 # pass pointer to pt_regs
765 brasl %r14,gs_load_bc_cb
766 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
767 TRACE_IRQS_OFF
768 j .Lio_return
769
770 #
771 # _TIF_NEED_RESCHED is set, call schedule
772 #
773 .Lio_reschedule:
774 # TRACE_IRQS_ON already done at .Lio_return
775 ssm __LC_SVC_NEW_PSW # reenable interrupts
776 brasl %r14,schedule # call scheduler
777 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
778 TRACE_IRQS_OFF
779 j .Lio_return
780
781 #
782 # _TIF_PATCH_PENDING is set, call klp_update_patch_state
783 #
784 #ifdef CONFIG_LIVEPATCH
785 .Lio_patch_pending:
786 lg %r2,__LC_CURRENT # pass pointer to task struct
787 larl %r14,.Lio_return
788 jg klp_update_patch_state
789 #endif
790
791 #
792 # _TIF_SIGPENDING or is set, call do_signal
793 #
794 .Lio_sigpending:
795 # TRACE_IRQS_ON already done at .Lio_return
796 ssm __LC_SVC_NEW_PSW # reenable interrupts
797 lgr %r2,%r11 # pass pointer to pt_regs
798 brasl %r14,do_signal
799 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
800 TRACE_IRQS_OFF
801 j .Lio_return
802
803 #
804 # _TIF_NOTIFY_RESUME or is set, call do_notify_resume
805 #
806 .Lio_notify_resume:
807 # TRACE_IRQS_ON already done at .Lio_return
808 ssm __LC_SVC_NEW_PSW # reenable interrupts
809 lgr %r2,%r11 # pass pointer to pt_regs
810 brasl %r14,do_notify_resume
811 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
812 TRACE_IRQS_OFF
813 j .Lio_return
814
815 /*
816 * External interrupt handler routine
817 */
818 ENTRY(ext_int_handler)
819 STCK __LC_INT_CLOCK
820 stpt __LC_ASYNC_ENTER_TIMER
821 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC
822 lg %r12,__LC_CURRENT
823 larl %r13,cleanup_critical
824 lmg %r8,%r9,__LC_EXT_OLD_PSW
825 SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_ENTER_TIMER
826 stmg %r0,%r7,__PT_R0(%r11)
827 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
828 stmg %r8,%r9,__PT_PSW(%r11)
829 lghi %r1,__LC_EXT_PARAMS2
830 mvc __PT_INT_CODE(4,%r11),__LC_EXT_CPU_ADDR
831 mvc __PT_INT_PARM(4,%r11),__LC_EXT_PARAMS
832 mvc __PT_INT_PARM_LONG(8,%r11),0(%r1)
833 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
834 TSTMSK __LC_CPU_FLAGS,_CIF_IGNORE_IRQ
835 jo .Lio_restore
836 TRACE_IRQS_OFF
837 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
838 lgr %r2,%r11 # pass pointer to pt_regs
839 lghi %r3,EXT_INTERRUPT
840 brasl %r14,do_IRQ
841 j .Lio_return
842
843 /*
844 * Load idle PSW. The second "half" of this function is in .Lcleanup_idle.
845 */
846 ENTRY(psw_idle)
847 stg %r3,__SF_EMPTY(%r15)
848 larl %r1,.Lpsw_idle_lpsw+4
849 stg %r1,__SF_EMPTY+8(%r15)
850 #ifdef CONFIG_SMP
851 larl %r1,smp_cpu_mtid
852 llgf %r1,0(%r1)
853 ltgr %r1,%r1
854 jz .Lpsw_idle_stcctm
855 .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+16(%r15)
856 .Lpsw_idle_stcctm:
857 #endif
858 oi __LC_CPU_FLAGS+7,_CIF_ENABLED_WAIT
859 STCK __CLOCK_IDLE_ENTER(%r2)
860 stpt __TIMER_IDLE_ENTER(%r2)
861 .Lpsw_idle_lpsw:
862 lpswe __SF_EMPTY(%r15)
863 br %r14
864 .Lpsw_idle_end:
865
866 /*
867 * Store floating-point controls and floating-point or vector register
868 * depending whether the vector facility is available. A critical section
869 * cleanup assures that the registers are stored even if interrupted for
870 * some other work. The CIF_FPU flag is set to trigger a lazy restore
871 * of the register contents at return from io or a system call.
872 */
873 ENTRY(save_fpu_regs)
874 lg %r2,__LC_CURRENT
875 aghi %r2,__TASK_thread
876 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
877 bor %r14
878 stfpc __THREAD_FPU_fpc(%r2)
879 lg %r3,__THREAD_FPU_regs(%r2)
880 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX
881 jz .Lsave_fpu_regs_fp # no -> store FP regs
882 VSTM %v0,%v15,0,%r3 # vstm 0,15,0(3)
883 VSTM %v16,%v31,256,%r3 # vstm 16,31,256(3)
884 j .Lsave_fpu_regs_done # -> set CIF_FPU flag
885 .Lsave_fpu_regs_fp:
886 std 0,0(%r3)
887 std 1,8(%r3)
888 std 2,16(%r3)
889 std 3,24(%r3)
890 std 4,32(%r3)
891 std 5,40(%r3)
892 std 6,48(%r3)
893 std 7,56(%r3)
894 std 8,64(%r3)
895 std 9,72(%r3)
896 std 10,80(%r3)
897 std 11,88(%r3)
898 std 12,96(%r3)
899 std 13,104(%r3)
900 std 14,112(%r3)
901 std 15,120(%r3)
902 .Lsave_fpu_regs_done:
903 oi __LC_CPU_FLAGS+7,_CIF_FPU
904 br %r14
905 .Lsave_fpu_regs_end:
906 EXPORT_SYMBOL(save_fpu_regs)
907
908 /*
909 * Load floating-point controls and floating-point or vector registers.
910 * A critical section cleanup assures that the register contents are
911 * loaded even if interrupted for some other work.
912 *
913 * There are special calling conventions to fit into sysc and io return work:
914 * %r15: <kernel stack>
915 * The function requires:
916 * %r4
917 */
918 load_fpu_regs:
919 lg %r4,__LC_CURRENT
920 aghi %r4,__TASK_thread
921 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
922 bnor %r14
923 lfpc __THREAD_FPU_fpc(%r4)
924 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX
925 lg %r4,__THREAD_FPU_regs(%r4) # %r4 <- reg save area
926 jz .Lload_fpu_regs_fp # -> no VX, load FP regs
927 VLM %v0,%v15,0,%r4
928 VLM %v16,%v31,256,%r4
929 j .Lload_fpu_regs_done
930 .Lload_fpu_regs_fp:
931 ld 0,0(%r4)
932 ld 1,8(%r4)
933 ld 2,16(%r4)
934 ld 3,24(%r4)
935 ld 4,32(%r4)
936 ld 5,40(%r4)
937 ld 6,48(%r4)
938 ld 7,56(%r4)
939 ld 8,64(%r4)
940 ld 9,72(%r4)
941 ld 10,80(%r4)
942 ld 11,88(%r4)
943 ld 12,96(%r4)
944 ld 13,104(%r4)
945 ld 14,112(%r4)
946 ld 15,120(%r4)
947 .Lload_fpu_regs_done:
948 ni __LC_CPU_FLAGS+7,255-_CIF_FPU
949 br %r14
950 .Lload_fpu_regs_end:
951
952 .L__critical_end:
953
954 /*
955 * Machine check handler routines
956 */
957 ENTRY(mcck_int_handler)
958 STCK __LC_MCCK_CLOCK
959 la %r1,4095 # validate r1
960 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # validate cpu timer
961 sckc __LC_CLOCK_COMPARATOR # validate comparator
962 lam %a0,%a15,__LC_AREGS_SAVE_AREA-4095(%r1) # validate acrs
963 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# validate gprs
964 lg %r12,__LC_CURRENT
965 larl %r13,cleanup_critical
966 lmg %r8,%r9,__LC_MCK_OLD_PSW
967 TSTMSK __LC_MCCK_CODE,MCCK_CODE_SYSTEM_DAMAGE
968 jo .Lmcck_panic # yes -> rest of mcck code invalid
969 TSTMSK __LC_MCCK_CODE,MCCK_CODE_CR_VALID
970 jno .Lmcck_panic # control registers invalid -> panic
971 la %r14,4095
972 lctlg %c0,%c15,__LC_CREGS_SAVE_AREA-4095(%r14) # validate ctl regs
973 ptlb
974 lg %r11,__LC_MCESAD-4095(%r14) # extended machine check save area
975 nill %r11,0xfc00 # MCESA_ORIGIN_MASK
976 TSTMSK __LC_CREGS_SAVE_AREA+16-4095(%r14),CR2_GUARDED_STORAGE
977 jno 0f
978 TSTMSK __LC_MCCK_CODE,MCCK_CODE_GS_VALID
979 jno 0f
980 .insn rxy,0xe3000000004d,0,__MCESA_GS_SAVE_AREA(%r11) # LGSC
981 0: l %r14,__LC_FP_CREG_SAVE_AREA-4095(%r14)
982 TSTMSK __LC_MCCK_CODE,MCCK_CODE_FC_VALID
983 jo 0f
984 sr %r14,%r14
985 0: sfpc %r14
986 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_VX
987 jo 0f
988 lghi %r14,__LC_FPREGS_SAVE_AREA
989 ld %f0,0(%r14)
990 ld %f1,8(%r14)
991 ld %f2,16(%r14)
992 ld %f3,24(%r14)
993 ld %f4,32(%r14)
994 ld %f5,40(%r14)
995 ld %f6,48(%r14)
996 ld %f7,56(%r14)
997 ld %f8,64(%r14)
998 ld %f9,72(%r14)
999 ld %f10,80(%r14)
1000 ld %f11,88(%r14)
1001 ld %f12,96(%r14)
1002 ld %f13,104(%r14)
1003 ld %f14,112(%r14)
1004 ld %f15,120(%r14)
1005 j 1f
1006 0: VLM %v0,%v15,0,%r11
1007 VLM %v16,%v31,256,%r11
1008 1: lghi %r14,__LC_CPU_TIMER_SAVE_AREA
1009 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
1010 TSTMSK __LC_MCCK_CODE,MCCK_CODE_CPU_TIMER_VALID
1011 jo 3f
1012 la %r14,__LC_SYNC_ENTER_TIMER
1013 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
1014 jl 0f
1015 la %r14,__LC_ASYNC_ENTER_TIMER
1016 0: clc 0(8,%r14),__LC_EXIT_TIMER
1017 jl 1f
1018 la %r14,__LC_EXIT_TIMER
1019 1: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
1020 jl 2f
1021 la %r14,__LC_LAST_UPDATE_TIMER
1022 2: spt 0(%r14)
1023 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
1024 3: TSTMSK __LC_MCCK_CODE,MCCK_CODE_PSW_MWP_VALID
1025 jno .Lmcck_panic
1026 tmhh %r8,0x0001 # interrupting from user ?
1027 jnz 4f
1028 TSTMSK __LC_MCCK_CODE,MCCK_CODE_PSW_IA_VALID
1029 jno .Lmcck_panic
1030 4: SWITCH_ASYNC __LC_GPREGS_SAVE_AREA+64,__LC_MCCK_ENTER_TIMER
1031 .Lmcck_skip:
1032 lghi %r14,__LC_GPREGS_SAVE_AREA+64
1033 stmg %r0,%r7,__PT_R0(%r11)
1034 mvc __PT_R8(64,%r11),0(%r14)
1035 stmg %r8,%r9,__PT_PSW(%r11)
1036 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
1037 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
1038 lgr %r2,%r11 # pass pointer to pt_regs
1039 brasl %r14,s390_do_machine_check
1040 tm __PT_PSW+1(%r11),0x01 # returning to user ?
1041 jno .Lmcck_return
1042 lg %r1,__LC_KERNEL_STACK # switch to kernel stack
1043 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
1044 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1)
1045 la %r11,STACK_FRAME_OVERHEAD(%r1)
1046 lgr %r15,%r1
1047 ssm __LC_PGM_NEW_PSW # turn dat on, keep irqs off
1048 TSTMSK __LC_CPU_FLAGS,_CIF_MCCK_PENDING
1049 jno .Lmcck_return
1050 TRACE_IRQS_OFF
1051 brasl %r14,s390_handle_mcck
1052 TRACE_IRQS_ON
1053 .Lmcck_return:
1054 lg %r14,__LC_VDSO_PER_CPU
1055 lmg %r0,%r10,__PT_R0(%r11)
1056 mvc __LC_RETURN_MCCK_PSW(16),__PT_PSW(%r11) # move return PSW
1057 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
1058 jno 0f
1059 stpt __LC_EXIT_TIMER
1060 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
1061 0: lmg %r11,%r15,__PT_R11(%r11)
1062 lpswe __LC_RETURN_MCCK_PSW
1063
1064 .Lmcck_panic:
1065 lg %r15,__LC_PANIC_STACK
1066 la %r11,STACK_FRAME_OVERHEAD(%r15)
1067 j .Lmcck_skip
1068
1069 #
1070 # PSW restart interrupt handler
1071 #
1072 ENTRY(restart_int_handler)
1073 TSTMSK __LC_MACHINE_FLAGS,MACHINE_FLAG_LPP
1074 jz 0f
1075 .insn s,0xb2800000,__LC_LPP
1076 0: stg %r15,__LC_SAVE_AREA_RESTART
1077 lg %r15,__LC_RESTART_STACK
1078 aghi %r15,-__PT_SIZE # create pt_regs on stack
1079 xc 0(__PT_SIZE,%r15),0(%r15)
1080 stmg %r0,%r14,__PT_R0(%r15)
1081 mvc __PT_R15(8,%r15),__LC_SAVE_AREA_RESTART
1082 mvc __PT_PSW(16,%r15),__LC_RST_OLD_PSW # store restart old psw
1083 aghi %r15,-STACK_FRAME_OVERHEAD # create stack frame on stack
1084 xc 0(STACK_FRAME_OVERHEAD,%r15),0(%r15)
1085 lg %r1,__LC_RESTART_FN # load fn, parm & source cpu
1086 lg %r2,__LC_RESTART_DATA
1087 lg %r3,__LC_RESTART_SOURCE
1088 ltgr %r3,%r3 # test source cpu address
1089 jm 1f # negative -> skip source stop
1090 0: sigp %r4,%r3,SIGP_SENSE # sigp sense to source cpu
1091 brc 10,0b # wait for status stored
1092 1: basr %r14,%r1 # call function
1093 stap __SF_EMPTY(%r15) # store cpu address
1094 llgh %r3,__SF_EMPTY(%r15)
1095 2: sigp %r4,%r3,SIGP_STOP # sigp stop to current cpu
1096 brc 2,2b
1097 3: j 3b
1098
1099 .section .kprobes.text, "ax"
1100
1101 #ifdef CONFIG_CHECK_STACK
1102 /*
1103 * The synchronous or the asynchronous stack overflowed. We are dead.
1104 * No need to properly save the registers, we are going to panic anyway.
1105 * Setup a pt_regs so that show_trace can provide a good call trace.
1106 */
1107 stack_overflow:
1108 lg %r15,__LC_PANIC_STACK # change to panic stack
1109 la %r11,STACK_FRAME_OVERHEAD(%r15)
1110 stmg %r0,%r7,__PT_R0(%r11)
1111 stmg %r8,%r9,__PT_PSW(%r11)
1112 mvc __PT_R8(64,%r11),0(%r14)
1113 stg %r10,__PT_ORIG_GPR2(%r11) # store last break to orig_gpr2
1114 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
1115 lgr %r2,%r11 # pass pointer to pt_regs
1116 jg kernel_stack_overflow
1117 #endif
1118
1119 cleanup_critical:
1120 #if IS_ENABLED(CONFIG_KVM)
1121 clg %r9,BASED(.Lcleanup_table_sie) # .Lsie_gmap
1122 jl 0f
1123 clg %r9,BASED(.Lcleanup_table_sie+8)# .Lsie_done
1124 jl .Lcleanup_sie
1125 #endif
1126 clg %r9,BASED(.Lcleanup_table) # system_call
1127 jl 0f
1128 clg %r9,BASED(.Lcleanup_table+8) # .Lsysc_do_svc
1129 jl .Lcleanup_system_call
1130 clg %r9,BASED(.Lcleanup_table+16) # .Lsysc_tif
1131 jl 0f
1132 clg %r9,BASED(.Lcleanup_table+24) # .Lsysc_restore
1133 jl .Lcleanup_sysc_tif
1134 clg %r9,BASED(.Lcleanup_table+32) # .Lsysc_done
1135 jl .Lcleanup_sysc_restore
1136 clg %r9,BASED(.Lcleanup_table+40) # .Lio_tif
1137 jl 0f
1138 clg %r9,BASED(.Lcleanup_table+48) # .Lio_restore
1139 jl .Lcleanup_io_tif
1140 clg %r9,BASED(.Lcleanup_table+56) # .Lio_done
1141 jl .Lcleanup_io_restore
1142 clg %r9,BASED(.Lcleanup_table+64) # psw_idle
1143 jl 0f
1144 clg %r9,BASED(.Lcleanup_table+72) # .Lpsw_idle_end
1145 jl .Lcleanup_idle
1146 clg %r9,BASED(.Lcleanup_table+80) # save_fpu_regs
1147 jl 0f
1148 clg %r9,BASED(.Lcleanup_table+88) # .Lsave_fpu_regs_end
1149 jl .Lcleanup_save_fpu_regs
1150 clg %r9,BASED(.Lcleanup_table+96) # load_fpu_regs
1151 jl 0f
1152 clg %r9,BASED(.Lcleanup_table+104) # .Lload_fpu_regs_end
1153 jl .Lcleanup_load_fpu_regs
1154 0: br %r14
1155
1156 .align 8
1157 .Lcleanup_table:
1158 .quad system_call
1159 .quad .Lsysc_do_svc
1160 .quad .Lsysc_tif
1161 .quad .Lsysc_restore
1162 .quad .Lsysc_done
1163 .quad .Lio_tif
1164 .quad .Lio_restore
1165 .quad .Lio_done
1166 .quad psw_idle
1167 .quad .Lpsw_idle_end
1168 .quad save_fpu_regs
1169 .quad .Lsave_fpu_regs_end
1170 .quad load_fpu_regs
1171 .quad .Lload_fpu_regs_end
1172
1173 #if IS_ENABLED(CONFIG_KVM)
1174 .Lcleanup_table_sie:
1175 .quad .Lsie_gmap
1176 .quad .Lsie_done
1177
1178 .Lcleanup_sie:
1179 cghi %r11,__LC_SAVE_AREA_ASYNC #Is this in normal interrupt?
1180 je 1f
1181 slg %r9,BASED(.Lsie_crit_mcck_start)
1182 clg %r9,BASED(.Lsie_crit_mcck_length)
1183 jh 1f
1184 oi __LC_CPU_FLAGS+7, _CIF_MCCK_GUEST
1185 1: lg %r9,__SF_EMPTY(%r15) # get control block pointer
1186 ni __SIE_PROG0C+3(%r9),0xfe # no longer in SIE
1187 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
1188 larl %r9,sie_exit # skip forward to sie_exit
1189 br %r14
1190 #endif
1191
1192 .Lcleanup_system_call:
1193 # check if stpt has been executed
1194 clg %r9,BASED(.Lcleanup_system_call_insn)
1195 jh 0f
1196 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
1197 cghi %r11,__LC_SAVE_AREA_ASYNC
1198 je 0f
1199 mvc __LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER
1200 0: # check if stmg has been executed
1201 clg %r9,BASED(.Lcleanup_system_call_insn+8)
1202 jh 0f
1203 mvc __LC_SAVE_AREA_SYNC(64),0(%r11)
1204 0: # check if base register setup + TIF bit load has been done
1205 clg %r9,BASED(.Lcleanup_system_call_insn+16)
1206 jhe 0f
1207 # set up saved register r12 task struct pointer
1208 stg %r12,32(%r11)
1209 # set up saved register r13 __TASK_thread offset
1210 mvc 40(8,%r11),BASED(.Lcleanup_system_call_const)
1211 0: # check if the user time update has been done
1212 clg %r9,BASED(.Lcleanup_system_call_insn+24)
1213 jh 0f
1214 lg %r15,__LC_EXIT_TIMER
1215 slg %r15,__LC_SYNC_ENTER_TIMER
1216 alg %r15,__LC_USER_TIMER
1217 stg %r15,__LC_USER_TIMER
1218 0: # check if the system time update has been done
1219 clg %r9,BASED(.Lcleanup_system_call_insn+32)
1220 jh 0f
1221 lg %r15,__LC_LAST_UPDATE_TIMER
1222 slg %r15,__LC_EXIT_TIMER
1223 alg %r15,__LC_SYSTEM_TIMER
1224 stg %r15,__LC_SYSTEM_TIMER
1225 0: # update accounting time stamp
1226 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
1227 # set up saved register r11
1228 lg %r15,__LC_KERNEL_STACK
1229 la %r9,STACK_FRAME_OVERHEAD(%r15)
1230 stg %r9,24(%r11) # r11 pt_regs pointer
1231 # fill pt_regs
1232 mvc __PT_R8(64,%r9),__LC_SAVE_AREA_SYNC
1233 stmg %r0,%r7,__PT_R0(%r9)
1234 mvc __PT_PSW(16,%r9),__LC_SVC_OLD_PSW
1235 mvc __PT_INT_CODE(4,%r9),__LC_SVC_ILC
1236 xc __PT_FLAGS(8,%r9),__PT_FLAGS(%r9)
1237 mvi __PT_FLAGS+7(%r9),_PIF_SYSCALL
1238 # setup saved register r15
1239 stg %r15,56(%r11) # r15 stack pointer
1240 # set new psw address and exit
1241 larl %r9,.Lsysc_do_svc
1242 br %r14
1243 .Lcleanup_system_call_insn:
1244 .quad system_call
1245 .quad .Lsysc_stmg
1246 .quad .Lsysc_per
1247 .quad .Lsysc_vtime+36
1248 .quad .Lsysc_vtime+42
1249 .Lcleanup_system_call_const:
1250 .quad __TASK_thread
1251
1252 .Lcleanup_sysc_tif:
1253 larl %r9,.Lsysc_tif
1254 br %r14
1255
1256 .Lcleanup_sysc_restore:
1257 # check if stpt has been executed
1258 clg %r9,BASED(.Lcleanup_sysc_restore_insn)
1259 jh 0f
1260 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
1261 cghi %r11,__LC_SAVE_AREA_ASYNC
1262 je 0f
1263 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
1264 0: clg %r9,BASED(.Lcleanup_sysc_restore_insn+8)
1265 je 1f
1266 lg %r9,24(%r11) # get saved pointer to pt_regs
1267 mvc __LC_RETURN_PSW(16),__PT_PSW(%r9)
1268 mvc 0(64,%r11),__PT_R8(%r9)
1269 lmg %r0,%r7,__PT_R0(%r9)
1270 1: lmg %r8,%r9,__LC_RETURN_PSW
1271 br %r14
1272 .Lcleanup_sysc_restore_insn:
1273 .quad .Lsysc_exit_timer
1274 .quad .Lsysc_done - 4
1275
1276 .Lcleanup_io_tif:
1277 larl %r9,.Lio_tif
1278 br %r14
1279
1280 .Lcleanup_io_restore:
1281 # check if stpt has been executed
1282 clg %r9,BASED(.Lcleanup_io_restore_insn)
1283 jh 0f
1284 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
1285 0: clg %r9,BASED(.Lcleanup_io_restore_insn+8)
1286 je 1f
1287 lg %r9,24(%r11) # get saved r11 pointer to pt_regs
1288 mvc __LC_RETURN_PSW(16),__PT_PSW(%r9)
1289 mvc 0(64,%r11),__PT_R8(%r9)
1290 lmg %r0,%r7,__PT_R0(%r9)
1291 1: lmg %r8,%r9,__LC_RETURN_PSW
1292 br %r14
1293 .Lcleanup_io_restore_insn:
1294 .quad .Lio_exit_timer
1295 .quad .Lio_done - 4
1296
1297 .Lcleanup_idle:
1298 ni __LC_CPU_FLAGS+7,255-_CIF_ENABLED_WAIT
1299 # copy interrupt clock & cpu timer
1300 mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_INT_CLOCK
1301 mvc __TIMER_IDLE_EXIT(8,%r2),__LC_ASYNC_ENTER_TIMER
1302 cghi %r11,__LC_SAVE_AREA_ASYNC
1303 je 0f
1304 mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_MCCK_CLOCK
1305 mvc __TIMER_IDLE_EXIT(8,%r2),__LC_MCCK_ENTER_TIMER
1306 0: # check if stck & stpt have been executed
1307 clg %r9,BASED(.Lcleanup_idle_insn)
1308 jhe 1f
1309 mvc __CLOCK_IDLE_ENTER(8,%r2),__CLOCK_IDLE_EXIT(%r2)
1310 mvc __TIMER_IDLE_ENTER(8,%r2),__TIMER_IDLE_EXIT(%r2)
1311 1: # calculate idle cycles
1312 #ifdef CONFIG_SMP
1313 clg %r9,BASED(.Lcleanup_idle_insn)
1314 jl 3f
1315 larl %r1,smp_cpu_mtid
1316 llgf %r1,0(%r1)
1317 ltgr %r1,%r1
1318 jz 3f
1319 .insn rsy,0xeb0000000017,%r1,5,__SF_EMPTY+80(%r15)
1320 larl %r3,mt_cycles
1321 ag %r3,__LC_PERCPU_OFFSET
1322 la %r4,__SF_EMPTY+16(%r15)
1323 2: lg %r0,0(%r3)
1324 slg %r0,0(%r4)
1325 alg %r0,64(%r4)
1326 stg %r0,0(%r3)
1327 la %r3,8(%r3)
1328 la %r4,8(%r4)
1329 brct %r1,2b
1330 #endif
1331 3: # account system time going idle
1332 lg %r9,__LC_STEAL_TIMER
1333 alg %r9,__CLOCK_IDLE_ENTER(%r2)
1334 slg %r9,__LC_LAST_UPDATE_CLOCK
1335 stg %r9,__LC_STEAL_TIMER
1336 mvc __LC_LAST_UPDATE_CLOCK(8),__CLOCK_IDLE_EXIT(%r2)
1337 lg %r9,__LC_SYSTEM_TIMER
1338 alg %r9,__LC_LAST_UPDATE_TIMER
1339 slg %r9,__TIMER_IDLE_ENTER(%r2)
1340 stg %r9,__LC_SYSTEM_TIMER
1341 mvc __LC_LAST_UPDATE_TIMER(8),__TIMER_IDLE_EXIT(%r2)
1342 # prepare return psw
1343 nihh %r8,0xfcfd # clear irq & wait state bits
1344 lg %r9,48(%r11) # return from psw_idle
1345 br %r14
1346 .Lcleanup_idle_insn:
1347 .quad .Lpsw_idle_lpsw
1348
1349 .Lcleanup_save_fpu_regs:
1350 larl %r9,save_fpu_regs
1351 br %r14
1352
1353 .Lcleanup_load_fpu_regs:
1354 larl %r9,load_fpu_regs
1355 br %r14
1356
1357 /*
1358 * Integer constants
1359 */
1360 .align 8
1361 .Lcritical_start:
1362 .quad .L__critical_start
1363 .Lcritical_length:
1364 .quad .L__critical_end - .L__critical_start
1365 #if IS_ENABLED(CONFIG_KVM)
1366 .Lsie_critical_start:
1367 .quad .Lsie_gmap
1368 .Lsie_critical_length:
1369 .quad .Lsie_done - .Lsie_gmap
1370 .Lsie_crit_mcck_start:
1371 .quad .Lsie_entry
1372 .Lsie_crit_mcck_length:
1373 .quad .Lsie_skip - .Lsie_entry
1374 #endif
1375
1376 .section .rodata, "a"
1377 #define SYSCALL(esame,emu) .long esame
1378 .globl sys_call_table
1379 sys_call_table:
1380 #include "syscalls.S"
1381 #undef SYSCALL
1382
1383 #ifdef CONFIG_COMPAT
1384
1385 #define SYSCALL(esame,emu) .long emu
1386 .globl sys_call_table_emu
1387 sys_call_table_emu:
1388 #include "syscalls.S"
1389 #undef SYSCALL
1390 #endif
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