arch/s390/kernel/entry64.S

   1 /*
   2  *  arch/s390/kernel/entry64.S
   3  *    S390 low-level entry points.
   4  *
   5  *    Copyright (C) IBM Corp. 1999,2006
   6  *    Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
   7  *               Hartmut Penner (hp@de.ibm.com),
   8  *               Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
   9  *               Heiko Carstens <heiko.carstens@de.ibm.com>
  10  */
  11
  12 #include <linux/sys.h>
  13 #include <linux/linkage.h>
  14 #include <asm/cache.h>
  15 #include <asm/lowcore.h>
  16 #include <asm/errno.h>
  17 #include <asm/ptrace.h>
  18 #include <asm/thread_info.h>
  19 #include <asm/asm-offsets.h>
  20 #include <asm/unistd.h>
  21 #include <asm/page.h>
  22
  23 /*
  24  * Stack layout for the system_call stack entry.
  25  * The first few entries are identical to the user_regs_struct.
  26  */
  27 SP_PTREGS    =  STACK_FRAME_OVERHEAD
  28 SP_ARGS      =  STACK_FRAME_OVERHEAD + __PT_ARGS
  29 SP_PSW       =  STACK_FRAME_OVERHEAD + __PT_PSW
  30 SP_R0        =  STACK_FRAME_OVERHEAD + __PT_GPRS
  31 SP_R1        =  STACK_FRAME_OVERHEAD + __PT_GPRS + 8
  32 SP_R2        =  STACK_FRAME_OVERHEAD + __PT_GPRS + 16
  33 SP_R3        =  STACK_FRAME_OVERHEAD + __PT_GPRS + 24
  34 SP_R4        =  STACK_FRAME_OVERHEAD + __PT_GPRS + 32
  35 SP_R5        =  STACK_FRAME_OVERHEAD + __PT_GPRS + 40
  36 SP_R6        =  STACK_FRAME_OVERHEAD + __PT_GPRS + 48
  37 SP_R7        =  STACK_FRAME_OVERHEAD + __PT_GPRS + 56
  38 SP_R8        =  STACK_FRAME_OVERHEAD + __PT_GPRS + 64
  39 SP_R9        =  STACK_FRAME_OVERHEAD + __PT_GPRS + 72
  40 SP_R10       =  STACK_FRAME_OVERHEAD + __PT_GPRS + 80
  41 SP_R11       =  STACK_FRAME_OVERHEAD + __PT_GPRS + 88
  42 SP_R12       =  STACK_FRAME_OVERHEAD + __PT_GPRS + 96
  43 SP_R13       =  STACK_FRAME_OVERHEAD + __PT_GPRS + 104
  44 SP_R14       =  STACK_FRAME_OVERHEAD + __PT_GPRS + 112
  45 SP_R15       =  STACK_FRAME_OVERHEAD + __PT_GPRS + 120
  46 SP_ORIG_R2   =  STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2
  47 SP_ILC       =  STACK_FRAME_OVERHEAD + __PT_ILC
  48 SP_TRAP      =  STACK_FRAME_OVERHEAD + __PT_TRAP
  49 SP_SIZE      =  STACK_FRAME_OVERHEAD + __PT_SIZE
  50
  51 STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
  52 STACK_SIZE  = 1 << STACK_SHIFT
  53
  54 _TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | _TIF_NEED_RESCHED | \
  55                  _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP )
  56 _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK | _TIF_NEED_RESCHED | \
  57                  _TIF_MCCK_PENDING)
  58
  59 #define BASED(name) name-system_call(%r13)
  60
  61 #ifdef CONFIG_TRACE_IRQFLAGS
  62         .macro  TRACE_IRQS_ON
  63          brasl  %r14,trace_hardirqs_on
  64         .endm
  65
  66         .macro  TRACE_IRQS_OFF
  67          brasl  %r14,trace_hardirqs_off
  68         .endm
  69 #else
  70 #define TRACE_IRQS_ON
  71 #define TRACE_IRQS_OFF
  72 #endif
  73
  74         .macro  STORE_TIMER lc_offset
  75 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
  76         stpt    \lc_offset
  77 #endif
  78         .endm
  79
  80 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
  81         .macro  UPDATE_VTIME lc_from,lc_to,lc_sum
  82         lg      %r10,\lc_from
  83         slg     %r10,\lc_to
  84         alg     %r10,\lc_sum
  85         stg     %r10,\lc_sum
  86         .endm
  87 #endif
  88
  89 /*
  90  * Register usage in interrupt handlers:
  91  *    R9  - pointer to current task structure
  92  *    R13 - pointer to literal pool
  93  *    R14 - return register for function calls
  94  *    R15 - kernel stack pointer
  95  */
  96
  97         .macro  SAVE_ALL_BASE savearea
  98         stmg    %r12,%r15,\savearea
  99         larl    %r13,system_call
 100         .endm
 101
 102         .macro  SAVE_ALL_SYNC psworg,savearea
 103         la      %r12,\psworg
 104         tm      \psworg+1,0x01          # test problem state bit
 105         jz      2f                      # skip stack setup save
 106         lg      %r15,__LC_KERNEL_STACK  # problem state -> load ksp
 107 #ifdef CONFIG_CHECK_STACK
 108         j       3f
 109 2:      tml     %r15,STACK_SIZE - CONFIG_STACK_GUARD
 110         jz      stack_overflow
 111 3:
 112 #endif
 113 2:
 114         .endm
 115
 116         .macro  SAVE_ALL_ASYNC psworg,savearea
 117         la      %r12,\psworg
 118         tm      \psworg+1,0x01          # test problem state bit
 119         jnz     1f                      # from user -> load kernel stack
 120         clc     \psworg+8(8),BASED(.Lcritical_end)
 121         jhe     0f
 122         clc     \psworg+8(8),BASED(.Lcritical_start)
 123         jl      0f
 124         brasl   %r14,cleanup_critical
 125         tm      1(%r12),0x01            # retest problem state after cleanup
 126         jnz     1f
 127 0:      lg      %r14,__LC_ASYNC_STACK   # are we already on the async. stack ?
 128         slgr    %r14,%r15
 129         srag    %r14,%r14,STACK_SHIFT
 130         jz      2f
 131 1:      lg      %r15,__LC_ASYNC_STACK   # load async stack
 132 #ifdef CONFIG_CHECK_STACK
 133         j       3f
 134 2:      tml     %r15,STACK_SIZE - CONFIG_STACK_GUARD
 135         jz      stack_overflow
 136 3:
 137 #endif
 138 2:
 139         .endm
 140
 141         .macro  CREATE_STACK_FRAME psworg,savearea
 142         aghi    %r15,-SP_SIZE           # make room for registers & psw
 143         mvc     SP_PSW(16,%r15),0(%r12) # move user PSW to stack
 144         la      %r12,\psworg
 145         stg     %r2,SP_ORIG_R2(%r15)    # store original content of gpr 2
 146         icm     %r12,12,__LC_SVC_ILC
 147         stmg    %r0,%r11,SP_R0(%r15)    # store gprs %r0-%r11 to kernel stack
 148         st      %r12,SP_ILC(%r15)
 149         mvc     SP_R12(32,%r15),\savearea # move %r12-%r15 to stack
 150         la      %r12,0
 151         stg     %r12,__SF_BACKCHAIN(%r15)
 152         .endm
 153
 154         .macro  RESTORE_ALL psworg,sync
 155         mvc     \psworg(16),SP_PSW(%r15) # move user PSW to lowcore
 156         .if !\sync
 157         ni      \psworg+1,0xfd          # clear wait state bit
 158         .endif
 159         lmg     %r0,%r15,SP_R0(%r15)    # load gprs 0-15 of user
 160         STORE_TIMER __LC_EXIT_TIMER
 161         lpswe   \psworg                 # back to caller
 162         .endm
 163
 164 /*
 165  * Scheduler resume function, called by switch_to
 166  *  gpr2 = (task_struct *) prev
 167  *  gpr3 = (task_struct *) next
 168  * Returns:
 169  *  gpr2 = prev
 170  */
 171         .globl  __switch_to
 172 __switch_to:
 173         tm      __THREAD_per+4(%r3),0xe8 # is the new process using per ?
 174         jz      __switch_to_noper               # if not we're fine
 175         stctg   %c9,%c11,__SF_EMPTY(%r15)# We are using per stuff
 176         clc     __THREAD_per(24,%r3),__SF_EMPTY(%r15)
 177         je      __switch_to_noper            # we got away without bashing TLB's
 178         lctlg   %c9,%c11,__THREAD_per(%r3)      # Nope we didn't
 179 __switch_to_noper:
 180         lg      %r4,__THREAD_info(%r2)              # get thread_info of prev
 181         tm      __TI_flags+7(%r4),_TIF_MCCK_PENDING # machine check pending?
 182         jz      __switch_to_no_mcck
 183         ni      __TI_flags+7(%r4),255-_TIF_MCCK_PENDING # clear flag in prev
 184         lg      %r4,__THREAD_info(%r3)              # get thread_info of next
 185         oi      __TI_flags+7(%r4),_TIF_MCCK_PENDING # set it in next
 186 __switch_to_no_mcck:
 187         stmg    %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task
 188         stg     %r15,__THREAD_ksp(%r2)  # store kernel stack to prev->tss.ksp
 189         lg      %r15,__THREAD_ksp(%r3)  # load kernel stack from next->tss.ksp
 190         lmg     %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task
 191         stg     %r3,__LC_CURRENT        # __LC_CURRENT = current task struct
 192         lctl    %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
 193         lg      %r3,__THREAD_info(%r3)  # load thread_info from task struct
 194         stg     %r3,__LC_THREAD_INFO
 195         aghi    %r3,STACK_SIZE
 196         stg     %r3,__LC_KERNEL_STACK   # __LC_KERNEL_STACK = new kernel stack
 197         br      %r14
 198
 199 __critical_start:
 200 /*
 201  * SVC interrupt handler routine. System calls are synchronous events and
 202  * are executed with interrupts enabled.
 203  */
 204
 205         .globl  system_call
 206 system_call:
 207         STORE_TIMER __LC_SYNC_ENTER_TIMER
 208 sysc_saveall:
 209         SAVE_ALL_BASE __LC_SAVE_AREA
 210         SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
 211         CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
 212         llgh    %r7,__LC_SVC_INT_CODE   # get svc number from lowcore
 213 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
 214 sysc_vtime:
 215         tm      SP_PSW+1(%r15),0x01     # interrupting from user ?
 216         jz      sysc_do_svc
 217         UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
 218 sysc_stime:
 219         UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
 220 sysc_update:
 221         mvc     __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
 222 #endif
 223 sysc_do_svc:
 224         lg      %r9,__LC_THREAD_INFO    # load pointer to thread_info struct
 225         slag    %r7,%r7,2       # *4 and test for svc 0
 226         jnz     sysc_nr_ok
 227         # svc 0: system call number in %r1
 228         cl      %r1,BASED(.Lnr_syscalls)
 229         jnl     sysc_nr_ok
 230         lgfr    %r7,%r1         # clear high word in r1
 231         slag    %r7,%r7,2       # svc 0: system call number in %r1
 232 sysc_nr_ok:
 233         mvc     SP_ARGS(8,%r15),SP_R7(%r15)
 234 sysc_do_restart:
 235         larl    %r10,sys_call_table
 236 #ifdef CONFIG_COMPAT
 237         tm      __TI_flags+5(%r9),(_TIF_31BIT>>16)  # running in 31 bit mode ?
 238         jno     sysc_noemu
 239         larl    %r10,sys_call_table_emu  # use 31 bit emulation system calls
 240 sysc_noemu:
 241 #endif
 242         tm      __TI_flags+7(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
 243         lgf     %r8,0(%r7,%r10) # load address of system call routine
 244         jnz     sysc_tracesys
 245         basr    %r14,%r8        # call sys_xxxx
 246         stg     %r2,SP_R2(%r15) # store return value (change R2 on stack)
 247
 248 sysc_return:
 249         tm      SP_PSW+1(%r15),0x01     # returning to user ?
 250         jno     sysc_leave
 251         tm      __TI_flags+7(%r9),_TIF_WORK_SVC
 252         jnz     sysc_work       # there is work to do (signals etc.)
 253 sysc_leave:
 254         RESTORE_ALL __LC_RETURN_PSW,1
 255
 256 #
 257 # recheck if there is more work to do
 258 #
 259 sysc_work_loop:
 260         tm      __TI_flags+7(%r9),_TIF_WORK_SVC
 261         jz      sysc_leave        # there is no work to do
 262 #
 263 # One of the work bits is on. Find out which one.
 264 #
 265 sysc_work:
 266         tm      __TI_flags+7(%r9),_TIF_MCCK_PENDING
 267         jo      sysc_mcck_pending
 268         tm      __TI_flags+7(%r9),_TIF_NEED_RESCHED
 269         jo      sysc_reschedule
 270         tm      __TI_flags+7(%r9),(_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK)
 271         jnz     sysc_sigpending
 272         tm      __TI_flags+7(%r9),_TIF_RESTART_SVC
 273         jo      sysc_restart
 274         tm      __TI_flags+7(%r9),_TIF_SINGLE_STEP
 275         jo      sysc_singlestep
 276         j       sysc_leave
 277
 278 #
 279 # _TIF_NEED_RESCHED is set, call schedule
 280 #
 281 sysc_reschedule:
 282         larl    %r14,sysc_work_loop
 283         jg      schedule        # return point is sysc_return
 284
 285 #
 286 # _TIF_MCCK_PENDING is set, call handler
 287 #
 288 sysc_mcck_pending:
 289         larl    %r14,sysc_work_loop
 290         jg      s390_handle_mcck        # TIF bit will be cleared by handler
 291
 292 #
 293 # _TIF_SIGPENDING or _TIF_RESTORE_SIGMASK is set, call do_signal
 294 #
 295 sysc_sigpending:
 296         ni      __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
 297         la      %r2,SP_PTREGS(%r15)     # load pt_regs
 298         brasl   %r14,do_signal          # call do_signal
 299         tm      __TI_flags+7(%r9),_TIF_RESTART_SVC
 300         jo      sysc_restart
 301         tm      __TI_flags+7(%r9),_TIF_SINGLE_STEP
 302         jo      sysc_singlestep
 303         j       sysc_work_loop
 304
 305 #
 306 # _TIF_RESTART_SVC is set, set up registers and restart svc
 307 #
 308 sysc_restart:
 309         ni      __TI_flags+7(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC
 310         lg      %r7,SP_R2(%r15)         # load new svc number
 311         slag    %r7,%r7,2               # *4
 312         mvc     SP_R2(8,%r15),SP_ORIG_R2(%r15) # restore first argument
 313         lmg     %r2,%r6,SP_R2(%r15)     # load svc arguments
 314         j       sysc_do_restart         # restart svc
 315
 316 #
 317 # _TIF_SINGLE_STEP is set, call do_single_step
 318 #
 319 sysc_singlestep:
 320         ni      __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
 321         lhi     %r0,__LC_PGM_OLD_PSW
 322         sth     %r0,SP_TRAP(%r15)       # set trap indication to pgm check
 323         la      %r2,SP_PTREGS(%r15)     # address of register-save area
 324         larl    %r14,sysc_return        # load adr. of system return
 325         jg      do_single_step          # branch to do_sigtrap
 326
 327 #
 328 # call syscall_trace before and after system call
 329 # special linkage: %r12 contains the return address for trace_svc
 330 #
 331 sysc_tracesys:
 332         la      %r2,SP_PTREGS(%r15)     # load pt_regs
 333         la      %r3,0
 334         srl     %r7,2
 335         stg     %r7,SP_R2(%r15)
 336         brasl   %r14,syscall_trace
 337         lghi    %r0,NR_syscalls
 338         clg     %r0,SP_R2(%r15)
 339         jnh     sysc_tracenogo
 340         lg      %r7,SP_R2(%r15)         # strace might have changed the
 341         sll     %r7,2                   # system call
 342         lgf     %r8,0(%r7,%r10)
 343 sysc_tracego:
 344         lmg     %r3,%r6,SP_R3(%r15)
 345         lg      %r2,SP_ORIG_R2(%r15)
 346         basr    %r14,%r8                # call sys_xxx
 347         stg     %r2,SP_R2(%r15)         # store return value
 348 sysc_tracenogo:
 349         tm      __TI_flags+7(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
 350         jz      sysc_return
 351         la      %r2,SP_PTREGS(%r15)     # load pt_regs
 352         la      %r3,1
 353         larl    %r14,sysc_return        # return point is sysc_return
 354         jg      syscall_trace
 355
 356 #
 357 # a new process exits the kernel with ret_from_fork
 358 #
 359         .globl  ret_from_fork
 360 ret_from_fork:
 361         lg      %r13,__LC_SVC_NEW_PSW+8
 362         lg      %r9,__LC_THREAD_INFO    # load pointer to thread_info struct
 363         tm      SP_PSW+1(%r15),0x01     # forking a kernel thread ?
 364         jo      0f
 365         stg     %r15,SP_R15(%r15)       # store stack pointer for new kthread
 366 0:      brasl   %r14,schedule_tail
 367         TRACE_IRQS_ON
 368         stosm   24(%r15),0x03           # reenable interrupts
 369         j       sysc_return
 370
 371 #
 372 # kernel_execve function needs to deal with pt_regs that is not
 373 # at the usual place
 374 #
 375         .globl  kernel_execve
 376 kernel_execve:
 377         stmg    %r12,%r15,96(%r15)
 378         lgr     %r14,%r15
 379         aghi    %r15,-SP_SIZE
 380         stg     %r14,__SF_BACKCHAIN(%r15)
 381         la      %r12,SP_PTREGS(%r15)
 382         xc      0(__PT_SIZE,%r12),0(%r12)
 383         lgr     %r5,%r12
 384         brasl   %r14,do_execve
 385         ltgfr   %r2,%r2
 386         je      0f
 387         aghi    %r15,SP_SIZE
 388         lmg     %r12,%r15,96(%r15)
 389         br      %r14
 390         # execve succeeded.
 391 0:      stnsm   __SF_EMPTY(%r15),0xfc   # disable interrupts
 392         lg      %r15,__LC_KERNEL_STACK  # load ksp
 393         aghi    %r15,-SP_SIZE           # make room for registers & psw
 394         lg      %r13,__LC_SVC_NEW_PSW+8
 395         lg      %r9,__LC_THREAD_INFO
 396         mvc     SP_PTREGS(__PT_SIZE,%r15),0(%r12)       # copy pt_regs
 397         xc      __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
 398         stosm   __SF_EMPTY(%r15),0x03   # reenable interrupts
 399         brasl   %r14,execve_tail
 400         j       sysc_return
 401
 402 /*
 403  * Program check handler routine
 404  */
 405
 406         .globl  pgm_check_handler
 407 pgm_check_handler:
 408 /*
 409  * First we need to check for a special case:
 410  * Single stepping an instruction that disables the PER event mask will
 411  * cause a PER event AFTER the mask has been set. Example: SVC or LPSW.
 412  * For a single stepped SVC the program check handler gets control after
 413  * the SVC new PSW has been loaded. But we want to execute the SVC first and
 414  * then handle the PER event. Therefore we update the SVC old PSW to point
 415  * to the pgm_check_handler and branch to the SVC handler after we checked
 416  * if we have to load the kernel stack register.
 417  * For every other possible cause for PER event without the PER mask set
 418  * we just ignore the PER event (FIXME: is there anything we have to do
 419  * for LPSW?).
 420  */
 421         STORE_TIMER __LC_SYNC_ENTER_TIMER
 422         SAVE_ALL_BASE __LC_SAVE_AREA
 423         tm      __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
 424         jnz     pgm_per                  # got per exception -> special case
 425         SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
 426         CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
 427 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
 428         tm      SP_PSW+1(%r15),0x01     # interrupting from user ?
 429         jz      pgm_no_vtime
 430         UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
 431         UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
 432         mvc     __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
 433 pgm_no_vtime:
 434 #endif
 435         lg      %r9,__LC_THREAD_INFO    # load pointer to thread_info struct
 436         lgf     %r3,__LC_PGM_ILC        # load program interruption code
 437         lghi    %r8,0x7f
 438         ngr     %r8,%r3
 439 pgm_do_call:
 440         sll     %r8,3
 441         larl    %r1,pgm_check_table
 442         lg      %r1,0(%r8,%r1)          # load address of handler routine
 443         la      %r2,SP_PTREGS(%r15)     # address of register-save area
 444         larl    %r14,sysc_return
 445         br      %r1                     # branch to interrupt-handler
 446
 447 #
 448 # handle per exception
 449 #
 450 pgm_per:
 451         tm      __LC_PGM_OLD_PSW,0x40   # test if per event recording is on
 452         jnz     pgm_per_std             # ok, normal per event from user space
 453 # ok its one of the special cases, now we need to find out which one
 454         clc     __LC_PGM_OLD_PSW(16),__LC_SVC_NEW_PSW
 455         je      pgm_svcper
 456 # no interesting special case, ignore PER event
 457         lmg     %r12,%r15,__LC_SAVE_AREA
 458         lpswe   __LC_PGM_OLD_PSW
 459
 460 #
 461 # Normal per exception
 462 #
 463 pgm_per_std:
 464         SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
 465         CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
 466 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
 467         tm      SP_PSW+1(%r15),0x01     # interrupting from user ?
 468         jz      pgm_no_vtime2
 469         UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
 470         UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
 471         mvc     __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
 472 pgm_no_vtime2:
 473 #endif
 474         lg      %r9,__LC_THREAD_INFO    # load pointer to thread_info struct
 475         lg      %r1,__TI_task(%r9)
 476         tm      SP_PSW+1(%r15),0x01     # kernel per event ?
 477         jz      kernel_per
 478         mvc     __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
 479         mvc     __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS
 480         mvc     __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
 481         oi      __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
 482         lgf     %r3,__LC_PGM_ILC        # load program interruption code
 483         lghi    %r8,0x7f
 484         ngr     %r8,%r3                 # clear per-event-bit and ilc
 485         je      sysc_return
 486         j       pgm_do_call
 487
 488 #
 489 # it was a single stepped SVC that is causing all the trouble
 490 #
 491 pgm_svcper:
 492         SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
 493         CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
 494 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
 495         tm      SP_PSW+1(%r15),0x01     # interrupting from user ?
 496         jz      pgm_no_vtime3
 497         UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
 498         UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
 499         mvc     __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
 500 pgm_no_vtime3:
 501 #endif
 502         llgh    %r7,__LC_SVC_INT_CODE   # get svc number from lowcore
 503         lg      %r9,__LC_THREAD_INFO    # load pointer to thread_info struct
 504         lg      %r1,__TI_task(%r9)
 505         mvc     __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
 506         mvc     __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS
 507         mvc     __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
 508         oi      __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
 509         TRACE_IRQS_ON
 510         stosm   __SF_EMPTY(%r15),0x03   # reenable interrupts
 511         j       sysc_do_svc
 512
 513 #
 514 # per was called from kernel, must be kprobes
 515 #
 516 kernel_per:
 517         lhi     %r0,__LC_PGM_OLD_PSW
 518         sth     %r0,SP_TRAP(%r15)       # set trap indication to pgm check
 519         la      %r2,SP_PTREGS(%r15)     # address of register-save area
 520         larl    %r14,sysc_leave         # load adr. of system ret, no work
 521         jg      do_single_step          # branch to do_single_step
 522
 523 /*
 524  * IO interrupt handler routine
 525  */
 526         .globl io_int_handler
 527 io_int_handler:
 528         STORE_TIMER __LC_ASYNC_ENTER_TIMER
 529         stck    __LC_INT_CLOCK
 530         SAVE_ALL_BASE __LC_SAVE_AREA+32
 531         SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+32
 532         CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+32
 533 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
 534         tm      SP_PSW+1(%r15),0x01     # interrupting from user ?
 535         jz      io_no_vtime
 536         UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
 537         UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
 538         mvc     __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
 539 io_no_vtime:
 540 #endif
 541         lg      %r9,__LC_THREAD_INFO    # load pointer to thread_info struct
 542         TRACE_IRQS_OFF
 543         la      %r2,SP_PTREGS(%r15)     # address of register-save area
 544         brasl   %r14,do_IRQ             # call standard irq handler
 545         TRACE_IRQS_ON
 546
 547 io_return:
 548         tm      SP_PSW+1(%r15),0x01     # returning to user ?
 549 #ifdef CONFIG_PREEMPT
 550         jno     io_preempt              # no -> check for preemptive scheduling
 551 #else
 552         jno     io_leave                # no-> skip resched & signal
 553 #endif
 554         tm      __TI_flags+7(%r9),_TIF_WORK_INT
 555         jnz     io_work                 # there is work to do (signals etc.)
 556 io_leave:
 557         RESTORE_ALL __LC_RETURN_PSW,0
 558 io_done:
 559
 560 #ifdef CONFIG_PREEMPT
 561 io_preempt:
 562         icm     %r0,15,__TI_precount(%r9)
 563         jnz     io_leave
 564         # switch to kernel stack
 565         lg      %r1,SP_R15(%r15)
 566         aghi    %r1,-SP_SIZE
 567         mvc     SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
 568         xc      __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
 569         lgr     %r15,%r1
 570 io_resume_loop:
 571         tm      __TI_flags+7(%r9),_TIF_NEED_RESCHED
 572         jno     io_leave
 573         larl    %r1,.Lc_pactive
 574         mvc     __TI_precount(4,%r9),0(%r1)
 575         stosm   __SF_EMPTY(%r15),0x03   # reenable interrupts
 576         brasl   %r14,schedule           # call schedule
 577         stnsm   __SF_EMPTY(%r15),0xfc   # disable I/O and ext. interrupts
 578         xc      __TI_precount(4,%r9),__TI_precount(%r9)
 579         j       io_resume_loop
 580 #endif
 581
 582 #
 583 # switch to kernel stack, then check TIF bits
 584 #
 585 io_work:
 586         lg      %r1,__LC_KERNEL_STACK
 587         aghi    %r1,-SP_SIZE
 588         mvc     SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
 589         xc      __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
 590         lgr     %r15,%r1
 591 #
 592 # One of the work bits is on. Find out which one.
 593 # Checked are: _TIF_SIGPENDING, _TIF_RESTORE_SIGPENDING, _TIF_NEED_RESCHED
 594 #              and _TIF_MCCK_PENDING
 595 #
 596 io_work_loop:
 597         tm      __TI_flags+7(%r9),_TIF_MCCK_PENDING
 598         jo      io_mcck_pending
 599         tm      __TI_flags+7(%r9),_TIF_NEED_RESCHED
 600         jo      io_reschedule
 601         tm      __TI_flags+7(%r9),(_TIF_SIGPENDING | _TIF_RESTORE_SIGMASK)
 602         jnz     io_sigpending
 603         j       io_leave
 604
 605 #
 606 # _TIF_MCCK_PENDING is set, call handler
 607 #
 608 io_mcck_pending:
 609         larl    %r14,io_work_loop
 610         jg      s390_handle_mcck        # TIF bit will be cleared by handler
 611
 612 #
 613 # _TIF_NEED_RESCHED is set, call schedule
 614 #
 615 io_reschedule:
 616         stosm   __SF_EMPTY(%r15),0x03   # reenable interrupts
 617         brasl   %r14,schedule           # call scheduler
 618         stnsm   __SF_EMPTY(%r15),0xfc   # disable I/O and ext. interrupts
 619         tm      __TI_flags+7(%r9),_TIF_WORK_INT
 620         jz      io_leave                # there is no work to do
 621         j       io_work_loop
 622
 623 #
 624 # _TIF_SIGPENDING or _TIF_RESTORE_SIGMASK is set, call do_signal
 625 #
 626 io_sigpending:
 627         stosm   __SF_EMPTY(%r15),0x03   # reenable interrupts
 628         la      %r2,SP_PTREGS(%r15)     # load pt_regs
 629         brasl   %r14,do_signal          # call do_signal
 630         stnsm   __SF_EMPTY(%r15),0xfc   # disable I/O and ext. interrupts
 631         j       io_work_loop
 632
 633 /*
 634  * External interrupt handler routine
 635  */
 636         .globl  ext_int_handler
 637 ext_int_handler:
 638         STORE_TIMER __LC_ASYNC_ENTER_TIMER
 639         stck    __LC_INT_CLOCK
 640         SAVE_ALL_BASE __LC_SAVE_AREA+32
 641         SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32
 642         CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32
 643 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
 644         tm      SP_PSW+1(%r15),0x01     # interrupting from user ?
 645         jz      ext_no_vtime
 646         UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
 647         UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
 648         mvc     __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
 649 ext_no_vtime:
 650 #endif
 651         lg      %r9,__LC_THREAD_INFO    # load pointer to thread_info struct
 652         TRACE_IRQS_OFF
 653         la      %r2,SP_PTREGS(%r15)     # address of register-save area
 654         llgh    %r3,__LC_EXT_INT_CODE   # get interruption code
 655         brasl   %r14,do_extint
 656         TRACE_IRQS_ON
 657         j       io_return
 658
 659 __critical_end:
 660
 661 /*
 662  * Machine check handler routines
 663  */
 664         .globl mcck_int_handler
 665 mcck_int_handler:
 666         la      %r1,4095                # revalidate r1
 667         spt     __LC_CPU_TIMER_SAVE_AREA-4095(%r1)      # revalidate cpu timer
 668         lmg     %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs
 669         SAVE_ALL_BASE __LC_SAVE_AREA+64
 670         la      %r12,__LC_MCK_OLD_PSW
 671         tm      __LC_MCCK_CODE,0x80     # system damage?
 672         jo      mcck_int_main           # yes -> rest of mcck code invalid
 673 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
 674         la      %r14,4095
 675         mvc     __LC_SAVE_AREA+104(8),__LC_ASYNC_ENTER_TIMER
 676         mvc     __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA-4095(%r14)
 677         tm      __LC_MCCK_CODE+5,0x02   # stored cpu timer value valid?
 678         jo      1f
 679         la      %r14,__LC_SYNC_ENTER_TIMER
 680         clc     0(8,%r14),__LC_ASYNC_ENTER_TIMER
 681         jl      0f
 682         la      %r14,__LC_ASYNC_ENTER_TIMER
 683 0:      clc     0(8,%r14),__LC_EXIT_TIMER
 684         jl      0f
 685         la      %r14,__LC_EXIT_TIMER
 686 0:      clc     0(8,%r14),__LC_LAST_UPDATE_TIMER
 687         jl      0f
 688         la      %r14,__LC_LAST_UPDATE_TIMER
 689 0:      spt     0(%r14)
 690         mvc     __LC_ASYNC_ENTER_TIMER(8),0(%r14)
 691 1:
 692 #endif
 693         tm      __LC_MCCK_CODE+2,0x09   # mwp + ia of old psw valid?
 694         jno     mcck_int_main           # no -> skip cleanup critical
 695         tm      __LC_MCK_OLD_PSW+1,0x01 # test problem state bit
 696         jnz     mcck_int_main           # from user -> load kernel stack
 697         clc     __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_end)
 698         jhe     mcck_int_main
 699         clc     __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_start)
 700         jl      mcck_int_main
 701         brasl   %r14,cleanup_critical
 702 mcck_int_main:
 703         lg      %r14,__LC_PANIC_STACK   # are we already on the panic stack?
 704         slgr    %r14,%r15
 705         srag    %r14,%r14,PAGE_SHIFT
 706         jz      0f
 707         lg      %r15,__LC_PANIC_STACK   # load panic stack
 708 0:      CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+64
 709 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
 710         tm      __LC_MCCK_CODE+2,0x08   # mwp of old psw valid?
 711         jno     mcck_no_vtime           # no -> no timer update
 712         tm      SP_PSW+1(%r15),0x01     # interrupting from user ?
 713         jz      mcck_no_vtime
 714         UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
 715         UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
 716         mvc     __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
 717 mcck_no_vtime:
 718 #endif
 719         lg      %r9,__LC_THREAD_INFO    # load pointer to thread_info struct
 720         la      %r2,SP_PTREGS(%r15)     # load pt_regs
 721         brasl   %r14,s390_do_machine_check
 722         tm      SP_PSW+1(%r15),0x01     # returning to user ?
 723         jno     mcck_return
 724         lg      %r1,__LC_KERNEL_STACK   # switch to kernel stack
 725         aghi    %r1,-SP_SIZE
 726         mvc     SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
 727         xc      __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
 728         lgr     %r15,%r1
 729         stosm   __SF_EMPTY(%r15),0x04   # turn dat on
 730         tm      __TI_flags+7(%r9),_TIF_MCCK_PENDING
 731         jno     mcck_return
 732         TRACE_IRQS_OFF
 733         brasl   %r14,s390_handle_mcck
 734         TRACE_IRQS_ON
 735 mcck_return:
 736         mvc     __LC_RETURN_MCCK_PSW(16),SP_PSW(%r15) # move return PSW
 737         ni      __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
 738         lmg     %r0,%r15,SP_R0(%r15)    # load gprs 0-15
 739 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
 740         mvc     __LC_ASYNC_ENTER_TIMER(8),__LC_SAVE_AREA+104
 741         tm      __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
 742         jno     0f
 743         stpt    __LC_EXIT_TIMER
 744 0:
 745 #endif
 746         lpswe   __LC_RETURN_MCCK_PSW    # back to caller
 747
 748 #ifdef CONFIG_SMP
 749 /*
 750  * Restart interruption handler, kick starter for additional CPUs
 751  */
 752         .globl restart_int_handler
 753 restart_int_handler:
 754         lg      %r15,__LC_SAVE_AREA+120 # load ksp
 755         lghi    %r10,__LC_CREGS_SAVE_AREA
 756         lctlg   %c0,%c15,0(%r10) # get new ctl regs
 757         lghi    %r10,__LC_AREGS_SAVE_AREA
 758         lam     %a0,%a15,0(%r10)
 759         lmg     %r6,%r15,__SF_GPRS(%r15) # load registers from clone
 760         stosm   __SF_EMPTY(%r15),0x04   # now we can turn dat on
 761         jg      start_secondary
 762 #else
 763 /*
 764  * If we do not run with SMP enabled, let the new CPU crash ...
 765  */
 766         .globl restart_int_handler
 767 restart_int_handler:
 768         basr    %r1,0
 769 restart_base:
 770         lpswe   restart_crash-restart_base(%r1)
 771         .align 8
 772 restart_crash:
 773         .long  0x000a0000,0x00000000,0x00000000,0x00000000
 774 restart_go:
 775 #endif
 776
 777 #ifdef CONFIG_CHECK_STACK
 778 /*
 779  * The synchronous or the asynchronous stack overflowed. We are dead.
 780  * No need to properly save the registers, we are going to panic anyway.
 781  * Setup a pt_regs so that show_trace can provide a good call trace.
 782  */
 783 stack_overflow:
 784         lg      %r15,__LC_PANIC_STACK   # change to panic stack
 785         aghi    %r15,-SP_SIZE
 786         mvc     SP_PSW(16,%r15),0(%r12) # move user PSW to stack
 787         stmg    %r0,%r11,SP_R0(%r15)    # store gprs %r0-%r11 to kernel stack
 788         la      %r1,__LC_SAVE_AREA
 789         chi     %r12,__LC_SVC_OLD_PSW
 790         je      0f
 791         chi     %r12,__LC_PGM_OLD_PSW
 792         je      0f
 793         la      %r1,__LC_SAVE_AREA+32
 794 0:      mvc     SP_R12(32,%r15),0(%r1)  # move %r12-%r15 to stack
 795         xc      __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) # clear back chain
 796         la      %r2,SP_PTREGS(%r15)     # load pt_regs
 797         jg      kernel_stack_overflow
 798 #endif
 799
 800 cleanup_table_system_call:
 801         .quad   system_call, sysc_do_svc
 802 cleanup_table_sysc_return:
 803         .quad   sysc_return, sysc_leave
 804 cleanup_table_sysc_leave:
 805         .quad   sysc_leave, sysc_work_loop
 806 cleanup_table_sysc_work_loop:
 807         .quad   sysc_work_loop, sysc_reschedule
 808 cleanup_table_io_return:
 809         .quad   io_return, io_leave
 810 cleanup_table_io_leave:
 811         .quad   io_leave, io_done
 812 cleanup_table_io_work_loop:
 813         .quad   io_work_loop, io_mcck_pending
 814
 815 cleanup_critical:
 816         clc     8(8,%r12),BASED(cleanup_table_system_call)
 817         jl      0f
 818         clc     8(8,%r12),BASED(cleanup_table_system_call+8)
 819         jl      cleanup_system_call
 820 0:
 821         clc     8(8,%r12),BASED(cleanup_table_sysc_return)
 822         jl      0f
 823         clc     8(8,%r12),BASED(cleanup_table_sysc_return+8)
 824         jl      cleanup_sysc_return
 825 0:
 826         clc     8(8,%r12),BASED(cleanup_table_sysc_leave)
 827         jl      0f
 828         clc     8(8,%r12),BASED(cleanup_table_sysc_leave+8)
 829         jl      cleanup_sysc_leave
 830 0:
 831         clc     8(8,%r12),BASED(cleanup_table_sysc_work_loop)
 832         jl      0f
 833         clc     8(8,%r12),BASED(cleanup_table_sysc_work_loop+8)
 834         jl      cleanup_sysc_return
 835 0:
 836         clc     8(8,%r12),BASED(cleanup_table_io_return)
 837         jl      0f
 838         clc     8(8,%r12),BASED(cleanup_table_io_return+8)
 839         jl      cleanup_io_return
 840 0:
 841         clc     8(8,%r12),BASED(cleanup_table_io_leave)
 842         jl      0f
 843         clc     8(8,%r12),BASED(cleanup_table_io_leave+8)
 844         jl      cleanup_io_leave
 845 0:
 846         clc     8(8,%r12),BASED(cleanup_table_io_work_loop)
 847         jl      0f
 848         clc     8(8,%r12),BASED(cleanup_table_io_work_loop+8)
 849         jl      cleanup_io_return
 850 0:
 851         br      %r14
 852
 853 cleanup_system_call:
 854         mvc     __LC_RETURN_PSW(16),0(%r12)
 855         cghi    %r12,__LC_MCK_OLD_PSW
 856         je      0f
 857         la      %r12,__LC_SAVE_AREA+32
 858         j       1f
 859 0:      la      %r12,__LC_SAVE_AREA+64
 860 1:
 861 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
 862         clc     __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+8)
 863         jh      0f
 864         mvc     __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
 865 0:      clc     __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+16)
 866         jhe     cleanup_vtime
 867 #endif
 868         clc     __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn)
 869         jh      0f
 870         mvc     __LC_SAVE_AREA(32),0(%r12)
 871 0:      stg     %r13,8(%r12)
 872         stg     %r12,__LC_SAVE_AREA+96  # argh
 873         SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
 874         CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
 875         lg      %r12,__LC_SAVE_AREA+96  # argh
 876         stg     %r15,24(%r12)
 877         llgh    %r7,__LC_SVC_INT_CODE
 878 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
 879 cleanup_vtime:
 880         clc     __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+24)
 881         jhe     cleanup_stime
 882         tm      SP_PSW+1(%r15),0x01     # interrupting from user ?
 883         jz      cleanup_novtime
 884         UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
 885 cleanup_stime:
 886         clc     __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+32)
 887         jh      cleanup_update
 888         UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
 889 cleanup_update:
 890         mvc     __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
 891 cleanup_novtime:
 892 #endif
 893         mvc     __LC_RETURN_PSW+8(8),BASED(cleanup_table_system_call+8)
 894         la      %r12,__LC_RETURN_PSW
 895         br      %r14
 896 cleanup_system_call_insn:
 897         .quad   sysc_saveall
 898 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
 899         .quad   system_call
 900         .quad   sysc_vtime
 901         .quad   sysc_stime
 902         .quad   sysc_update
 903 #endif
 904
 905 cleanup_sysc_return:
 906         mvc     __LC_RETURN_PSW(8),0(%r12)
 907         mvc     __LC_RETURN_PSW+8(8),BASED(cleanup_table_sysc_return)
 908         la      %r12,__LC_RETURN_PSW
 909         br      %r14
 910
 911 cleanup_sysc_leave:
 912         clc     8(8,%r12),BASED(cleanup_sysc_leave_insn)
 913         je      2f
 914 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
 915         mvc     __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
 916         clc     8(8,%r12),BASED(cleanup_sysc_leave_insn+8)
 917         je      2f
 918 #endif
 919         mvc     __LC_RETURN_PSW(16),SP_PSW(%r15)
 920         cghi    %r12,__LC_MCK_OLD_PSW
 921         jne     0f
 922         mvc     __LC_SAVE_AREA+64(32),SP_R12(%r15)
 923         j       1f
 924 0:      mvc     __LC_SAVE_AREA+32(32),SP_R12(%r15)
 925 1:      lmg     %r0,%r11,SP_R0(%r15)
 926         lg      %r15,SP_R15(%r15)
 927 2:      la      %r12,__LC_RETURN_PSW
 928         br      %r14
 929 cleanup_sysc_leave_insn:
 930 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
 931         .quad   sysc_leave + 16
 932 #endif
 933         .quad   sysc_leave + 12
 934
 935 cleanup_io_return:
 936         mvc     __LC_RETURN_PSW(8),0(%r12)
 937         mvc     __LC_RETURN_PSW+8(8),BASED(cleanup_table_io_work_loop)
 938         la      %r12,__LC_RETURN_PSW
 939         br      %r14
 940
 941 cleanup_io_leave:
 942         clc     8(8,%r12),BASED(cleanup_io_leave_insn)
 943         je      2f
 944 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
 945         mvc     __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
 946         clc     8(8,%r12),BASED(cleanup_io_leave_insn+8)
 947         je      2f
 948 #endif
 949         mvc     __LC_RETURN_PSW(16),SP_PSW(%r15)
 950         cghi    %r12,__LC_MCK_OLD_PSW
 951         jne     0f
 952         mvc     __LC_SAVE_AREA+64(32),SP_R12(%r15)
 953         j       1f
 954 0:      mvc     __LC_SAVE_AREA+32(32),SP_R12(%r15)
 955 1:      lmg     %r0,%r11,SP_R0(%r15)
 956         lg      %r15,SP_R15(%r15)
 957 2:      la      %r12,__LC_RETURN_PSW
 958         br      %r14
 959 cleanup_io_leave_insn:
 960 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
 961         .quad   io_leave + 20
 962 #endif
 963         .quad   io_leave + 16
 964
 965 /*
 966  * Integer constants
 967  */
 968                 .align  4
 969 .Lconst:
 970 .Lc_pactive:    .long   PREEMPT_ACTIVE
 971 .Lnr_syscalls:  .long   NR_syscalls
 972 .L0x0130:       .short  0x130
 973 .L0x0140:       .short  0x140
 974 .L0x0150:       .short  0x150
 975 .L0x0160:       .short  0x160
 976 .L0x0170:       .short  0x170
 977 .Lcritical_start:
 978                 .quad   __critical_start
 979 .Lcritical_end:
 980                 .quad   __critical_end
 981
 982                 .section .rodata, "a"
 983 #define SYSCALL(esa,esame,emu)  .long esame
 984 sys_call_table:
 985 #include "syscalls.S"
 986 #undef SYSCALL
 987
 988 #ifdef CONFIG_COMPAT
 989
 990 #define SYSCALL(esa,esame,emu)  .long emu
 991 sys_call_table_emu:
 992 #include "syscalls.S"
 993 #undef SYSCALL
 994 #endif