]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blob - arch/s390/kernel/head.S
Merge branch 'fix/hda' into for-linus
[mirror_ubuntu-bionic-kernel.git] / arch / s390 / kernel / head.S
1 /*
2 * arch/s390/kernel/head.S
3 *
4 * Copyright (C) IBM Corp. 1999,2006
5 *
6 * Author(s): Hartmut Penner <hp@de.ibm.com>
7 * Martin Schwidefsky <schwidefsky@de.ibm.com>
8 * Rob van der Heij <rvdhei@iae.nl>
9 * Heiko Carstens <heiko.carstens@de.ibm.com>
10 *
11 * There are 5 different IPL methods
12 * 1) load the image directly into ram at address 0 and do an PSW restart
13 * 2) linload will load the image from address 0x10000 to memory 0x10000
14 * and start the code thru LPSW 0x0008000080010000 (VM only, deprecated)
15 * 3) generate the tape ipl header, store the generated image on a tape
16 * and ipl from it
17 * In case of SL tape you need to IPL 5 times to get past VOL1 etc
18 * 4) generate the vm reader ipl header, move the generated image to the
19 * VM reader (use option NOH!) and do a ipl from reader (VM only)
20 * 5) direct call of start by the SALIPL loader
21 * We use the cpuid to distinguish between VM and native ipl
22 * params for kernel are pushed to 0x10400 (see setup.h)
23 *
24 */
25
26 #include <linux/init.h>
27 #include <asm/setup.h>
28 #include <asm/lowcore.h>
29 #include <asm/asm-offsets.h>
30 #include <asm/thread_info.h>
31 #include <asm/page.h>
32
33 #ifdef CONFIG_64BIT
34 #define ARCH_OFFSET 4
35 #else
36 #define ARCH_OFFSET 0
37 #endif
38
39 __HEAD
40 #ifndef CONFIG_IPL
41 .org 0
42 .long 0x00080000,0x80000000+startup # Just a restart PSW
43 #else
44 #ifdef CONFIG_IPL_TAPE
45 #define IPL_BS 1024
46 .org 0
47 .long 0x00080000,0x80000000+iplstart # The first 24 bytes are loaded
48 .long 0x27000000,0x60000001 # by ipl to addresses 0-23.
49 .long 0x02000000,0x20000000+IPL_BS # (a PSW and two CCWs).
50 .long 0x00000000,0x00000000 # external old psw
51 .long 0x00000000,0x00000000 # svc old psw
52 .long 0x00000000,0x00000000 # program check old psw
53 .long 0x00000000,0x00000000 # machine check old psw
54 .long 0x00000000,0x00000000 # io old psw
55 .long 0x00000000,0x00000000
56 .long 0x00000000,0x00000000
57 .long 0x00000000,0x00000000
58 .long 0x000a0000,0x00000058 # external new psw
59 .long 0x000a0000,0x00000060 # svc new psw
60 .long 0x000a0000,0x00000068 # program check new psw
61 .long 0x000a0000,0x00000070 # machine check new psw
62 .long 0x00080000,0x80000000+.Lioint # io new psw
63
64 .org 0x100
65 #
66 # subroutine for loading from tape
67 # Paramters:
68 # R1 = device number
69 # R2 = load address
70 .Lloader:
71 st %r14,.Lldret
72 la %r3,.Lorbread # r3 = address of orb
73 la %r5,.Lirb # r5 = address of irb
74 st %r2,.Lccwread+4 # initialize CCW data addresses
75 lctl %c6,%c6,.Lcr6
76 slr %r2,%r2
77 .Lldlp:
78 la %r6,3 # 3 retries
79 .Lssch:
80 ssch 0(%r3) # load chunk of IPL_BS bytes
81 bnz .Llderr
82 .Lw4end:
83 bas %r14,.Lwait4io
84 tm 8(%r5),0x82 # do we have a problem ?
85 bnz .Lrecov
86 slr %r7,%r7
87 icm %r7,3,10(%r5) # get residual count
88 lcr %r7,%r7
89 la %r7,IPL_BS(%r7) # IPL_BS-residual=#bytes read
90 ar %r2,%r7 # add to total size
91 tm 8(%r5),0x01 # found a tape mark ?
92 bnz .Ldone
93 l %r0,.Lccwread+4 # update CCW data addresses
94 ar %r0,%r7
95 st %r0,.Lccwread+4
96 b .Lldlp
97 .Ldone:
98 l %r14,.Lldret
99 br %r14 # r2 contains the total size
100 .Lrecov:
101 bas %r14,.Lsense # do the sensing
102 bct %r6,.Lssch # dec. retry count & branch
103 b .Llderr
104 #
105 # Sense subroutine
106 #
107 .Lsense:
108 st %r14,.Lsnsret
109 la %r7,.Lorbsense
110 ssch 0(%r7) # start sense command
111 bnz .Llderr
112 bas %r14,.Lwait4io
113 l %r14,.Lsnsret
114 tm 8(%r5),0x82 # do we have a problem ?
115 bnz .Llderr
116 br %r14
117 #
118 # Wait for interrupt subroutine
119 #
120 .Lwait4io:
121 lpsw .Lwaitpsw
122 .Lioint:
123 c %r1,0xb8 # compare subchannel number
124 bne .Lwait4io
125 tsch 0(%r5)
126 slr %r0,%r0
127 tm 8(%r5),0x82 # do we have a problem ?
128 bnz .Lwtexit
129 tm 8(%r5),0x04 # got device end ?
130 bz .Lwait4io
131 .Lwtexit:
132 br %r14
133 .Llderr:
134 lpsw .Lcrash
135
136 .align 8
137 .Lorbread:
138 .long 0x00000000,0x0080ff00,.Lccwread
139 .align 8
140 .Lorbsense:
141 .long 0x00000000,0x0080ff00,.Lccwsense
142 .align 8
143 .Lccwread:
144 .long 0x02200000+IPL_BS,0x00000000
145 .Lccwsense:
146 .long 0x04200001,0x00000000
147 .Lwaitpsw:
148 .long 0x020a0000,0x80000000+.Lioint
149
150 .Lirb: .long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
151 .Lcr6: .long 0xff000000
152 .align 8
153 .Lcrash:.long 0x000a0000,0x00000000
154 .Lldret:.long 0
155 .Lsnsret: .long 0
156 #endif /* CONFIG_IPL_TAPE */
157
158 #ifdef CONFIG_IPL_VM
159 #define IPL_BS 0x730
160 .org 0
161 .long 0x00080000,0x80000000+iplstart # The first 24 bytes are loaded
162 .long 0x02000018,0x60000050 # by ipl to addresses 0-23.
163 .long 0x02000068,0x60000050 # (a PSW and two CCWs).
164 .fill 80-24,1,0x40 # bytes 24-79 are discarded !!
165 .long 0x020000f0,0x60000050 # The next 160 byte are loaded
166 .long 0x02000140,0x60000050 # to addresses 0x18-0xb7
167 .long 0x02000190,0x60000050 # They form the continuation
168 .long 0x020001e0,0x60000050 # of the CCW program started
169 .long 0x02000230,0x60000050 # by ipl and load the range
170 .long 0x02000280,0x60000050 # 0x0f0-0x730 from the image
171 .long 0x020002d0,0x60000050 # to the range 0x0f0-0x730
172 .long 0x02000320,0x60000050 # in memory. At the end of
173 .long 0x02000370,0x60000050 # the channel program the PSW
174 .long 0x020003c0,0x60000050 # at location 0 is loaded.
175 .long 0x02000410,0x60000050 # Initial processing starts
176 .long 0x02000460,0x60000050 # at 0xf0 = iplstart.
177 .long 0x020004b0,0x60000050
178 .long 0x02000500,0x60000050
179 .long 0x02000550,0x60000050
180 .long 0x020005a0,0x60000050
181 .long 0x020005f0,0x60000050
182 .long 0x02000640,0x60000050
183 .long 0x02000690,0x60000050
184 .long 0x020006e0,0x20000050
185
186 .org 0xf0
187 #
188 # subroutine for loading cards from the reader
189 #
190 .Lloader:
191 la %r3,.Lorb # r2 = address of orb into r2
192 la %r5,.Lirb # r4 = address of irb
193 la %r6,.Lccws
194 la %r7,20
195 .Linit:
196 st %r2,4(%r6) # initialize CCW data addresses
197 la %r2,0x50(%r2)
198 la %r6,8(%r6)
199 bct 7,.Linit
200
201 lctl %c6,%c6,.Lcr6 # set IO subclass mask
202 slr %r2,%r2
203 .Lldlp:
204 ssch 0(%r3) # load chunk of 1600 bytes
205 bnz .Llderr
206 .Lwait4irq:
207 mvc 0x78(8),.Lnewpsw # set up IO interrupt psw
208 lpsw .Lwaitpsw
209 .Lioint:
210 c %r1,0xb8 # compare subchannel number
211 bne .Lwait4irq
212 tsch 0(%r5)
213
214 slr %r0,%r0
215 ic %r0,8(%r5) # get device status
216 chi %r0,8 # channel end ?
217 be .Lcont
218 chi %r0,12 # channel end + device end ?
219 be .Lcont
220
221 l %r0,4(%r5)
222 s %r0,8(%r3) # r0/8 = number of ccws executed
223 mhi %r0,10 # *10 = number of bytes in ccws
224 lh %r3,10(%r5) # get residual count
225 sr %r0,%r3 # #ccws*80-residual=#bytes read
226 ar %r2,%r0
227
228 br %r14 # r2 contains the total size
229
230 .Lcont:
231 ahi %r2,0x640 # add 0x640 to total size
232 la %r6,.Lccws
233 la %r7,20
234 .Lincr:
235 l %r0,4(%r6) # update CCW data addresses
236 ahi %r0,0x640
237 st %r0,4(%r6)
238 ahi %r6,8
239 bct 7,.Lincr
240
241 b .Lldlp
242 .Llderr:
243 lpsw .Lcrash
244
245 .align 8
246 .Lorb: .long 0x00000000,0x0080ff00,.Lccws
247 .Lirb: .long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
248 .Lcr6: .long 0xff000000
249 .Lloadp:.long 0,0
250 .align 8
251 .Lcrash:.long 0x000a0000,0x00000000
252 .Lnewpsw:
253 .long 0x00080000,0x80000000+.Lioint
254 .Lwaitpsw:
255 .long 0x020a0000,0x80000000+.Lioint
256
257 .align 8
258 .Lccws: .rept 19
259 .long 0x02600050,0x00000000
260 .endr
261 .long 0x02200050,0x00000000
262 #endif /* CONFIG_IPL_VM */
263
264 iplstart:
265 lh %r1,0xb8 # test if subchannel number
266 bct %r1,.Lnoload # is valid
267 l %r1,0xb8 # load ipl subchannel number
268 la %r2,IPL_BS # load start address
269 bas %r14,.Lloader # load rest of ipl image
270 l %r12,.Lparm # pointer to parameter area
271 st %r1,IPL_DEVICE+ARCH_OFFSET-PARMAREA(%r12) # save ipl device number
272
273 #
274 # load parameter file from ipl device
275 #
276 .Lagain1:
277 l %r2,.Linitrd # ramdisk loc. is temp
278 bas %r14,.Lloader # load parameter file
279 ltr %r2,%r2 # got anything ?
280 bz .Lnopf
281 chi %r2,895
282 bnh .Lnotrunc
283 la %r2,895
284 .Lnotrunc:
285 l %r4,.Linitrd
286 clc 0(3,%r4),.L_hdr # if it is HDRx
287 bz .Lagain1 # skip dataset header
288 clc 0(3,%r4),.L_eof # if it is EOFx
289 bz .Lagain1 # skip dateset trailer
290 la %r5,0(%r4,%r2)
291 lr %r3,%r2
292 .Lidebc:
293 tm 0(%r5),0x80 # high order bit set ?
294 bo .Ldocv # yes -> convert from EBCDIC
295 ahi %r5,-1
296 bct %r3,.Lidebc
297 b .Lnocv
298 .Ldocv:
299 l %r3,.Lcvtab
300 tr 0(256,%r4),0(%r3) # convert parameters to ascii
301 tr 256(256,%r4),0(%r3)
302 tr 512(256,%r4),0(%r3)
303 tr 768(122,%r4),0(%r3)
304 .Lnocv: la %r3,COMMAND_LINE-PARMAREA(%r12) # load adr. of command line
305 mvc 0(256,%r3),0(%r4)
306 mvc 256(256,%r3),256(%r4)
307 mvc 512(256,%r3),512(%r4)
308 mvc 768(122,%r3),768(%r4)
309 slr %r0,%r0
310 b .Lcntlp
311 .Ldelspc:
312 ic %r0,0(%r2,%r3)
313 chi %r0,0x20 # is it a space ?
314 be .Lcntlp
315 ahi %r2,1
316 b .Leolp
317 .Lcntlp:
318 brct %r2,.Ldelspc
319 .Leolp:
320 slr %r0,%r0
321 stc %r0,0(%r2,%r3) # terminate buffer
322 .Lnopf:
323
324 #
325 # load ramdisk from ipl device
326 #
327 .Lagain2:
328 l %r2,.Linitrd # addr of ramdisk
329 st %r2,INITRD_START+ARCH_OFFSET-PARMAREA(%r12)
330 bas %r14,.Lloader # load ramdisk
331 st %r2,INITRD_SIZE+ARCH_OFFSET-PARMAREA(%r12) # store size of rd
332 ltr %r2,%r2
333 bnz .Lrdcont
334 st %r2,INITRD_START+ARCH_OFFSET-PARMAREA(%r12) # no ramdisk found
335 .Lrdcont:
336 l %r2,.Linitrd
337
338 clc 0(3,%r2),.L_hdr # skip HDRx and EOFx
339 bz .Lagain2
340 clc 0(3,%r2),.L_eof
341 bz .Lagain2
342
343 #ifdef CONFIG_IPL_VM
344 #
345 # reset files in VM reader
346 #
347 stidp __LC_CPUID # store cpuid
348 tm __LC_CPUID,0xff # running VM ?
349 bno .Lnoreset
350 la %r2,.Lreset
351 lhi %r3,26
352 diag %r2,%r3,8
353 la %r5,.Lirb
354 stsch 0(%r5) # check if irq is pending
355 tm 30(%r5),0x0f # by verifying if any of the
356 bnz .Lwaitforirq # activity or status control
357 tm 31(%r5),0xff # bits is set in the schib
358 bz .Lnoreset
359 .Lwaitforirq:
360 mvc 0x78(8),.Lrdrnewpsw # set up IO interrupt psw
361 .Lwaitrdrirq:
362 lpsw .Lrdrwaitpsw
363 .Lrdrint:
364 c %r1,0xb8 # compare subchannel number
365 bne .Lwaitrdrirq
366 la %r5,.Lirb
367 tsch 0(%r5)
368 .Lnoreset:
369 b .Lnoload
370
371 .align 8
372 .Lrdrnewpsw:
373 .long 0x00080000,0x80000000+.Lrdrint
374 .Lrdrwaitpsw:
375 .long 0x020a0000,0x80000000+.Lrdrint
376 #endif
377
378 #
379 # everything loaded, go for it
380 #
381 .Lnoload:
382 l %r1,.Lstartup
383 br %r1
384
385 .Linitrd:.long _end + 0x400000 # default address of initrd
386 .Lparm: .long PARMAREA
387 .Lstartup: .long startup
388 .Lcvtab:.long _ebcasc # ebcdic to ascii table
389 .Lreset:.byte 0xc3,0xc8,0xc1,0xd5,0xc7,0xc5,0x40,0xd9,0xc4,0xd9,0x40
390 .byte 0xc1,0xd3,0xd3,0x40,0xd2,0xc5,0xc5,0xd7,0x40,0xd5,0xd6
391 .byte 0xc8,0xd6,0xd3,0xc4 # "change rdr all keep nohold"
392 .L_eof: .long 0xc5d6c600 /* C'EOF' */
393 .L_hdr: .long 0xc8c4d900 /* C'HDR' */
394
395 #endif /* CONFIG_IPL */
396
397 #
398 # SALIPL loader support. Based on a patch by Rob van der Heij.
399 # This entry point is called directly from the SALIPL loader and
400 # doesn't need a builtin ipl record.
401 #
402 .org 0x800
403 .globl start
404 start:
405 stm %r0,%r15,0x07b0 # store registers
406 basr %r12,%r0
407 .base:
408 l %r11,.parm
409 l %r8,.cmd # pointer to command buffer
410
411 ltr %r9,%r9 # do we have SALIPL parameters?
412 bp .sk8x8
413
414 mvc 0(64,%r8),0x00b0 # copy saved registers
415 xc 64(240-64,%r8),0(%r8) # remainder of buffer
416 tr 0(64,%r8),.lowcase
417 b .gotr
418 .sk8x8:
419 mvc 0(240,%r8),0(%r9) # copy iplparms into buffer
420 .gotr:
421 l %r10,.tbl # EBCDIC to ASCII table
422 tr 0(240,%r8),0(%r10)
423 slr %r0,%r0
424 st %r0,INITRD_SIZE+ARCH_OFFSET-PARMAREA(%r11)
425 st %r0,INITRD_START+ARCH_OFFSET-PARMAREA(%r11)
426 j startup # continue with startup
427 .tbl: .long _ebcasc # translate table
428 .cmd: .long COMMAND_LINE # address of command line buffer
429 .parm: .long PARMAREA
430 .lowcase:
431 .byte 0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07
432 .byte 0x08,0x09,0x0a,0x0b,0x0c,0x0d,0x0e,0x0f
433 .byte 0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17
434 .byte 0x18,0x19,0x1a,0x1b,0x1c,0x1d,0x1e,0x1f
435 .byte 0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27
436 .byte 0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f
437 .byte 0x30,0x31,0x32,0x33,0x34,0x35,0x36,0x37
438 .byte 0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f
439 .byte 0x40,0x41,0x42,0x43,0x44,0x45,0x46,0x47
440 .byte 0x48,0x49,0x4a,0x4b,0x4c,0x4d,0x4e,0x4f
441 .byte 0x50,0x51,0x52,0x53,0x54,0x55,0x56,0x57
442 .byte 0x58,0x59,0x5a,0x5b,0x5c,0x5d,0x5e,0x5f
443 .byte 0x60,0x61,0x62,0x63,0x64,0x65,0x66,0x67
444 .byte 0x68,0x69,0x6a,0x6b,0x6c,0x6d,0x6e,0x6f
445 .byte 0x70,0x71,0x72,0x73,0x74,0x75,0x76,0x77
446 .byte 0x78,0x79,0x7a,0x7b,0x7c,0x7d,0x7e,0x7f
447
448 .byte 0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87
449 .byte 0x88,0x89,0x8a,0x8b,0x8c,0x8d,0x8e,0x8f
450 .byte 0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97
451 .byte 0x98,0x99,0x9a,0x9b,0x9c,0x9d,0x9e,0x9f
452 .byte 0xa0,0xa1,0xa2,0xa3,0xa4,0xa5,0xa6,0xa7
453 .byte 0xa8,0xa9,0xaa,0xab,0xac,0xad,0xae,0xaf
454 .byte 0xb0,0xb1,0xb2,0xb3,0xb4,0xb5,0xb6,0xb7
455 .byte 0xb8,0xb9,0xba,0xbb,0xbc,0xbd,0xbe,0xbf
456 .byte 0xc0,0x81,0x82,0x83,0x84,0x85,0x86,0x87 # .abcdefg
457 .byte 0x88,0x89,0xca,0xcb,0xcc,0xcd,0xce,0xcf # hi
458 .byte 0xd0,0x91,0x92,0x93,0x94,0x95,0x96,0x97 # .jklmnop
459 .byte 0x98,0x99,0xda,0xdb,0xdc,0xdd,0xde,0xdf # qr
460 .byte 0xe0,0xe1,0xa2,0xa3,0xa4,0xa5,0xa6,0xa7 # ..stuvwx
461 .byte 0xa8,0xa9,0xea,0xeb,0xec,0xed,0xee,0xef # yz
462 .byte 0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7
463 .byte 0xf8,0xf9,0xfa,0xfb,0xfc,0xfd,0xfe,0xff
464
465 #
466 # startup-code at 0x10000, running in absolute addressing mode
467 # this is called either by the ipl loader or directly by PSW restart
468 # or linload or SALIPL
469 #
470 .org 0x10000
471 startup:basr %r13,0 # get base
472 .LPG0:
473 xc 0x200(256),0x200 # partially clear lowcore
474 xc 0x300(256),0x300
475 l %r1,5f-.LPG0(%r13)
476 stck 0(%r1)
477 spt 6f-.LPG0(%r13)
478 mvc __LC_LAST_UPDATE_CLOCK(8),0(%r1)
479 mvc __LC_LAST_UPDATE_TIMER(8),6f-.LPG0(%r13)
480 mvc __LC_EXIT_TIMER(8),5f-.LPG0(%r13)
481 #ifndef CONFIG_MARCH_G5
482 # check processor version against MARCH_{G5,Z900,Z990,Z9_109,Z10}
483 stidp __LC_CPUID # store cpuid
484 lhi %r0,(3f-2f) / 2
485 la %r1,2f-.LPG0(%r13)
486 0: clc __LC_CPUID+4(2),0(%r1)
487 jne 3f
488 lpsw 1f-.LPG0(13) # machine type not good enough, crash
489 .align 16
490 1: .long 0x000a0000,0x00000000
491 2:
492 #if defined(CONFIG_MARCH_Z10)
493 .short 0x9672, 0x2064, 0x2066, 0x2084, 0x2086, 0x2094, 0x2096
494 #elif defined(CONFIG_MARCH_Z9_109)
495 .short 0x9672, 0x2064, 0x2066, 0x2084, 0x2086
496 #elif defined(CONFIG_MARCH_Z990)
497 .short 0x9672, 0x2064, 0x2066
498 #elif defined(CONFIG_MARCH_Z900)
499 .short 0x9672
500 #endif
501 3: la %r1,2(%r1)
502 brct %r0,0b
503 #endif
504
505 l %r13,4f-.LPG0(%r13)
506 b 0(%r13)
507 .align 4
508 4: .long startup_continue
509 5: .long sched_clock_base_cc
510 .align 8
511 6: .long 0x7fffffff,0xffffffff
512
513 #
514 # params at 10400 (setup.h)
515 #
516 .org PARMAREA
517 .long 0,0 # IPL_DEVICE
518 .long 0,0 # INITRD_START
519 .long 0,0 # INITRD_SIZE
520
521 .org COMMAND_LINE
522 .byte "root=/dev/ram0 ro"
523 .byte 0
524
525 #ifdef CONFIG_64BIT
526 #include "head64.S"
527 #else
528 #include "head31.S"
529 #endif