]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blob - arch/s390/kernel/time.c
include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit...
[mirror_ubuntu-artful-kernel.git] / arch / s390 / kernel / time.c
1 /*
2 * arch/s390/kernel/time.c
3 * Time of day based timer functions.
4 *
5 * S390 version
6 * Copyright IBM Corp. 1999, 2008
7 * Author(s): Hartmut Penner (hp@de.ibm.com),
8 * Martin Schwidefsky (schwidefsky@de.ibm.com),
9 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
10 *
11 * Derived from "arch/i386/kernel/time.c"
12 * Copyright (C) 1991, 1992, 1995 Linus Torvalds
13 */
14
15 #define KMSG_COMPONENT "time"
16 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
17
18 #include <linux/errno.h>
19 #include <linux/module.h>
20 #include <linux/sched.h>
21 #include <linux/kernel.h>
22 #include <linux/param.h>
23 #include <linux/string.h>
24 #include <linux/mm.h>
25 #include <linux/interrupt.h>
26 #include <linux/cpu.h>
27 #include <linux/stop_machine.h>
28 #include <linux/time.h>
29 #include <linux/sysdev.h>
30 #include <linux/delay.h>
31 #include <linux/init.h>
32 #include <linux/smp.h>
33 #include <linux/types.h>
34 #include <linux/profile.h>
35 #include <linux/timex.h>
36 #include <linux/notifier.h>
37 #include <linux/clocksource.h>
38 #include <linux/clockchips.h>
39 #include <linux/gfp.h>
40 #include <asm/uaccess.h>
41 #include <asm/delay.h>
42 #include <asm/s390_ext.h>
43 #include <asm/div64.h>
44 #include <asm/vdso.h>
45 #include <asm/irq.h>
46 #include <asm/irq_regs.h>
47 #include <asm/timer.h>
48 #include <asm/etr.h>
49 #include <asm/cio.h>
50
51 /* change this if you have some constant time drift */
52 #define USECS_PER_JIFFY ((unsigned long) 1000000/HZ)
53 #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12)
54
55 u64 sched_clock_base_cc = -1; /* Force to data section. */
56 EXPORT_SYMBOL_GPL(sched_clock_base_cc);
57
58 static DEFINE_PER_CPU(struct clock_event_device, comparators);
59
60 /*
61 * Scheduler clock - returns current time in nanosec units.
62 */
63 unsigned long long notrace sched_clock(void)
64 {
65 return (get_clock_monotonic() * 125) >> 9;
66 }
67
68 /*
69 * Monotonic_clock - returns # of nanoseconds passed since time_init()
70 */
71 unsigned long long monotonic_clock(void)
72 {
73 return sched_clock();
74 }
75 EXPORT_SYMBOL(monotonic_clock);
76
77 void tod_to_timeval(__u64 todval, struct timespec *xt)
78 {
79 unsigned long long sec;
80
81 sec = todval >> 12;
82 do_div(sec, 1000000);
83 xt->tv_sec = sec;
84 todval -= (sec * 1000000) << 12;
85 xt->tv_nsec = ((todval * 1000) >> 12);
86 }
87 EXPORT_SYMBOL(tod_to_timeval);
88
89 void clock_comparator_work(void)
90 {
91 struct clock_event_device *cd;
92
93 S390_lowcore.clock_comparator = -1ULL;
94 set_clock_comparator(S390_lowcore.clock_comparator);
95 cd = &__get_cpu_var(comparators);
96 cd->event_handler(cd);
97 }
98
99 /*
100 * Fixup the clock comparator.
101 */
102 static void fixup_clock_comparator(unsigned long long delta)
103 {
104 /* If nobody is waiting there's nothing to fix. */
105 if (S390_lowcore.clock_comparator == -1ULL)
106 return;
107 S390_lowcore.clock_comparator += delta;
108 set_clock_comparator(S390_lowcore.clock_comparator);
109 }
110
111 static int s390_next_event(unsigned long delta,
112 struct clock_event_device *evt)
113 {
114 S390_lowcore.clock_comparator = get_clock() + delta;
115 set_clock_comparator(S390_lowcore.clock_comparator);
116 return 0;
117 }
118
119 static void s390_set_mode(enum clock_event_mode mode,
120 struct clock_event_device *evt)
121 {
122 }
123
124 /*
125 * Set up lowcore and control register of the current cpu to
126 * enable TOD clock and clock comparator interrupts.
127 */
128 void init_cpu_timer(void)
129 {
130 struct clock_event_device *cd;
131 int cpu;
132
133 S390_lowcore.clock_comparator = -1ULL;
134 set_clock_comparator(S390_lowcore.clock_comparator);
135
136 cpu = smp_processor_id();
137 cd = &per_cpu(comparators, cpu);
138 cd->name = "comparator";
139 cd->features = CLOCK_EVT_FEAT_ONESHOT;
140 cd->mult = 16777;
141 cd->shift = 12;
142 cd->min_delta_ns = 1;
143 cd->max_delta_ns = LONG_MAX;
144 cd->rating = 400;
145 cd->cpumask = cpumask_of(cpu);
146 cd->set_next_event = s390_next_event;
147 cd->set_mode = s390_set_mode;
148
149 clockevents_register_device(cd);
150
151 /* Enable clock comparator timer interrupt. */
152 __ctl_set_bit(0,11);
153
154 /* Always allow the timing alert external interrupt. */
155 __ctl_set_bit(0, 4);
156 }
157
158 static void clock_comparator_interrupt(__u16 code)
159 {
160 if (S390_lowcore.clock_comparator == -1ULL)
161 set_clock_comparator(S390_lowcore.clock_comparator);
162 }
163
164 static void etr_timing_alert(struct etr_irq_parm *);
165 static void stp_timing_alert(struct stp_irq_parm *);
166
167 static void timing_alert_interrupt(__u16 code)
168 {
169 if (S390_lowcore.ext_params & 0x00c40000)
170 etr_timing_alert((struct etr_irq_parm *)
171 &S390_lowcore.ext_params);
172 if (S390_lowcore.ext_params & 0x00038000)
173 stp_timing_alert((struct stp_irq_parm *)
174 &S390_lowcore.ext_params);
175 }
176
177 static void etr_reset(void);
178 static void stp_reset(void);
179
180 void read_persistent_clock(struct timespec *ts)
181 {
182 tod_to_timeval(get_clock() - TOD_UNIX_EPOCH, ts);
183 }
184
185 void read_boot_clock(struct timespec *ts)
186 {
187 tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, ts);
188 }
189
190 static cycle_t read_tod_clock(struct clocksource *cs)
191 {
192 return get_clock();
193 }
194
195 static struct clocksource clocksource_tod = {
196 .name = "tod",
197 .rating = 400,
198 .read = read_tod_clock,
199 .mask = -1ULL,
200 .mult = 1000,
201 .shift = 12,
202 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
203 };
204
205 struct clocksource * __init clocksource_default_clock(void)
206 {
207 return &clocksource_tod;
208 }
209
210 void update_vsyscall(struct timespec *wall_time, struct clocksource *clock,
211 u32 mult)
212 {
213 if (clock != &clocksource_tod)
214 return;
215
216 /* Make userspace gettimeofday spin until we're done. */
217 ++vdso_data->tb_update_count;
218 smp_wmb();
219 vdso_data->xtime_tod_stamp = clock->cycle_last;
220 vdso_data->xtime_clock_sec = wall_time->tv_sec;
221 vdso_data->xtime_clock_nsec = wall_time->tv_nsec;
222 vdso_data->wtom_clock_sec = wall_to_monotonic.tv_sec;
223 vdso_data->wtom_clock_nsec = wall_to_monotonic.tv_nsec;
224 smp_wmb();
225 ++vdso_data->tb_update_count;
226 }
227
228 extern struct timezone sys_tz;
229
230 void update_vsyscall_tz(void)
231 {
232 /* Make userspace gettimeofday spin until we're done. */
233 ++vdso_data->tb_update_count;
234 smp_wmb();
235 vdso_data->tz_minuteswest = sys_tz.tz_minuteswest;
236 vdso_data->tz_dsttime = sys_tz.tz_dsttime;
237 smp_wmb();
238 ++vdso_data->tb_update_count;
239 }
240
241 /*
242 * Initialize the TOD clock and the CPU timer of
243 * the boot cpu.
244 */
245 void __init time_init(void)
246 {
247 /* Reset time synchronization interfaces. */
248 etr_reset();
249 stp_reset();
250
251 /* request the clock comparator external interrupt */
252 if (register_external_interrupt(0x1004, clock_comparator_interrupt))
253 panic("Couldn't request external interrupt 0x1004");
254
255 /* request the timing alert external interrupt */
256 if (register_external_interrupt(0x1406, timing_alert_interrupt))
257 panic("Couldn't request external interrupt 0x1406");
258
259 if (clocksource_register(&clocksource_tod) != 0)
260 panic("Could not register TOD clock source");
261
262 /* Enable TOD clock interrupts on the boot cpu. */
263 init_cpu_timer();
264
265 /* Enable cpu timer interrupts on the boot cpu. */
266 vtime_init();
267 }
268
269 /*
270 * The time is "clock". old is what we think the time is.
271 * Adjust the value by a multiple of jiffies and add the delta to ntp.
272 * "delay" is an approximation how long the synchronization took. If
273 * the time correction is positive, then "delay" is subtracted from
274 * the time difference and only the remaining part is passed to ntp.
275 */
276 static unsigned long long adjust_time(unsigned long long old,
277 unsigned long long clock,
278 unsigned long long delay)
279 {
280 unsigned long long delta, ticks;
281 struct timex adjust;
282
283 if (clock > old) {
284 /* It is later than we thought. */
285 delta = ticks = clock - old;
286 delta = ticks = (delta < delay) ? 0 : delta - delay;
287 delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
288 adjust.offset = ticks * (1000000 / HZ);
289 } else {
290 /* It is earlier than we thought. */
291 delta = ticks = old - clock;
292 delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
293 delta = -delta;
294 adjust.offset = -ticks * (1000000 / HZ);
295 }
296 sched_clock_base_cc += delta;
297 if (adjust.offset != 0) {
298 pr_notice("The ETR interface has adjusted the clock "
299 "by %li microseconds\n", adjust.offset);
300 adjust.modes = ADJ_OFFSET_SINGLESHOT;
301 do_adjtimex(&adjust);
302 }
303 return delta;
304 }
305
306 static DEFINE_PER_CPU(atomic_t, clock_sync_word);
307 static DEFINE_MUTEX(clock_sync_mutex);
308 static unsigned long clock_sync_flags;
309
310 #define CLOCK_SYNC_HAS_ETR 0
311 #define CLOCK_SYNC_HAS_STP 1
312 #define CLOCK_SYNC_ETR 2
313 #define CLOCK_SYNC_STP 3
314
315 /*
316 * The synchronous get_clock function. It will write the current clock
317 * value to the clock pointer and return 0 if the clock is in sync with
318 * the external time source. If the clock mode is local it will return
319 * -ENOSYS and -EAGAIN if the clock is not in sync with the external
320 * reference.
321 */
322 int get_sync_clock(unsigned long long *clock)
323 {
324 atomic_t *sw_ptr;
325 unsigned int sw0, sw1;
326
327 sw_ptr = &get_cpu_var(clock_sync_word);
328 sw0 = atomic_read(sw_ptr);
329 *clock = get_clock();
330 sw1 = atomic_read(sw_ptr);
331 put_cpu_var(clock_sync_word);
332 if (sw0 == sw1 && (sw0 & 0x80000000U))
333 /* Success: time is in sync. */
334 return 0;
335 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) &&
336 !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
337 return -ENOSYS;
338 if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) &&
339 !test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
340 return -EACCES;
341 return -EAGAIN;
342 }
343 EXPORT_SYMBOL(get_sync_clock);
344
345 /*
346 * Make get_sync_clock return -EAGAIN.
347 */
348 static void disable_sync_clock(void *dummy)
349 {
350 atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
351 /*
352 * Clear the in-sync bit 2^31. All get_sync_clock calls will
353 * fail until the sync bit is turned back on. In addition
354 * increase the "sequence" counter to avoid the race of an
355 * etr event and the complete recovery against get_sync_clock.
356 */
357 atomic_clear_mask(0x80000000, sw_ptr);
358 atomic_inc(sw_ptr);
359 }
360
361 /*
362 * Make get_sync_clock return 0 again.
363 * Needs to be called from a context disabled for preemption.
364 */
365 static void enable_sync_clock(void)
366 {
367 atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
368 atomic_set_mask(0x80000000, sw_ptr);
369 }
370
371 /*
372 * Function to check if the clock is in sync.
373 */
374 static inline int check_sync_clock(void)
375 {
376 atomic_t *sw_ptr;
377 int rc;
378
379 sw_ptr = &get_cpu_var(clock_sync_word);
380 rc = (atomic_read(sw_ptr) & 0x80000000U) != 0;
381 put_cpu_var(clock_sync_word);
382 return rc;
383 }
384
385 /* Single threaded workqueue used for etr and stp sync events */
386 static struct workqueue_struct *time_sync_wq;
387
388 static void __init time_init_wq(void)
389 {
390 if (time_sync_wq)
391 return;
392 time_sync_wq = create_singlethread_workqueue("timesync");
393 stop_machine_create();
394 }
395
396 /*
397 * External Time Reference (ETR) code.
398 */
399 static int etr_port0_online;
400 static int etr_port1_online;
401 static int etr_steai_available;
402
403 static int __init early_parse_etr(char *p)
404 {
405 if (strncmp(p, "off", 3) == 0)
406 etr_port0_online = etr_port1_online = 0;
407 else if (strncmp(p, "port0", 5) == 0)
408 etr_port0_online = 1;
409 else if (strncmp(p, "port1", 5) == 0)
410 etr_port1_online = 1;
411 else if (strncmp(p, "on", 2) == 0)
412 etr_port0_online = etr_port1_online = 1;
413 return 0;
414 }
415 early_param("etr", early_parse_etr);
416
417 enum etr_event {
418 ETR_EVENT_PORT0_CHANGE,
419 ETR_EVENT_PORT1_CHANGE,
420 ETR_EVENT_PORT_ALERT,
421 ETR_EVENT_SYNC_CHECK,
422 ETR_EVENT_SWITCH_LOCAL,
423 ETR_EVENT_UPDATE,
424 };
425
426 /*
427 * Valid bit combinations of the eacr register are (x = don't care):
428 * e0 e1 dp p0 p1 ea es sl
429 * 0 0 x 0 0 0 0 0 initial, disabled state
430 * 0 0 x 0 1 1 0 0 port 1 online
431 * 0 0 x 1 0 1 0 0 port 0 online
432 * 0 0 x 1 1 1 0 0 both ports online
433 * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode
434 * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode
435 * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync
436 * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync
437 * 0 1 x 1 1 1 0 0 both ports online, port 1 usable
438 * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync
439 * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync
440 * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode
441 * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode
442 * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync
443 * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync
444 * 1 0 x 1 1 1 0 0 both ports online, port 0 usable
445 * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync
446 * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync
447 * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync
448 * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync
449 */
450 static struct etr_eacr etr_eacr;
451 static u64 etr_tolec; /* time of last eacr update */
452 static struct etr_aib etr_port0;
453 static int etr_port0_uptodate;
454 static struct etr_aib etr_port1;
455 static int etr_port1_uptodate;
456 static unsigned long etr_events;
457 static struct timer_list etr_timer;
458
459 static void etr_timeout(unsigned long dummy);
460 static void etr_work_fn(struct work_struct *work);
461 static DEFINE_MUTEX(etr_work_mutex);
462 static DECLARE_WORK(etr_work, etr_work_fn);
463
464 /*
465 * Reset ETR attachment.
466 */
467 static void etr_reset(void)
468 {
469 etr_eacr = (struct etr_eacr) {
470 .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0,
471 .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0,
472 .es = 0, .sl = 0 };
473 if (etr_setr(&etr_eacr) == 0) {
474 etr_tolec = get_clock();
475 set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags);
476 if (etr_port0_online && etr_port1_online)
477 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
478 } else if (etr_port0_online || etr_port1_online) {
479 pr_warning("The real or virtual hardware system does "
480 "not provide an ETR interface\n");
481 etr_port0_online = etr_port1_online = 0;
482 }
483 }
484
485 static int __init etr_init(void)
486 {
487 struct etr_aib aib;
488
489 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
490 return 0;
491 time_init_wq();
492 /* Check if this machine has the steai instruction. */
493 if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0)
494 etr_steai_available = 1;
495 setup_timer(&etr_timer, etr_timeout, 0UL);
496 if (etr_port0_online) {
497 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
498 queue_work(time_sync_wq, &etr_work);
499 }
500 if (etr_port1_online) {
501 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
502 queue_work(time_sync_wq, &etr_work);
503 }
504 return 0;
505 }
506
507 arch_initcall(etr_init);
508
509 /*
510 * Two sorts of ETR machine checks. The architecture reads:
511 * "When a machine-check niterruption occurs and if a switch-to-local or
512 * ETR-sync-check interrupt request is pending but disabled, this pending
513 * disabled interruption request is indicated and is cleared".
514 * Which means that we can get etr_switch_to_local events from the machine
515 * check handler although the interruption condition is disabled. Lovely..
516 */
517
518 /*
519 * Switch to local machine check. This is called when the last usable
520 * ETR port goes inactive. After switch to local the clock is not in sync.
521 */
522 void etr_switch_to_local(void)
523 {
524 if (!etr_eacr.sl)
525 return;
526 disable_sync_clock(NULL);
527 set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events);
528 queue_work(time_sync_wq, &etr_work);
529 }
530
531 /*
532 * ETR sync check machine check. This is called when the ETR OTE and the
533 * local clock OTE are farther apart than the ETR sync check tolerance.
534 * After a ETR sync check the clock is not in sync. The machine check
535 * is broadcasted to all cpus at the same time.
536 */
537 void etr_sync_check(void)
538 {
539 if (!etr_eacr.es)
540 return;
541 disable_sync_clock(NULL);
542 set_bit(ETR_EVENT_SYNC_CHECK, &etr_events);
543 queue_work(time_sync_wq, &etr_work);
544 }
545
546 /*
547 * ETR timing alert. There are two causes:
548 * 1) port state change, check the usability of the port
549 * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the
550 * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3)
551 * or ETR-data word 4 (edf4) has changed.
552 */
553 static void etr_timing_alert(struct etr_irq_parm *intparm)
554 {
555 if (intparm->pc0)
556 /* ETR port 0 state change. */
557 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
558 if (intparm->pc1)
559 /* ETR port 1 state change. */
560 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
561 if (intparm->eai)
562 /*
563 * ETR port alert on either port 0, 1 or both.
564 * Both ports are not up-to-date now.
565 */
566 set_bit(ETR_EVENT_PORT_ALERT, &etr_events);
567 queue_work(time_sync_wq, &etr_work);
568 }
569
570 static void etr_timeout(unsigned long dummy)
571 {
572 set_bit(ETR_EVENT_UPDATE, &etr_events);
573 queue_work(time_sync_wq, &etr_work);
574 }
575
576 /*
577 * Check if the etr mode is pss.
578 */
579 static inline int etr_mode_is_pps(struct etr_eacr eacr)
580 {
581 return eacr.es && !eacr.sl;
582 }
583
584 /*
585 * Check if the etr mode is etr.
586 */
587 static inline int etr_mode_is_etr(struct etr_eacr eacr)
588 {
589 return eacr.es && eacr.sl;
590 }
591
592 /*
593 * Check if the port can be used for TOD synchronization.
594 * For PPS mode the port has to receive OTEs. For ETR mode
595 * the port has to receive OTEs, the ETR stepping bit has to
596 * be zero and the validity bits for data frame 1, 2, and 3
597 * have to be 1.
598 */
599 static int etr_port_valid(struct etr_aib *aib, int port)
600 {
601 unsigned int psc;
602
603 /* Check that this port is receiving OTEs. */
604 if (aib->tsp == 0)
605 return 0;
606
607 psc = port ? aib->esw.psc1 : aib->esw.psc0;
608 if (psc == etr_lpsc_pps_mode)
609 return 1;
610 if (psc == etr_lpsc_operational_step)
611 return !aib->esw.y && aib->slsw.v1 &&
612 aib->slsw.v2 && aib->slsw.v3;
613 return 0;
614 }
615
616 /*
617 * Check if two ports are on the same network.
618 */
619 static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2)
620 {
621 // FIXME: any other fields we have to compare?
622 return aib1->edf1.net_id == aib2->edf1.net_id;
623 }
624
625 /*
626 * Wrapper for etr_stei that converts physical port states
627 * to logical port states to be consistent with the output
628 * of stetr (see etr_psc vs. etr_lpsc).
629 */
630 static void etr_steai_cv(struct etr_aib *aib, unsigned int func)
631 {
632 BUG_ON(etr_steai(aib, func) != 0);
633 /* Convert port state to logical port state. */
634 if (aib->esw.psc0 == 1)
635 aib->esw.psc0 = 2;
636 else if (aib->esw.psc0 == 0 && aib->esw.p == 0)
637 aib->esw.psc0 = 1;
638 if (aib->esw.psc1 == 1)
639 aib->esw.psc1 = 2;
640 else if (aib->esw.psc1 == 0 && aib->esw.p == 1)
641 aib->esw.psc1 = 1;
642 }
643
644 /*
645 * Check if the aib a2 is still connected to the same attachment as
646 * aib a1, the etv values differ by one and a2 is valid.
647 */
648 static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p)
649 {
650 int state_a1, state_a2;
651
652 /* Paranoia check: e0/e1 should better be the same. */
653 if (a1->esw.eacr.e0 != a2->esw.eacr.e0 ||
654 a1->esw.eacr.e1 != a2->esw.eacr.e1)
655 return 0;
656
657 /* Still connected to the same etr ? */
658 state_a1 = p ? a1->esw.psc1 : a1->esw.psc0;
659 state_a2 = p ? a2->esw.psc1 : a2->esw.psc0;
660 if (state_a1 == etr_lpsc_operational_step) {
661 if (state_a2 != etr_lpsc_operational_step ||
662 a1->edf1.net_id != a2->edf1.net_id ||
663 a1->edf1.etr_id != a2->edf1.etr_id ||
664 a1->edf1.etr_pn != a2->edf1.etr_pn)
665 return 0;
666 } else if (state_a2 != etr_lpsc_pps_mode)
667 return 0;
668
669 /* The ETV value of a2 needs to be ETV of a1 + 1. */
670 if (a1->edf2.etv + 1 != a2->edf2.etv)
671 return 0;
672
673 if (!etr_port_valid(a2, p))
674 return 0;
675
676 return 1;
677 }
678
679 struct clock_sync_data {
680 atomic_t cpus;
681 int in_sync;
682 unsigned long long fixup_cc;
683 int etr_port;
684 struct etr_aib *etr_aib;
685 };
686
687 static void clock_sync_cpu(struct clock_sync_data *sync)
688 {
689 atomic_dec(&sync->cpus);
690 enable_sync_clock();
691 /*
692 * This looks like a busy wait loop but it isn't. etr_sync_cpus
693 * is called on all other cpus while the TOD clocks is stopped.
694 * __udelay will stop the cpu on an enabled wait psw until the
695 * TOD is running again.
696 */
697 while (sync->in_sync == 0) {
698 __udelay(1);
699 /*
700 * A different cpu changes *in_sync. Therefore use
701 * barrier() to force memory access.
702 */
703 barrier();
704 }
705 if (sync->in_sync != 1)
706 /* Didn't work. Clear per-cpu in sync bit again. */
707 disable_sync_clock(NULL);
708 /*
709 * This round of TOD syncing is done. Set the clock comparator
710 * to the next tick and let the processor continue.
711 */
712 fixup_clock_comparator(sync->fixup_cc);
713 }
714
715 /*
716 * Sync the TOD clock using the port refered to by aibp. This port
717 * has to be enabled and the other port has to be disabled. The
718 * last eacr update has to be more than 1.6 seconds in the past.
719 */
720 static int etr_sync_clock(void *data)
721 {
722 static int first;
723 unsigned long long clock, old_clock, delay, delta;
724 struct clock_sync_data *etr_sync;
725 struct etr_aib *sync_port, *aib;
726 int port;
727 int rc;
728
729 etr_sync = data;
730
731 if (xchg(&first, 1) == 1) {
732 /* Slave */
733 clock_sync_cpu(etr_sync);
734 return 0;
735 }
736
737 /* Wait until all other cpus entered the sync function. */
738 while (atomic_read(&etr_sync->cpus) != 0)
739 cpu_relax();
740
741 port = etr_sync->etr_port;
742 aib = etr_sync->etr_aib;
743 sync_port = (port == 0) ? &etr_port0 : &etr_port1;
744 enable_sync_clock();
745
746 /* Set clock to next OTE. */
747 __ctl_set_bit(14, 21);
748 __ctl_set_bit(0, 29);
749 clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32;
750 old_clock = get_clock();
751 if (set_clock(clock) == 0) {
752 __udelay(1); /* Wait for the clock to start. */
753 __ctl_clear_bit(0, 29);
754 __ctl_clear_bit(14, 21);
755 etr_stetr(aib);
756 /* Adjust Linux timing variables. */
757 delay = (unsigned long long)
758 (aib->edf2.etv - sync_port->edf2.etv) << 32;
759 delta = adjust_time(old_clock, clock, delay);
760 etr_sync->fixup_cc = delta;
761 fixup_clock_comparator(delta);
762 /* Verify that the clock is properly set. */
763 if (!etr_aib_follows(sync_port, aib, port)) {
764 /* Didn't work. */
765 disable_sync_clock(NULL);
766 etr_sync->in_sync = -EAGAIN;
767 rc = -EAGAIN;
768 } else {
769 etr_sync->in_sync = 1;
770 rc = 0;
771 }
772 } else {
773 /* Could not set the clock ?!? */
774 __ctl_clear_bit(0, 29);
775 __ctl_clear_bit(14, 21);
776 disable_sync_clock(NULL);
777 etr_sync->in_sync = -EAGAIN;
778 rc = -EAGAIN;
779 }
780 xchg(&first, 0);
781 return rc;
782 }
783
784 static int etr_sync_clock_stop(struct etr_aib *aib, int port)
785 {
786 struct clock_sync_data etr_sync;
787 struct etr_aib *sync_port;
788 int follows;
789 int rc;
790
791 /* Check if the current aib is adjacent to the sync port aib. */
792 sync_port = (port == 0) ? &etr_port0 : &etr_port1;
793 follows = etr_aib_follows(sync_port, aib, port);
794 memcpy(sync_port, aib, sizeof(*aib));
795 if (!follows)
796 return -EAGAIN;
797 memset(&etr_sync, 0, sizeof(etr_sync));
798 etr_sync.etr_aib = aib;
799 etr_sync.etr_port = port;
800 get_online_cpus();
801 atomic_set(&etr_sync.cpus, num_online_cpus() - 1);
802 rc = stop_machine(etr_sync_clock, &etr_sync, &cpu_online_map);
803 put_online_cpus();
804 return rc;
805 }
806
807 /*
808 * Handle the immediate effects of the different events.
809 * The port change event is used for online/offline changes.
810 */
811 static struct etr_eacr etr_handle_events(struct etr_eacr eacr)
812 {
813 if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events))
814 eacr.es = 0;
815 if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events))
816 eacr.es = eacr.sl = 0;
817 if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events))
818 etr_port0_uptodate = etr_port1_uptodate = 0;
819
820 if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) {
821 if (eacr.e0)
822 /*
823 * Port change of an enabled port. We have to
824 * assume that this can have caused an stepping
825 * port switch.
826 */
827 etr_tolec = get_clock();
828 eacr.p0 = etr_port0_online;
829 if (!eacr.p0)
830 eacr.e0 = 0;
831 etr_port0_uptodate = 0;
832 }
833 if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) {
834 if (eacr.e1)
835 /*
836 * Port change of an enabled port. We have to
837 * assume that this can have caused an stepping
838 * port switch.
839 */
840 etr_tolec = get_clock();
841 eacr.p1 = etr_port1_online;
842 if (!eacr.p1)
843 eacr.e1 = 0;
844 etr_port1_uptodate = 0;
845 }
846 clear_bit(ETR_EVENT_UPDATE, &etr_events);
847 return eacr;
848 }
849
850 /*
851 * Set up a timer that expires after the etr_tolec + 1.6 seconds if
852 * one of the ports needs an update.
853 */
854 static void etr_set_tolec_timeout(unsigned long long now)
855 {
856 unsigned long micros;
857
858 if ((!etr_eacr.p0 || etr_port0_uptodate) &&
859 (!etr_eacr.p1 || etr_port1_uptodate))
860 return;
861 micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0;
862 micros = (micros > 1600000) ? 0 : 1600000 - micros;
863 mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1);
864 }
865
866 /*
867 * Set up a time that expires after 1/2 second.
868 */
869 static void etr_set_sync_timeout(void)
870 {
871 mod_timer(&etr_timer, jiffies + HZ/2);
872 }
873
874 /*
875 * Update the aib information for one or both ports.
876 */
877 static struct etr_eacr etr_handle_update(struct etr_aib *aib,
878 struct etr_eacr eacr)
879 {
880 /* With both ports disabled the aib information is useless. */
881 if (!eacr.e0 && !eacr.e1)
882 return eacr;
883
884 /* Update port0 or port1 with aib stored in etr_work_fn. */
885 if (aib->esw.q == 0) {
886 /* Information for port 0 stored. */
887 if (eacr.p0 && !etr_port0_uptodate) {
888 etr_port0 = *aib;
889 if (etr_port0_online)
890 etr_port0_uptodate = 1;
891 }
892 } else {
893 /* Information for port 1 stored. */
894 if (eacr.p1 && !etr_port1_uptodate) {
895 etr_port1 = *aib;
896 if (etr_port0_online)
897 etr_port1_uptodate = 1;
898 }
899 }
900
901 /*
902 * Do not try to get the alternate port aib if the clock
903 * is not in sync yet.
904 */
905 if (!check_sync_clock())
906 return eacr;
907
908 /*
909 * If steai is available we can get the information about
910 * the other port immediately. If only stetr is available the
911 * data-port bit toggle has to be used.
912 */
913 if (etr_steai_available) {
914 if (eacr.p0 && !etr_port0_uptodate) {
915 etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0);
916 etr_port0_uptodate = 1;
917 }
918 if (eacr.p1 && !etr_port1_uptodate) {
919 etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1);
920 etr_port1_uptodate = 1;
921 }
922 } else {
923 /*
924 * One port was updated above, if the other
925 * port is not uptodate toggle dp bit.
926 */
927 if ((eacr.p0 && !etr_port0_uptodate) ||
928 (eacr.p1 && !etr_port1_uptodate))
929 eacr.dp ^= 1;
930 else
931 eacr.dp = 0;
932 }
933 return eacr;
934 }
935
936 /*
937 * Write new etr control register if it differs from the current one.
938 * Return 1 if etr_tolec has been updated as well.
939 */
940 static void etr_update_eacr(struct etr_eacr eacr)
941 {
942 int dp_changed;
943
944 if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0)
945 /* No change, return. */
946 return;
947 /*
948 * The disable of an active port of the change of the data port
949 * bit can/will cause a change in the data port.
950 */
951 dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 ||
952 (etr_eacr.dp ^ eacr.dp) != 0;
953 etr_eacr = eacr;
954 etr_setr(&etr_eacr);
955 if (dp_changed)
956 etr_tolec = get_clock();
957 }
958
959 /*
960 * ETR work. In this function you'll find the main logic. In
961 * particular this is the only function that calls etr_update_eacr(),
962 * it "controls" the etr control register.
963 */
964 static void etr_work_fn(struct work_struct *work)
965 {
966 unsigned long long now;
967 struct etr_eacr eacr;
968 struct etr_aib aib;
969 int sync_port;
970
971 /* prevent multiple execution. */
972 mutex_lock(&etr_work_mutex);
973
974 /* Create working copy of etr_eacr. */
975 eacr = etr_eacr;
976
977 /* Check for the different events and their immediate effects. */
978 eacr = etr_handle_events(eacr);
979
980 /* Check if ETR is supposed to be active. */
981 eacr.ea = eacr.p0 || eacr.p1;
982 if (!eacr.ea) {
983 /* Both ports offline. Reset everything. */
984 eacr.dp = eacr.es = eacr.sl = 0;
985 on_each_cpu(disable_sync_clock, NULL, 1);
986 del_timer_sync(&etr_timer);
987 etr_update_eacr(eacr);
988 goto out_unlock;
989 }
990
991 /* Store aib to get the current ETR status word. */
992 BUG_ON(etr_stetr(&aib) != 0);
993 etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */
994 now = get_clock();
995
996 /*
997 * Update the port information if the last stepping port change
998 * or data port change is older than 1.6 seconds.
999 */
1000 if (now >= etr_tolec + (1600000 << 12))
1001 eacr = etr_handle_update(&aib, eacr);
1002
1003 /*
1004 * Select ports to enable. The prefered synchronization mode is PPS.
1005 * If a port can be enabled depends on a number of things:
1006 * 1) The port needs to be online and uptodate. A port is not
1007 * disabled just because it is not uptodate, but it is only
1008 * enabled if it is uptodate.
1009 * 2) The port needs to have the same mode (pps / etr).
1010 * 3) The port needs to be usable -> etr_port_valid() == 1
1011 * 4) To enable the second port the clock needs to be in sync.
1012 * 5) If both ports are useable and are ETR ports, the network id
1013 * has to be the same.
1014 * The eacr.sl bit is used to indicate etr mode vs. pps mode.
1015 */
1016 if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) {
1017 eacr.sl = 0;
1018 eacr.e0 = 1;
1019 if (!etr_mode_is_pps(etr_eacr))
1020 eacr.es = 0;
1021 if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode)
1022 eacr.e1 = 0;
1023 // FIXME: uptodate checks ?
1024 else if (etr_port0_uptodate && etr_port1_uptodate)
1025 eacr.e1 = 1;
1026 sync_port = (etr_port0_uptodate &&
1027 etr_port_valid(&etr_port0, 0)) ? 0 : -1;
1028 } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) {
1029 eacr.sl = 0;
1030 eacr.e0 = 0;
1031 eacr.e1 = 1;
1032 if (!etr_mode_is_pps(etr_eacr))
1033 eacr.es = 0;
1034 sync_port = (etr_port1_uptodate &&
1035 etr_port_valid(&etr_port1, 1)) ? 1 : -1;
1036 } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) {
1037 eacr.sl = 1;
1038 eacr.e0 = 1;
1039 if (!etr_mode_is_etr(etr_eacr))
1040 eacr.es = 0;
1041 if (!eacr.es || !eacr.p1 ||
1042 aib.esw.psc1 != etr_lpsc_operational_alt)
1043 eacr.e1 = 0;
1044 else if (etr_port0_uptodate && etr_port1_uptodate &&
1045 etr_compare_network(&etr_port0, &etr_port1))
1046 eacr.e1 = 1;
1047 sync_port = (etr_port0_uptodate &&
1048 etr_port_valid(&etr_port0, 0)) ? 0 : -1;
1049 } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) {
1050 eacr.sl = 1;
1051 eacr.e0 = 0;
1052 eacr.e1 = 1;
1053 if (!etr_mode_is_etr(etr_eacr))
1054 eacr.es = 0;
1055 sync_port = (etr_port1_uptodate &&
1056 etr_port_valid(&etr_port1, 1)) ? 1 : -1;
1057 } else {
1058 /* Both ports not usable. */
1059 eacr.es = eacr.sl = 0;
1060 sync_port = -1;
1061 }
1062
1063 /*
1064 * If the clock is in sync just update the eacr and return.
1065 * If there is no valid sync port wait for a port update.
1066 */
1067 if (check_sync_clock() || sync_port < 0) {
1068 etr_update_eacr(eacr);
1069 etr_set_tolec_timeout(now);
1070 goto out_unlock;
1071 }
1072
1073 /*
1074 * Prepare control register for clock syncing
1075 * (reset data port bit, set sync check control.
1076 */
1077 eacr.dp = 0;
1078 eacr.es = 1;
1079
1080 /*
1081 * Update eacr and try to synchronize the clock. If the update
1082 * of eacr caused a stepping port switch (or if we have to
1083 * assume that a stepping port switch has occured) or the
1084 * clock syncing failed, reset the sync check control bit
1085 * and set up a timer to try again after 0.5 seconds
1086 */
1087 etr_update_eacr(eacr);
1088 if (now < etr_tolec + (1600000 << 12) ||
1089 etr_sync_clock_stop(&aib, sync_port) != 0) {
1090 /* Sync failed. Try again in 1/2 second. */
1091 eacr.es = 0;
1092 etr_update_eacr(eacr);
1093 etr_set_sync_timeout();
1094 } else
1095 etr_set_tolec_timeout(now);
1096 out_unlock:
1097 mutex_unlock(&etr_work_mutex);
1098 }
1099
1100 /*
1101 * Sysfs interface functions
1102 */
1103 static struct sysdev_class etr_sysclass = {
1104 .name = "etr",
1105 };
1106
1107 static struct sys_device etr_port0_dev = {
1108 .id = 0,
1109 .cls = &etr_sysclass,
1110 };
1111
1112 static struct sys_device etr_port1_dev = {
1113 .id = 1,
1114 .cls = &etr_sysclass,
1115 };
1116
1117 /*
1118 * ETR class attributes
1119 */
1120 static ssize_t etr_stepping_port_show(struct sysdev_class *class,
1121 struct sysdev_class_attribute *attr,
1122 char *buf)
1123 {
1124 return sprintf(buf, "%i\n", etr_port0.esw.p);
1125 }
1126
1127 static SYSDEV_CLASS_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL);
1128
1129 static ssize_t etr_stepping_mode_show(struct sysdev_class *class,
1130 struct sysdev_class_attribute *attr,
1131 char *buf)
1132 {
1133 char *mode_str;
1134
1135 if (etr_mode_is_pps(etr_eacr))
1136 mode_str = "pps";
1137 else if (etr_mode_is_etr(etr_eacr))
1138 mode_str = "etr";
1139 else
1140 mode_str = "local";
1141 return sprintf(buf, "%s\n", mode_str);
1142 }
1143
1144 static SYSDEV_CLASS_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL);
1145
1146 /*
1147 * ETR port attributes
1148 */
1149 static inline struct etr_aib *etr_aib_from_dev(struct sys_device *dev)
1150 {
1151 if (dev == &etr_port0_dev)
1152 return etr_port0_online ? &etr_port0 : NULL;
1153 else
1154 return etr_port1_online ? &etr_port1 : NULL;
1155 }
1156
1157 static ssize_t etr_online_show(struct sys_device *dev,
1158 struct sysdev_attribute *attr,
1159 char *buf)
1160 {
1161 unsigned int online;
1162
1163 online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online;
1164 return sprintf(buf, "%i\n", online);
1165 }
1166
1167 static ssize_t etr_online_store(struct sys_device *dev,
1168 struct sysdev_attribute *attr,
1169 const char *buf, size_t count)
1170 {
1171 unsigned int value;
1172
1173 value = simple_strtoul(buf, NULL, 0);
1174 if (value != 0 && value != 1)
1175 return -EINVAL;
1176 if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
1177 return -EOPNOTSUPP;
1178 mutex_lock(&clock_sync_mutex);
1179 if (dev == &etr_port0_dev) {
1180 if (etr_port0_online == value)
1181 goto out; /* Nothing to do. */
1182 etr_port0_online = value;
1183 if (etr_port0_online && etr_port1_online)
1184 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1185 else
1186 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1187 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
1188 queue_work(time_sync_wq, &etr_work);
1189 } else {
1190 if (etr_port1_online == value)
1191 goto out; /* Nothing to do. */
1192 etr_port1_online = value;
1193 if (etr_port0_online && etr_port1_online)
1194 set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1195 else
1196 clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
1197 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
1198 queue_work(time_sync_wq, &etr_work);
1199 }
1200 out:
1201 mutex_unlock(&clock_sync_mutex);
1202 return count;
1203 }
1204
1205 static SYSDEV_ATTR(online, 0600, etr_online_show, etr_online_store);
1206
1207 static ssize_t etr_stepping_control_show(struct sys_device *dev,
1208 struct sysdev_attribute *attr,
1209 char *buf)
1210 {
1211 return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
1212 etr_eacr.e0 : etr_eacr.e1);
1213 }
1214
1215 static SYSDEV_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL);
1216
1217 static ssize_t etr_mode_code_show(struct sys_device *dev,
1218 struct sysdev_attribute *attr, char *buf)
1219 {
1220 if (!etr_port0_online && !etr_port1_online)
1221 /* Status word is not uptodate if both ports are offline. */
1222 return -ENODATA;
1223 return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
1224 etr_port0.esw.psc0 : etr_port0.esw.psc1);
1225 }
1226
1227 static SYSDEV_ATTR(state_code, 0400, etr_mode_code_show, NULL);
1228
1229 static ssize_t etr_untuned_show(struct sys_device *dev,
1230 struct sysdev_attribute *attr, char *buf)
1231 {
1232 struct etr_aib *aib = etr_aib_from_dev(dev);
1233
1234 if (!aib || !aib->slsw.v1)
1235 return -ENODATA;
1236 return sprintf(buf, "%i\n", aib->edf1.u);
1237 }
1238
1239 static SYSDEV_ATTR(untuned, 0400, etr_untuned_show, NULL);
1240
1241 static ssize_t etr_network_id_show(struct sys_device *dev,
1242 struct sysdev_attribute *attr, char *buf)
1243 {
1244 struct etr_aib *aib = etr_aib_from_dev(dev);
1245
1246 if (!aib || !aib->slsw.v1)
1247 return -ENODATA;
1248 return sprintf(buf, "%i\n", aib->edf1.net_id);
1249 }
1250
1251 static SYSDEV_ATTR(network, 0400, etr_network_id_show, NULL);
1252
1253 static ssize_t etr_id_show(struct sys_device *dev,
1254 struct sysdev_attribute *attr, char *buf)
1255 {
1256 struct etr_aib *aib = etr_aib_from_dev(dev);
1257
1258 if (!aib || !aib->slsw.v1)
1259 return -ENODATA;
1260 return sprintf(buf, "%i\n", aib->edf1.etr_id);
1261 }
1262
1263 static SYSDEV_ATTR(id, 0400, etr_id_show, NULL);
1264
1265 static ssize_t etr_port_number_show(struct sys_device *dev,
1266 struct sysdev_attribute *attr, char *buf)
1267 {
1268 struct etr_aib *aib = etr_aib_from_dev(dev);
1269
1270 if (!aib || !aib->slsw.v1)
1271 return -ENODATA;
1272 return sprintf(buf, "%i\n", aib->edf1.etr_pn);
1273 }
1274
1275 static SYSDEV_ATTR(port, 0400, etr_port_number_show, NULL);
1276
1277 static ssize_t etr_coupled_show(struct sys_device *dev,
1278 struct sysdev_attribute *attr, char *buf)
1279 {
1280 struct etr_aib *aib = etr_aib_from_dev(dev);
1281
1282 if (!aib || !aib->slsw.v3)
1283 return -ENODATA;
1284 return sprintf(buf, "%i\n", aib->edf3.c);
1285 }
1286
1287 static SYSDEV_ATTR(coupled, 0400, etr_coupled_show, NULL);
1288
1289 static ssize_t etr_local_time_show(struct sys_device *dev,
1290 struct sysdev_attribute *attr, char *buf)
1291 {
1292 struct etr_aib *aib = etr_aib_from_dev(dev);
1293
1294 if (!aib || !aib->slsw.v3)
1295 return -ENODATA;
1296 return sprintf(buf, "%i\n", aib->edf3.blto);
1297 }
1298
1299 static SYSDEV_ATTR(local_time, 0400, etr_local_time_show, NULL);
1300
1301 static ssize_t etr_utc_offset_show(struct sys_device *dev,
1302 struct sysdev_attribute *attr, char *buf)
1303 {
1304 struct etr_aib *aib = etr_aib_from_dev(dev);
1305
1306 if (!aib || !aib->slsw.v3)
1307 return -ENODATA;
1308 return sprintf(buf, "%i\n", aib->edf3.buo);
1309 }
1310
1311 static SYSDEV_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL);
1312
1313 static struct sysdev_attribute *etr_port_attributes[] = {
1314 &attr_online,
1315 &attr_stepping_control,
1316 &attr_state_code,
1317 &attr_untuned,
1318 &attr_network,
1319 &attr_id,
1320 &attr_port,
1321 &attr_coupled,
1322 &attr_local_time,
1323 &attr_utc_offset,
1324 NULL
1325 };
1326
1327 static int __init etr_register_port(struct sys_device *dev)
1328 {
1329 struct sysdev_attribute **attr;
1330 int rc;
1331
1332 rc = sysdev_register(dev);
1333 if (rc)
1334 goto out;
1335 for (attr = etr_port_attributes; *attr; attr++) {
1336 rc = sysdev_create_file(dev, *attr);
1337 if (rc)
1338 goto out_unreg;
1339 }
1340 return 0;
1341 out_unreg:
1342 for (; attr >= etr_port_attributes; attr--)
1343 sysdev_remove_file(dev, *attr);
1344 sysdev_unregister(dev);
1345 out:
1346 return rc;
1347 }
1348
1349 static void __init etr_unregister_port(struct sys_device *dev)
1350 {
1351 struct sysdev_attribute **attr;
1352
1353 for (attr = etr_port_attributes; *attr; attr++)
1354 sysdev_remove_file(dev, *attr);
1355 sysdev_unregister(dev);
1356 }
1357
1358 static int __init etr_init_sysfs(void)
1359 {
1360 int rc;
1361
1362 rc = sysdev_class_register(&etr_sysclass);
1363 if (rc)
1364 goto out;
1365 rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_port);
1366 if (rc)
1367 goto out_unreg_class;
1368 rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_mode);
1369 if (rc)
1370 goto out_remove_stepping_port;
1371 rc = etr_register_port(&etr_port0_dev);
1372 if (rc)
1373 goto out_remove_stepping_mode;
1374 rc = etr_register_port(&etr_port1_dev);
1375 if (rc)
1376 goto out_remove_port0;
1377 return 0;
1378
1379 out_remove_port0:
1380 etr_unregister_port(&etr_port0_dev);
1381 out_remove_stepping_mode:
1382 sysdev_class_remove_file(&etr_sysclass, &attr_stepping_mode);
1383 out_remove_stepping_port:
1384 sysdev_class_remove_file(&etr_sysclass, &attr_stepping_port);
1385 out_unreg_class:
1386 sysdev_class_unregister(&etr_sysclass);
1387 out:
1388 return rc;
1389 }
1390
1391 device_initcall(etr_init_sysfs);
1392
1393 /*
1394 * Server Time Protocol (STP) code.
1395 */
1396 static int stp_online;
1397 static struct stp_sstpi stp_info;
1398 static void *stp_page;
1399
1400 static void stp_work_fn(struct work_struct *work);
1401 static DEFINE_MUTEX(stp_work_mutex);
1402 static DECLARE_WORK(stp_work, stp_work_fn);
1403 static struct timer_list stp_timer;
1404
1405 static int __init early_parse_stp(char *p)
1406 {
1407 if (strncmp(p, "off", 3) == 0)
1408 stp_online = 0;
1409 else if (strncmp(p, "on", 2) == 0)
1410 stp_online = 1;
1411 return 0;
1412 }
1413 early_param("stp", early_parse_stp);
1414
1415 /*
1416 * Reset STP attachment.
1417 */
1418 static void __init stp_reset(void)
1419 {
1420 int rc;
1421
1422 stp_page = (void *) get_zeroed_page(GFP_ATOMIC);
1423 rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
1424 if (rc == 0)
1425 set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags);
1426 else if (stp_online) {
1427 pr_warning("The real or virtual hardware system does "
1428 "not provide an STP interface\n");
1429 free_page((unsigned long) stp_page);
1430 stp_page = NULL;
1431 stp_online = 0;
1432 }
1433 }
1434
1435 static void stp_timeout(unsigned long dummy)
1436 {
1437 queue_work(time_sync_wq, &stp_work);
1438 }
1439
1440 static int __init stp_init(void)
1441 {
1442 if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
1443 return 0;
1444 setup_timer(&stp_timer, stp_timeout, 0UL);
1445 time_init_wq();
1446 if (!stp_online)
1447 return 0;
1448 queue_work(time_sync_wq, &stp_work);
1449 return 0;
1450 }
1451
1452 arch_initcall(stp_init);
1453
1454 /*
1455 * STP timing alert. There are three causes:
1456 * 1) timing status change
1457 * 2) link availability change
1458 * 3) time control parameter change
1459 * In all three cases we are only interested in the clock source state.
1460 * If a STP clock source is now available use it.
1461 */
1462 static void stp_timing_alert(struct stp_irq_parm *intparm)
1463 {
1464 if (intparm->tsc || intparm->lac || intparm->tcpc)
1465 queue_work(time_sync_wq, &stp_work);
1466 }
1467
1468 /*
1469 * STP sync check machine check. This is called when the timing state
1470 * changes from the synchronized state to the unsynchronized state.
1471 * After a STP sync check the clock is not in sync. The machine check
1472 * is broadcasted to all cpus at the same time.
1473 */
1474 void stp_sync_check(void)
1475 {
1476 disable_sync_clock(NULL);
1477 queue_work(time_sync_wq, &stp_work);
1478 }
1479
1480 /*
1481 * STP island condition machine check. This is called when an attached
1482 * server attempts to communicate over an STP link and the servers
1483 * have matching CTN ids and have a valid stratum-1 configuration
1484 * but the configurations do not match.
1485 */
1486 void stp_island_check(void)
1487 {
1488 disable_sync_clock(NULL);
1489 queue_work(time_sync_wq, &stp_work);
1490 }
1491
1492
1493 static int stp_sync_clock(void *data)
1494 {
1495 static int first;
1496 unsigned long long old_clock, delta;
1497 struct clock_sync_data *stp_sync;
1498 int rc;
1499
1500 stp_sync = data;
1501
1502 if (xchg(&first, 1) == 1) {
1503 /* Slave */
1504 clock_sync_cpu(stp_sync);
1505 return 0;
1506 }
1507
1508 /* Wait until all other cpus entered the sync function. */
1509 while (atomic_read(&stp_sync->cpus) != 0)
1510 cpu_relax();
1511
1512 enable_sync_clock();
1513
1514 rc = 0;
1515 if (stp_info.todoff[0] || stp_info.todoff[1] ||
1516 stp_info.todoff[2] || stp_info.todoff[3] ||
1517 stp_info.tmd != 2) {
1518 old_clock = get_clock();
1519 rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0);
1520 if (rc == 0) {
1521 delta = adjust_time(old_clock, get_clock(), 0);
1522 fixup_clock_comparator(delta);
1523 rc = chsc_sstpi(stp_page, &stp_info,
1524 sizeof(struct stp_sstpi));
1525 if (rc == 0 && stp_info.tmd != 2)
1526 rc = -EAGAIN;
1527 }
1528 }
1529 if (rc) {
1530 disable_sync_clock(NULL);
1531 stp_sync->in_sync = -EAGAIN;
1532 } else
1533 stp_sync->in_sync = 1;
1534 xchg(&first, 0);
1535 return 0;
1536 }
1537
1538 /*
1539 * STP work. Check for the STP state and take over the clock
1540 * synchronization if the STP clock source is usable.
1541 */
1542 static void stp_work_fn(struct work_struct *work)
1543 {
1544 struct clock_sync_data stp_sync;
1545 int rc;
1546
1547 /* prevent multiple execution. */
1548 mutex_lock(&stp_work_mutex);
1549
1550 if (!stp_online) {
1551 chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
1552 del_timer_sync(&stp_timer);
1553 goto out_unlock;
1554 }
1555
1556 rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0);
1557 if (rc)
1558 goto out_unlock;
1559
1560 rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi));
1561 if (rc || stp_info.c == 0)
1562 goto out_unlock;
1563
1564 /* Skip synchronization if the clock is already in sync. */
1565 if (check_sync_clock())
1566 goto out_unlock;
1567
1568 memset(&stp_sync, 0, sizeof(stp_sync));
1569 get_online_cpus();
1570 atomic_set(&stp_sync.cpus, num_online_cpus() - 1);
1571 stop_machine(stp_sync_clock, &stp_sync, &cpu_online_map);
1572 put_online_cpus();
1573
1574 if (!check_sync_clock())
1575 /*
1576 * There is a usable clock but the synchonization failed.
1577 * Retry after a second.
1578 */
1579 mod_timer(&stp_timer, jiffies + HZ);
1580
1581 out_unlock:
1582 mutex_unlock(&stp_work_mutex);
1583 }
1584
1585 /*
1586 * STP class sysfs interface functions
1587 */
1588 static struct sysdev_class stp_sysclass = {
1589 .name = "stp",
1590 };
1591
1592 static ssize_t stp_ctn_id_show(struct sysdev_class *class,
1593 struct sysdev_class_attribute *attr,
1594 char *buf)
1595 {
1596 if (!stp_online)
1597 return -ENODATA;
1598 return sprintf(buf, "%016llx\n",
1599 *(unsigned long long *) stp_info.ctnid);
1600 }
1601
1602 static SYSDEV_CLASS_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL);
1603
1604 static ssize_t stp_ctn_type_show(struct sysdev_class *class,
1605 struct sysdev_class_attribute *attr,
1606 char *buf)
1607 {
1608 if (!stp_online)
1609 return -ENODATA;
1610 return sprintf(buf, "%i\n", stp_info.ctn);
1611 }
1612
1613 static SYSDEV_CLASS_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL);
1614
1615 static ssize_t stp_dst_offset_show(struct sysdev_class *class,
1616 struct sysdev_class_attribute *attr,
1617 char *buf)
1618 {
1619 if (!stp_online || !(stp_info.vbits & 0x2000))
1620 return -ENODATA;
1621 return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto);
1622 }
1623
1624 static SYSDEV_CLASS_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL);
1625
1626 static ssize_t stp_leap_seconds_show(struct sysdev_class *class,
1627 struct sysdev_class_attribute *attr,
1628 char *buf)
1629 {
1630 if (!stp_online || !(stp_info.vbits & 0x8000))
1631 return -ENODATA;
1632 return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps);
1633 }
1634
1635 static SYSDEV_CLASS_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL);
1636
1637 static ssize_t stp_stratum_show(struct sysdev_class *class,
1638 struct sysdev_class_attribute *attr,
1639 char *buf)
1640 {
1641 if (!stp_online)
1642 return -ENODATA;
1643 return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum);
1644 }
1645
1646 static SYSDEV_CLASS_ATTR(stratum, 0400, stp_stratum_show, NULL);
1647
1648 static ssize_t stp_time_offset_show(struct sysdev_class *class,
1649 struct sysdev_class_attribute *attr,
1650 char *buf)
1651 {
1652 if (!stp_online || !(stp_info.vbits & 0x0800))
1653 return -ENODATA;
1654 return sprintf(buf, "%i\n", (int) stp_info.tto);
1655 }
1656
1657 static SYSDEV_CLASS_ATTR(time_offset, 0400, stp_time_offset_show, NULL);
1658
1659 static ssize_t stp_time_zone_offset_show(struct sysdev_class *class,
1660 struct sysdev_class_attribute *attr,
1661 char *buf)
1662 {
1663 if (!stp_online || !(stp_info.vbits & 0x4000))
1664 return -ENODATA;
1665 return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo);
1666 }
1667
1668 static SYSDEV_CLASS_ATTR(time_zone_offset, 0400,
1669 stp_time_zone_offset_show, NULL);
1670
1671 static ssize_t stp_timing_mode_show(struct sysdev_class *class,
1672 struct sysdev_class_attribute *attr,
1673 char *buf)
1674 {
1675 if (!stp_online)
1676 return -ENODATA;
1677 return sprintf(buf, "%i\n", stp_info.tmd);
1678 }
1679
1680 static SYSDEV_CLASS_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL);
1681
1682 static ssize_t stp_timing_state_show(struct sysdev_class *class,
1683 struct sysdev_class_attribute *attr,
1684 char *buf)
1685 {
1686 if (!stp_online)
1687 return -ENODATA;
1688 return sprintf(buf, "%i\n", stp_info.tst);
1689 }
1690
1691 static SYSDEV_CLASS_ATTR(timing_state, 0400, stp_timing_state_show, NULL);
1692
1693 static ssize_t stp_online_show(struct sysdev_class *class,
1694 struct sysdev_class_attribute *attr,
1695 char *buf)
1696 {
1697 return sprintf(buf, "%i\n", stp_online);
1698 }
1699
1700 static ssize_t stp_online_store(struct sysdev_class *class,
1701 struct sysdev_class_attribute *attr,
1702 const char *buf, size_t count)
1703 {
1704 unsigned int value;
1705
1706 value = simple_strtoul(buf, NULL, 0);
1707 if (value != 0 && value != 1)
1708 return -EINVAL;
1709 if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
1710 return -EOPNOTSUPP;
1711 mutex_lock(&clock_sync_mutex);
1712 stp_online = value;
1713 if (stp_online)
1714 set_bit(CLOCK_SYNC_STP, &clock_sync_flags);
1715 else
1716 clear_bit(CLOCK_SYNC_STP, &clock_sync_flags);
1717 queue_work(time_sync_wq, &stp_work);
1718 mutex_unlock(&clock_sync_mutex);
1719 return count;
1720 }
1721
1722 /*
1723 * Can't use SYSDEV_CLASS_ATTR because the attribute should be named
1724 * stp/online but attr_online already exists in this file ..
1725 */
1726 static struct sysdev_class_attribute attr_stp_online = {
1727 .attr = { .name = "online", .mode = 0600 },
1728 .show = stp_online_show,
1729 .store = stp_online_store,
1730 };
1731
1732 static struct sysdev_class_attribute *stp_attributes[] = {
1733 &attr_ctn_id,
1734 &attr_ctn_type,
1735 &attr_dst_offset,
1736 &attr_leap_seconds,
1737 &attr_stp_online,
1738 &attr_stratum,
1739 &attr_time_offset,
1740 &attr_time_zone_offset,
1741 &attr_timing_mode,
1742 &attr_timing_state,
1743 NULL
1744 };
1745
1746 static int __init stp_init_sysfs(void)
1747 {
1748 struct sysdev_class_attribute **attr;
1749 int rc;
1750
1751 rc = sysdev_class_register(&stp_sysclass);
1752 if (rc)
1753 goto out;
1754 for (attr = stp_attributes; *attr; attr++) {
1755 rc = sysdev_class_create_file(&stp_sysclass, *attr);
1756 if (rc)
1757 goto out_unreg;
1758 }
1759 return 0;
1760 out_unreg:
1761 for (; attr >= stp_attributes; attr--)
1762 sysdev_class_remove_file(&stp_sysclass, *attr);
1763 sysdev_class_unregister(&stp_sysclass);
1764 out:
1765 return rc;
1766 }
1767
1768 device_initcall(stp_init_sysfs);