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1 /*
2 * Copyright IBM Corp. 2012
3 *
4 * Author(s):
5 * Jan Glauber <jang@linux.vnet.ibm.com>
6 *
7 * The System z PCI code is a rewrite from a prototype by
8 * the following people (Kudoz!):
9 * Alexander Schmidt
10 * Christoph Raisch
11 * Hannes Hering
12 * Hoang-Nam Nguyen
13 * Jan-Bernd Themann
14 * Stefan Roscher
15 * Thomas Klein
16 */
17
18 #define KMSG_COMPONENT "zpci"
19 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
20
21 #include <linux/kernel.h>
22 #include <linux/slab.h>
23 #include <linux/err.h>
24 #include <linux/export.h>
25 #include <linux/delay.h>
26 #include <linux/irq.h>
27 #include <linux/kernel_stat.h>
28 #include <linux/seq_file.h>
29 #include <linux/pci.h>
30 #include <linux/msi.h>
31
32 #include <asm/isc.h>
33 #include <asm/airq.h>
34 #include <asm/facility.h>
35 #include <asm/pci_insn.h>
36 #include <asm/pci_clp.h>
37 #include <asm/pci_dma.h>
38
39 #define DEBUG /* enable pr_debug */
40
41 #define SIC_IRQ_MODE_ALL 0
42 #define SIC_IRQ_MODE_SINGLE 1
43
44 #define ZPCI_NR_DMA_SPACES 1
45 #define ZPCI_NR_DEVICES CONFIG_PCI_NR_FUNCTIONS
46
47 /* list of all detected zpci devices */
48 static LIST_HEAD(zpci_list);
49 static DEFINE_SPINLOCK(zpci_list_lock);
50
51 static struct irq_chip zpci_irq_chip = {
52 .name = "zPCI",
53 .irq_unmask = pci_msi_unmask_irq,
54 .irq_mask = pci_msi_mask_irq,
55 };
56
57 static DECLARE_BITMAP(zpci_domain, ZPCI_NR_DEVICES);
58 static DEFINE_SPINLOCK(zpci_domain_lock);
59
60 static struct airq_iv *zpci_aisb_iv;
61 static struct airq_iv *zpci_aibv[ZPCI_NR_DEVICES];
62
63 /* Adapter interrupt definitions */
64 static void zpci_irq_handler(struct airq_struct *airq);
65
66 static struct airq_struct zpci_airq = {
67 .handler = zpci_irq_handler,
68 .isc = PCI_ISC,
69 };
70
71 /* I/O Map */
72 static DEFINE_SPINLOCK(zpci_iomap_lock);
73 static DECLARE_BITMAP(zpci_iomap, ZPCI_IOMAP_MAX_ENTRIES);
74 struct zpci_iomap_entry *zpci_iomap_start;
75 EXPORT_SYMBOL_GPL(zpci_iomap_start);
76
77 static struct kmem_cache *zdev_fmb_cache;
78
79 struct zpci_dev *get_zdev_by_fid(u32 fid)
80 {
81 struct zpci_dev *tmp, *zdev = NULL;
82
83 spin_lock(&zpci_list_lock);
84 list_for_each_entry(tmp, &zpci_list, entry) {
85 if (tmp->fid == fid) {
86 zdev = tmp;
87 break;
88 }
89 }
90 spin_unlock(&zpci_list_lock);
91 return zdev;
92 }
93
94 static struct zpci_dev *get_zdev_by_bus(struct pci_bus *bus)
95 {
96 return (bus && bus->sysdata) ? (struct zpci_dev *) bus->sysdata : NULL;
97 }
98
99 int pci_domain_nr(struct pci_bus *bus)
100 {
101 return ((struct zpci_dev *) bus->sysdata)->domain;
102 }
103 EXPORT_SYMBOL_GPL(pci_domain_nr);
104
105 int pci_proc_domain(struct pci_bus *bus)
106 {
107 return pci_domain_nr(bus);
108 }
109 EXPORT_SYMBOL_GPL(pci_proc_domain);
110
111 /* Modify PCI: Register adapter interruptions */
112 static int zpci_set_airq(struct zpci_dev *zdev)
113 {
114 u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_REG_INT);
115 struct zpci_fib fib = {0};
116
117 fib.isc = PCI_ISC;
118 fib.sum = 1; /* enable summary notifications */
119 fib.noi = airq_iv_end(zdev->aibv);
120 fib.aibv = (unsigned long) zdev->aibv->vector;
121 fib.aibvo = 0; /* each zdev has its own interrupt vector */
122 fib.aisb = (unsigned long) zpci_aisb_iv->vector + (zdev->aisb/64)*8;
123 fib.aisbo = zdev->aisb & 63;
124
125 return zpci_mod_fc(req, &fib);
126 }
127
128 struct mod_pci_args {
129 u64 base;
130 u64 limit;
131 u64 iota;
132 u64 fmb_addr;
133 };
134
135 static int mod_pci(struct zpci_dev *zdev, int fn, u8 dmaas, struct mod_pci_args *args)
136 {
137 u64 req = ZPCI_CREATE_REQ(zdev->fh, dmaas, fn);
138 struct zpci_fib fib = {0};
139
140 fib.pba = args->base;
141 fib.pal = args->limit;
142 fib.iota = args->iota;
143 fib.fmb_addr = args->fmb_addr;
144
145 return zpci_mod_fc(req, &fib);
146 }
147
148 /* Modify PCI: Register I/O address translation parameters */
149 int zpci_register_ioat(struct zpci_dev *zdev, u8 dmaas,
150 u64 base, u64 limit, u64 iota)
151 {
152 struct mod_pci_args args = { base, limit, iota, 0 };
153
154 WARN_ON_ONCE(iota & 0x3fff);
155 args.iota |= ZPCI_IOTA_RTTO_FLAG;
156 return mod_pci(zdev, ZPCI_MOD_FC_REG_IOAT, dmaas, &args);
157 }
158
159 /* Modify PCI: Unregister I/O address translation parameters */
160 int zpci_unregister_ioat(struct zpci_dev *zdev, u8 dmaas)
161 {
162 struct mod_pci_args args = { 0, 0, 0, 0 };
163
164 return mod_pci(zdev, ZPCI_MOD_FC_DEREG_IOAT, dmaas, &args);
165 }
166
167 /* Modify PCI: Unregister adapter interruptions */
168 static int zpci_clear_airq(struct zpci_dev *zdev)
169 {
170 struct mod_pci_args args = { 0, 0, 0, 0 };
171
172 return mod_pci(zdev, ZPCI_MOD_FC_DEREG_INT, 0, &args);
173 }
174
175 /* Modify PCI: Set PCI function measurement parameters */
176 int zpci_fmb_enable_device(struct zpci_dev *zdev)
177 {
178 struct mod_pci_args args = { 0, 0, 0, 0 };
179
180 if (zdev->fmb)
181 return -EINVAL;
182
183 zdev->fmb = kmem_cache_zalloc(zdev_fmb_cache, GFP_KERNEL);
184 if (!zdev->fmb)
185 return -ENOMEM;
186 WARN_ON((u64) zdev->fmb & 0xf);
187
188 /* reset software counters */
189 atomic64_set(&zdev->allocated_pages, 0);
190 atomic64_set(&zdev->mapped_pages, 0);
191 atomic64_set(&zdev->unmapped_pages, 0);
192
193 args.fmb_addr = virt_to_phys(zdev->fmb);
194 return mod_pci(zdev, ZPCI_MOD_FC_SET_MEASURE, 0, &args);
195 }
196
197 /* Modify PCI: Disable PCI function measurement */
198 int zpci_fmb_disable_device(struct zpci_dev *zdev)
199 {
200 struct mod_pci_args args = { 0, 0, 0, 0 };
201 int rc;
202
203 if (!zdev->fmb)
204 return -EINVAL;
205
206 /* Function measurement is disabled if fmb address is zero */
207 rc = mod_pci(zdev, ZPCI_MOD_FC_SET_MEASURE, 0, &args);
208
209 kmem_cache_free(zdev_fmb_cache, zdev->fmb);
210 zdev->fmb = NULL;
211 return rc;
212 }
213
214 #define ZPCI_PCIAS_CFGSPC 15
215
216 static int zpci_cfg_load(struct zpci_dev *zdev, int offset, u32 *val, u8 len)
217 {
218 u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len);
219 u64 data;
220 int rc;
221
222 rc = zpci_load(&data, req, offset);
223 if (!rc) {
224 data = data << ((8 - len) * 8);
225 data = le64_to_cpu(data);
226 *val = (u32) data;
227 } else
228 *val = 0xffffffff;
229 return rc;
230 }
231
232 static int zpci_cfg_store(struct zpci_dev *zdev, int offset, u32 val, u8 len)
233 {
234 u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len);
235 u64 data = val;
236 int rc;
237
238 data = cpu_to_le64(data);
239 data = data >> ((8 - len) * 8);
240 rc = zpci_store(data, req, offset);
241 return rc;
242 }
243
244 void pcibios_fixup_bus(struct pci_bus *bus)
245 {
246 }
247
248 resource_size_t pcibios_align_resource(void *data, const struct resource *res,
249 resource_size_t size,
250 resource_size_t align)
251 {
252 return 0;
253 }
254
255 /* combine single writes by using store-block insn */
256 void __iowrite64_copy(void __iomem *to, const void *from, size_t count)
257 {
258 zpci_memcpy_toio(to, from, count);
259 }
260
261 /* Create a virtual mapping cookie for a PCI BAR */
262 void __iomem *pci_iomap_range(struct pci_dev *pdev,
263 int bar,
264 unsigned long offset,
265 unsigned long max)
266 {
267 struct zpci_dev *zdev = to_zpci(pdev);
268 u64 addr;
269 int idx;
270
271 if ((bar & 7) != bar)
272 return NULL;
273
274 idx = zdev->bars[bar].map_idx;
275 spin_lock(&zpci_iomap_lock);
276 if (zpci_iomap_start[idx].count++) {
277 BUG_ON(zpci_iomap_start[idx].fh != zdev->fh ||
278 zpci_iomap_start[idx].bar != bar);
279 } else {
280 zpci_iomap_start[idx].fh = zdev->fh;
281 zpci_iomap_start[idx].bar = bar;
282 }
283 /* Detect overrun */
284 BUG_ON(!zpci_iomap_start[idx].count);
285 spin_unlock(&zpci_iomap_lock);
286
287 addr = ZPCI_IOMAP_ADDR_BASE | ((u64) idx << 48);
288 return (void __iomem *) addr + offset;
289 }
290 EXPORT_SYMBOL(pci_iomap_range);
291
292 void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
293 {
294 return pci_iomap_range(dev, bar, 0, maxlen);
295 }
296 EXPORT_SYMBOL(pci_iomap);
297
298 void pci_iounmap(struct pci_dev *pdev, void __iomem *addr)
299 {
300 unsigned int idx;
301
302 idx = (((__force u64) addr) & ~ZPCI_IOMAP_ADDR_BASE) >> 48;
303 spin_lock(&zpci_iomap_lock);
304 /* Detect underrun */
305 BUG_ON(!zpci_iomap_start[idx].count);
306 if (!--zpci_iomap_start[idx].count) {
307 zpci_iomap_start[idx].fh = 0;
308 zpci_iomap_start[idx].bar = 0;
309 }
310 spin_unlock(&zpci_iomap_lock);
311 }
312 EXPORT_SYMBOL(pci_iounmap);
313
314 static int pci_read(struct pci_bus *bus, unsigned int devfn, int where,
315 int size, u32 *val)
316 {
317 struct zpci_dev *zdev = get_zdev_by_bus(bus);
318 int ret;
319
320 if (!zdev || devfn != ZPCI_DEVFN)
321 ret = -ENODEV;
322 else
323 ret = zpci_cfg_load(zdev, where, val, size);
324
325 return ret;
326 }
327
328 static int pci_write(struct pci_bus *bus, unsigned int devfn, int where,
329 int size, u32 val)
330 {
331 struct zpci_dev *zdev = get_zdev_by_bus(bus);
332 int ret;
333
334 if (!zdev || devfn != ZPCI_DEVFN)
335 ret = -ENODEV;
336 else
337 ret = zpci_cfg_store(zdev, where, val, size);
338
339 return ret;
340 }
341
342 static struct pci_ops pci_root_ops = {
343 .read = pci_read,
344 .write = pci_write,
345 };
346
347 static void zpci_irq_handler(struct airq_struct *airq)
348 {
349 unsigned long si, ai;
350 struct airq_iv *aibv;
351 int irqs_on = 0;
352
353 inc_irq_stat(IRQIO_PCI);
354 for (si = 0;;) {
355 /* Scan adapter summary indicator bit vector */
356 si = airq_iv_scan(zpci_aisb_iv, si, airq_iv_end(zpci_aisb_iv));
357 if (si == -1UL) {
358 if (irqs_on++)
359 /* End of second scan with interrupts on. */
360 break;
361 /* First scan complete, reenable interrupts. */
362 zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, NULL, PCI_ISC);
363 si = 0;
364 continue;
365 }
366
367 /* Scan the adapter interrupt vector for this device. */
368 aibv = zpci_aibv[si];
369 for (ai = 0;;) {
370 ai = airq_iv_scan(aibv, ai, airq_iv_end(aibv));
371 if (ai == -1UL)
372 break;
373 inc_irq_stat(IRQIO_MSI);
374 airq_iv_lock(aibv, ai);
375 generic_handle_irq(airq_iv_get_data(aibv, ai));
376 airq_iv_unlock(aibv, ai);
377 }
378 }
379 }
380
381 int arch_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
382 {
383 struct zpci_dev *zdev = to_zpci(pdev);
384 unsigned int hwirq, msi_vecs;
385 unsigned long aisb;
386 struct msi_desc *msi;
387 struct msi_msg msg;
388 int rc, irq;
389
390 if (type == PCI_CAP_ID_MSI && nvec > 1)
391 return 1;
392 msi_vecs = min_t(unsigned int, nvec, zdev->max_msi);
393
394 /* Allocate adapter summary indicator bit */
395 rc = -EIO;
396 aisb = airq_iv_alloc_bit(zpci_aisb_iv);
397 if (aisb == -1UL)
398 goto out;
399 zdev->aisb = aisb;
400
401 /* Create adapter interrupt vector */
402 rc = -ENOMEM;
403 zdev->aibv = airq_iv_create(msi_vecs, AIRQ_IV_DATA | AIRQ_IV_BITLOCK);
404 if (!zdev->aibv)
405 goto out_si;
406
407 /* Wire up shortcut pointer */
408 zpci_aibv[aisb] = zdev->aibv;
409
410 /* Request MSI interrupts */
411 hwirq = 0;
412 for_each_pci_msi_entry(msi, pdev) {
413 rc = -EIO;
414 irq = irq_alloc_desc(0); /* Alloc irq on node 0 */
415 if (irq < 0)
416 goto out_msi;
417 rc = irq_set_msi_desc(irq, msi);
418 if (rc)
419 goto out_msi;
420 irq_set_chip_and_handler(irq, &zpci_irq_chip,
421 handle_simple_irq);
422 msg.data = hwirq;
423 msg.address_lo = zdev->msi_addr & 0xffffffff;
424 msg.address_hi = zdev->msi_addr >> 32;
425 pci_write_msi_msg(irq, &msg);
426 airq_iv_set_data(zdev->aibv, hwirq, irq);
427 hwirq++;
428 }
429
430 /* Enable adapter interrupts */
431 rc = zpci_set_airq(zdev);
432 if (rc)
433 goto out_msi;
434
435 return (msi_vecs == nvec) ? 0 : msi_vecs;
436
437 out_msi:
438 for_each_pci_msi_entry(msi, pdev) {
439 if (hwirq-- == 0)
440 break;
441 irq_set_msi_desc(msi->irq, NULL);
442 irq_free_desc(msi->irq);
443 msi->msg.address_lo = 0;
444 msi->msg.address_hi = 0;
445 msi->msg.data = 0;
446 msi->irq = 0;
447 }
448 zpci_aibv[aisb] = NULL;
449 airq_iv_release(zdev->aibv);
450 out_si:
451 airq_iv_free_bit(zpci_aisb_iv, aisb);
452 out:
453 return rc;
454 }
455
456 void arch_teardown_msi_irqs(struct pci_dev *pdev)
457 {
458 struct zpci_dev *zdev = to_zpci(pdev);
459 struct msi_desc *msi;
460 int rc;
461
462 /* Disable adapter interrupts */
463 rc = zpci_clear_airq(zdev);
464 if (rc)
465 return;
466
467 /* Release MSI interrupts */
468 for_each_pci_msi_entry(msi, pdev) {
469 if (msi->msi_attrib.is_msix)
470 __pci_msix_desc_mask_irq(msi, 1);
471 else
472 __pci_msi_desc_mask_irq(msi, 1, 1);
473 irq_set_msi_desc(msi->irq, NULL);
474 irq_free_desc(msi->irq);
475 msi->msg.address_lo = 0;
476 msi->msg.address_hi = 0;
477 msi->msg.data = 0;
478 msi->irq = 0;
479 }
480
481 zpci_aibv[zdev->aisb] = NULL;
482 airq_iv_release(zdev->aibv);
483 airq_iv_free_bit(zpci_aisb_iv, zdev->aisb);
484 }
485
486 static void zpci_map_resources(struct pci_dev *pdev)
487 {
488 resource_size_t len;
489 int i;
490
491 for (i = 0; i < PCI_BAR_COUNT; i++) {
492 len = pci_resource_len(pdev, i);
493 if (!len)
494 continue;
495 pdev->resource[i].start =
496 (resource_size_t __force) pci_iomap(pdev, i, 0);
497 pdev->resource[i].end = pdev->resource[i].start + len - 1;
498 }
499 }
500
501 static void zpci_unmap_resources(struct pci_dev *pdev)
502 {
503 resource_size_t len;
504 int i;
505
506 for (i = 0; i < PCI_BAR_COUNT; i++) {
507 len = pci_resource_len(pdev, i);
508 if (!len)
509 continue;
510 pci_iounmap(pdev, (void __iomem __force *)
511 pdev->resource[i].start);
512 }
513 }
514
515 static int __init zpci_irq_init(void)
516 {
517 int rc;
518
519 rc = register_adapter_interrupt(&zpci_airq);
520 if (rc)
521 goto out;
522 /* Set summary to 1 to be called every time for the ISC. */
523 *zpci_airq.lsi_ptr = 1;
524
525 rc = -ENOMEM;
526 zpci_aisb_iv = airq_iv_create(ZPCI_NR_DEVICES, AIRQ_IV_ALLOC);
527 if (!zpci_aisb_iv)
528 goto out_airq;
529
530 zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, NULL, PCI_ISC);
531 return 0;
532
533 out_airq:
534 unregister_adapter_interrupt(&zpci_airq);
535 out:
536 return rc;
537 }
538
539 static void zpci_irq_exit(void)
540 {
541 airq_iv_release(zpci_aisb_iv);
542 unregister_adapter_interrupt(&zpci_airq);
543 }
544
545 static int zpci_alloc_iomap(struct zpci_dev *zdev)
546 {
547 int entry;
548
549 spin_lock(&zpci_iomap_lock);
550 entry = find_first_zero_bit(zpci_iomap, ZPCI_IOMAP_MAX_ENTRIES);
551 if (entry == ZPCI_IOMAP_MAX_ENTRIES) {
552 spin_unlock(&zpci_iomap_lock);
553 return -ENOSPC;
554 }
555 set_bit(entry, zpci_iomap);
556 spin_unlock(&zpci_iomap_lock);
557 return entry;
558 }
559
560 static void zpci_free_iomap(struct zpci_dev *zdev, int entry)
561 {
562 spin_lock(&zpci_iomap_lock);
563 memset(&zpci_iomap_start[entry], 0, sizeof(struct zpci_iomap_entry));
564 clear_bit(entry, zpci_iomap);
565 spin_unlock(&zpci_iomap_lock);
566 }
567
568 static struct resource *__alloc_res(struct zpci_dev *zdev, unsigned long start,
569 unsigned long size, unsigned long flags)
570 {
571 struct resource *r;
572
573 r = kzalloc(sizeof(*r), GFP_KERNEL);
574 if (!r)
575 return NULL;
576
577 r->start = start;
578 r->end = r->start + size - 1;
579 r->flags = flags;
580 r->name = zdev->res_name;
581
582 if (request_resource(&iomem_resource, r)) {
583 kfree(r);
584 return NULL;
585 }
586 return r;
587 }
588
589 static int zpci_setup_bus_resources(struct zpci_dev *zdev,
590 struct list_head *resources)
591 {
592 unsigned long addr, size, flags;
593 struct resource *res;
594 int i, entry;
595
596 snprintf(zdev->res_name, sizeof(zdev->res_name),
597 "PCI Bus %04x:%02x", zdev->domain, ZPCI_BUS_NR);
598
599 for (i = 0; i < PCI_BAR_COUNT; i++) {
600 if (!zdev->bars[i].size)
601 continue;
602 entry = zpci_alloc_iomap(zdev);
603 if (entry < 0)
604 return entry;
605 zdev->bars[i].map_idx = entry;
606
607 /* only MMIO is supported */
608 flags = IORESOURCE_MEM;
609 if (zdev->bars[i].val & 8)
610 flags |= IORESOURCE_PREFETCH;
611 if (zdev->bars[i].val & 4)
612 flags |= IORESOURCE_MEM_64;
613
614 addr = ZPCI_IOMAP_ADDR_BASE + ((u64) entry << 48);
615
616 size = 1UL << zdev->bars[i].size;
617
618 res = __alloc_res(zdev, addr, size, flags);
619 if (!res) {
620 zpci_free_iomap(zdev, entry);
621 return -ENOMEM;
622 }
623 zdev->bars[i].res = res;
624 pci_add_resource(resources, res);
625 }
626
627 return 0;
628 }
629
630 static void zpci_cleanup_bus_resources(struct zpci_dev *zdev)
631 {
632 int i;
633
634 for (i = 0; i < PCI_BAR_COUNT; i++) {
635 if (!zdev->bars[i].size || !zdev->bars[i].res)
636 continue;
637
638 zpci_free_iomap(zdev, zdev->bars[i].map_idx);
639 release_resource(zdev->bars[i].res);
640 kfree(zdev->bars[i].res);
641 }
642 }
643
644 int pcibios_add_device(struct pci_dev *pdev)
645 {
646 struct zpci_dev *zdev = to_zpci(pdev);
647 struct resource *res;
648 int i;
649
650 zdev->pdev = pdev;
651 pdev->dev.groups = zpci_attr_groups;
652 zpci_map_resources(pdev);
653
654 for (i = 0; i < PCI_BAR_COUNT; i++) {
655 res = &pdev->resource[i];
656 if (res->parent || !res->flags)
657 continue;
658 pci_claim_resource(pdev, i);
659 }
660
661 return 0;
662 }
663
664 void pcibios_release_device(struct pci_dev *pdev)
665 {
666 zpci_unmap_resources(pdev);
667 }
668
669 int pcibios_enable_device(struct pci_dev *pdev, int mask)
670 {
671 struct zpci_dev *zdev = to_zpci(pdev);
672
673 zdev->pdev = pdev;
674 zpci_debug_init_device(zdev);
675 zpci_fmb_enable_device(zdev);
676
677 return pci_enable_resources(pdev, mask);
678 }
679
680 void pcibios_disable_device(struct pci_dev *pdev)
681 {
682 struct zpci_dev *zdev = to_zpci(pdev);
683
684 zpci_fmb_disable_device(zdev);
685 zpci_debug_exit_device(zdev);
686 zdev->pdev = NULL;
687 }
688
689 #ifdef CONFIG_HIBERNATE_CALLBACKS
690 static int zpci_restore(struct device *dev)
691 {
692 struct pci_dev *pdev = to_pci_dev(dev);
693 struct zpci_dev *zdev = to_zpci(pdev);
694 int ret = 0;
695
696 if (zdev->state != ZPCI_FN_STATE_ONLINE)
697 goto out;
698
699 ret = clp_enable_fh(zdev, ZPCI_NR_DMA_SPACES);
700 if (ret)
701 goto out;
702
703 zpci_map_resources(pdev);
704 zpci_register_ioat(zdev, 0, zdev->start_dma, zdev->end_dma,
705 (u64) zdev->dma_table);
706
707 out:
708 return ret;
709 }
710
711 static int zpci_freeze(struct device *dev)
712 {
713 struct pci_dev *pdev = to_pci_dev(dev);
714 struct zpci_dev *zdev = to_zpci(pdev);
715
716 if (zdev->state != ZPCI_FN_STATE_ONLINE)
717 return 0;
718
719 zpci_unregister_ioat(zdev, 0);
720 zpci_unmap_resources(pdev);
721 return clp_disable_fh(zdev);
722 }
723
724 struct dev_pm_ops pcibios_pm_ops = {
725 .thaw_noirq = zpci_restore,
726 .freeze_noirq = zpci_freeze,
727 .restore_noirq = zpci_restore,
728 .poweroff_noirq = zpci_freeze,
729 };
730 #endif /* CONFIG_HIBERNATE_CALLBACKS */
731
732 static int zpci_alloc_domain(struct zpci_dev *zdev)
733 {
734 spin_lock(&zpci_domain_lock);
735 zdev->domain = find_first_zero_bit(zpci_domain, ZPCI_NR_DEVICES);
736 if (zdev->domain == ZPCI_NR_DEVICES) {
737 spin_unlock(&zpci_domain_lock);
738 return -ENOSPC;
739 }
740 set_bit(zdev->domain, zpci_domain);
741 spin_unlock(&zpci_domain_lock);
742 return 0;
743 }
744
745 static void zpci_free_domain(struct zpci_dev *zdev)
746 {
747 spin_lock(&zpci_domain_lock);
748 clear_bit(zdev->domain, zpci_domain);
749 spin_unlock(&zpci_domain_lock);
750 }
751
752 void pcibios_remove_bus(struct pci_bus *bus)
753 {
754 struct zpci_dev *zdev = get_zdev_by_bus(bus);
755
756 zpci_exit_slot(zdev);
757 zpci_cleanup_bus_resources(zdev);
758 zpci_free_domain(zdev);
759
760 spin_lock(&zpci_list_lock);
761 list_del(&zdev->entry);
762 spin_unlock(&zpci_list_lock);
763
764 kfree(zdev);
765 }
766
767 static int zpci_scan_bus(struct zpci_dev *zdev)
768 {
769 LIST_HEAD(resources);
770 int ret;
771
772 ret = zpci_setup_bus_resources(zdev, &resources);
773 if (ret)
774 goto error;
775
776 zdev->bus = pci_scan_root_bus(NULL, ZPCI_BUS_NR, &pci_root_ops,
777 zdev, &resources);
778 if (!zdev->bus) {
779 ret = -EIO;
780 goto error;
781 }
782 zdev->bus->max_bus_speed = zdev->max_bus_speed;
783 pci_bus_add_devices(zdev->bus);
784 return 0;
785
786 error:
787 zpci_cleanup_bus_resources(zdev);
788 pci_free_resource_list(&resources);
789 return ret;
790 }
791
792 int zpci_enable_device(struct zpci_dev *zdev)
793 {
794 int rc;
795
796 rc = clp_enable_fh(zdev, ZPCI_NR_DMA_SPACES);
797 if (rc)
798 goto out;
799
800 rc = zpci_dma_init_device(zdev);
801 if (rc)
802 goto out_dma;
803
804 zdev->state = ZPCI_FN_STATE_ONLINE;
805 return 0;
806
807 out_dma:
808 clp_disable_fh(zdev);
809 out:
810 return rc;
811 }
812 EXPORT_SYMBOL_GPL(zpci_enable_device);
813
814 int zpci_disable_device(struct zpci_dev *zdev)
815 {
816 zpci_dma_exit_device(zdev);
817 return clp_disable_fh(zdev);
818 }
819 EXPORT_SYMBOL_GPL(zpci_disable_device);
820
821 int zpci_create_device(struct zpci_dev *zdev)
822 {
823 int rc;
824
825 rc = zpci_alloc_domain(zdev);
826 if (rc)
827 goto out;
828
829 mutex_init(&zdev->lock);
830 if (zdev->state == ZPCI_FN_STATE_CONFIGURED) {
831 rc = zpci_enable_device(zdev);
832 if (rc)
833 goto out_free;
834 }
835 rc = zpci_scan_bus(zdev);
836 if (rc)
837 goto out_disable;
838
839 spin_lock(&zpci_list_lock);
840 list_add_tail(&zdev->entry, &zpci_list);
841 spin_unlock(&zpci_list_lock);
842
843 zpci_init_slot(zdev);
844
845 return 0;
846
847 out_disable:
848 if (zdev->state == ZPCI_FN_STATE_ONLINE)
849 zpci_disable_device(zdev);
850 out_free:
851 zpci_free_domain(zdev);
852 out:
853 return rc;
854 }
855
856 void zpci_stop_device(struct zpci_dev *zdev)
857 {
858 zpci_dma_exit_device(zdev);
859 /*
860 * Note: SCLP disables fh via set-pci-fn so don't
861 * do that here.
862 */
863 }
864 EXPORT_SYMBOL_GPL(zpci_stop_device);
865
866 static inline int barsize(u8 size)
867 {
868 return (size) ? (1 << size) >> 10 : 0;
869 }
870
871 static int zpci_mem_init(void)
872 {
873 zdev_fmb_cache = kmem_cache_create("PCI_FMB_cache", sizeof(struct zpci_fmb),
874 16, 0, NULL);
875 if (!zdev_fmb_cache)
876 goto error_zdev;
877
878 /* TODO: use realloc */
879 zpci_iomap_start = kzalloc(ZPCI_IOMAP_MAX_ENTRIES * sizeof(*zpci_iomap_start),
880 GFP_KERNEL);
881 if (!zpci_iomap_start)
882 goto error_iomap;
883 return 0;
884
885 error_iomap:
886 kmem_cache_destroy(zdev_fmb_cache);
887 error_zdev:
888 return -ENOMEM;
889 }
890
891 static void zpci_mem_exit(void)
892 {
893 kfree(zpci_iomap_start);
894 kmem_cache_destroy(zdev_fmb_cache);
895 }
896
897 static unsigned int s390_pci_probe = 1;
898 static unsigned int s390_pci_initialized;
899
900 char * __init pcibios_setup(char *str)
901 {
902 if (!strcmp(str, "off")) {
903 s390_pci_probe = 0;
904 return NULL;
905 }
906 return str;
907 }
908
909 bool zpci_is_enabled(void)
910 {
911 return s390_pci_initialized;
912 }
913
914 static int __init pci_base_init(void)
915 {
916 int rc;
917
918 if (!s390_pci_probe)
919 return 0;
920
921 if (!test_facility(69) || !test_facility(71) || !test_facility(72))
922 return 0;
923
924 rc = zpci_debug_init();
925 if (rc)
926 goto out;
927
928 rc = zpci_mem_init();
929 if (rc)
930 goto out_mem;
931
932 rc = zpci_irq_init();
933 if (rc)
934 goto out_irq;
935
936 rc = zpci_dma_init();
937 if (rc)
938 goto out_dma;
939
940 rc = clp_scan_pci_devices();
941 if (rc)
942 goto out_find;
943
944 s390_pci_initialized = 1;
945 return 0;
946
947 out_find:
948 zpci_dma_exit();
949 out_dma:
950 zpci_irq_exit();
951 out_irq:
952 zpci_mem_exit();
953 out_mem:
954 zpci_debug_exit();
955 out:
956 return rc;
957 }
958 subsys_initcall_sync(pci_base_init);
959
960 void zpci_rescan(void)
961 {
962 if (zpci_is_enabled())
963 clp_rescan_pci_devices_simple();
964 }